Following patch V8 adds support for Cavium Liquidio pci express
based 10Gig ethernet adapters.
1) Consolidated all debug macros to either call dev_* or
   netdev_* macros directly, feedback from previous patch.
2) Changed soft commands to avoid crash when running
   in interrupt context.
3) Fixed link status not reflecting correct status when NetworkManager
   is running. Added MODULE_FIRMWARE declarations.

Following were the previous patches.
Patch V7:
1) Minor comments from v6 release regarding debug statements.
2) Fix for large multicast lists.
3) Fixed lockup issue if port initialization fails.
4) Enabled MSI by default.
https://patchwork.ozlabs.org/patch/464441/

Patch V6:
1) Addressed the uint64 vs u64 issue, feedback from previous patch.
2) Consolidated some receive processing routines.
3) Removed link status polling method.
https://patchwork.ozlabs.org/patch/459514/

Patch V5:
Based on the feedback from earlier patches with regards to
consolidation of common functions like device init, register
programming for cn66xx and cn68xx devices.
https://patchwork.ozlabs.org/patch/438979/

Patch V4:
Following were the changes based on the feedback from earlier patch:
1) Added mmiowb while synchronizing queue updates and other hw
   interactions.
2) Statistics will now be incremented non-atomically per each ring.
   liquidio_get_stats will add stats of each ring while reporting the
   total statistics counts.
3) Modified liquidio_ioctl  to return proper return codes.
4) Modified device naming to use standard Ethernet naming.
5) Global function names in the driver will have lio_/liquidio_/octeon_
   prefix.
6) Ethtool related changes for:
   Removed redundant stats and jiffies.
   Use default ethtool handler of link status.
   Speed setting will make use of ethtool_cmd_speed_set.
7) Added checks for pci_map_*  return codes.
8) Check for signals while waiting in interruptible mode
https://patchwork.ozlabs.org/patch/435073/

Patch v3:
Implemented feedback from previous patch like:
Removed NAPI Config and DEBUG config options, added BQL and xmit_more
support.
https://patchwork.ozlabs.org/patch/422749/

Patch V2:
Implemented feedback from previous patch.
https://patchwork.ozlabs.org/patch/413539/

First Patch:
https://patchwork.ozlabs.org/patch/412946/Signed-off-by: NDerek Chickles <derek.chickles@caviumnetworks.com>
Signed-off-by: NSatanand Burla <satananda.burla@caviumnetworks.com>
Signed-off-by: NFelix Manlunas <felix.manlunas@caviumnetworks.com>
Signed-off-by: NRobert Richter <Robert.Richter@caviumnetworks.com>
Signed-off-by: NAleksey Makarov <Aleksey.Makarov@caviumnetworks.com>
Signed-off-by: NRaghu Vatsavayi <raghu.vatsavayi@caviumnetworks.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NHariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NHariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NHariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

EXTRA_CFLAGS should be used on the command line only.

Since EXTRA_CFLAGS here add only a non-existant path to compiler
include paths (by -I), remove EXTRA_CFLAGS completely.
Signed-off-by: NJiri Slaby <jslaby@suse.cz>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

This patch corrects a bug in ixgbe_setup_ixfi_x550em where we were
reading and modifying IXGBE_KRM_LINK_CTRL_1 but forgot to write the
results back.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NKrishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

Even though X550 may later clear this value for certain devices
set it initially to support copper.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NKrishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

We need to call the set_lan_id before accessing I2C and this wasn't
being done so this patch corrects that.  Likewise we do the same for
QSFP just to be consistent.

In the X550 case this is even more important as with out it the mux
is not controlled properly.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NKrishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

This patch adds ixgbe_check_link_t_X550em for checking copper PHY
link.  We check that both the MAC and external PHY have link. This
is to avoid a false link up between the internal and external PHY
when  the external PHY doesn't have link.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NKrishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

This patch adds support for another 10baseT X550 device.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

A subset of the X550 function pointers didn't have default methods. This
didn't cause any issue with previous X550 devices as they were all
redefined.  However future devices will need these default values.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NKrishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

Reviewing the X550 copper init flow with the Si team resulted in a
new simplified flow.  We no longer wait for the PHY FW initialization
complete bit to be set as this bit is only set once by the PHY at power
on and then cleared on the first read. So only the first instance of
running SW (or possibly MAC FW) needs to initialize the PHY.

The PHY initialization has been simplified and now only requires that
the PHY FW be un-stalled
low-power mode or enabled the transceiver
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NKrishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

This check was missed in when this new MAC type was added.  Since
these counts can be incremented for X550 we need to clear them.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NKrishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

Add checks for systems that don't have SFP's to avoid incorrectly
acting on interrupts that are falsely interpreted as SFP events.
We do this by updating the ixgbe_is_sfp to be aware of the
new X550 devices.  This also includes a modified check generating
the EICR mask to be more forward-looking.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NKrishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

This patch adds support for receiving interrupts from a external copper
PHY for the X550 part.  This includes enabling, detection as well as
re-enablement.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NKrishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

The over heat message is displayed for multiple reasons but the text is
cut-n-pasted for each of these cases.  This patch pulls the text from the
same location.  I noticed this as I am about to add another case.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NKrishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

This patch adds a PHY reset function ixgbe_reset_phy_t_X550em. Which
allows devices that have LASI support in enable their interrupt.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NKrishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

This patch adds x550 external PHY interrupt and forced 1G/10G support.
This included enabling and handling LSC and thermal sensor interrupt.
ixgbe_handle_lasi() has been added for handling the interrupts received
over SDP0 from the external 10baseT PHY. ixgbe_enable_lasi_ext_t_x550em
and ixgbe_get_lasi_ext_t_x550em have been added to X550em to enable
mask and check interrupt flags for the external PHY.

Forced 1G/10G link speed is handled via ixgbe_mac_link_t_X550em.
ixgbe_seupt_mac_link_t_X550em sets up the internal PHY and external PHY
to either iXFI (10G) or KX (1G) based on the user selected auto
advertised link speed setting. Then sets up the external PHY auto
advertised link speed.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NKrishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

The I2C mux control relies on the SDP setting in the ESDP register
so it is necessary to restore the value after a MAC reset.  Combine
all this functionality in to a support function.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NKrishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

This new method will control the PHY power state.  You pass in the
state you wish to change to (ether on or off).  For cases where this
method is not used the current PHY power state behavior is maintained.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NKrishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

Add a define for the new PHY identification as well as it's mapping
to the correct PHY type.  Also allow ethtool to identify this type
as well.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NKrishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

These Device ID could support both WoL and autoneg flow control. In
the case of WoL this is indicated by the eeprom.  This patch enables
these devices this support.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NKrishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

Some of the register addresses and format where unfortunately changed
between MAC types. To get around this we add a const u32 *mvals pointer
to the ixgbe_hw struct to point to an array of mac-type-dependent
values.  These can include register offsets, masks, whatever can be in
a u32. When the ixgbe_hw struct is initialized, a pointer to the
appropriate array must be set.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

This patch corrects addresses of acceptance filters. These registers are not in
use, but values should be correct. Tested with MCP2515 and am3352 and also
checked datasheets for MCP2515 and MCP2510.
Signed-off-by: NTomas Krcka <tomas.krcka@nkgroup.cz>
Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>

Fix the device tree entries to modify the '_' to '-'.
Also changes the names of the internal delay properties
from -int- to -internal- as the -int- appeared as a keyword.
Signed-off-by: NDan Murphy <dmurphy@ti.com>
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Update the AFE_TX_CONFIG value to solve marginal rise/fall issues
observed when the link is operating in 100BaseT. This workaround applies
to GPHY revisions D0, E0 and newer.
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

The RGMII block is currently only powered on when using RGMII or
RGMII_NO_ID, which is not correct when using the GENET interface in MII
or Reverse MII modes. We always need to power on the RGMII interface for
this block to properly work, regardless of the MII mode in which we
operate.

Fixes: aa09677c ("net: bcmgenet: add MDIO routines")
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Link failures have been observed when using the KSZ9031 with HP 1810-8G
and HP 1910-8G network switches. Center the FLP timing at 16ms to help
avoid intermittent link failures.

>From the KSZ9031RNX and KSZ9031MNX data sheets revision 2.2, section
"Auto-Negotiation Timing":
	The KSZ9031[RNX or MNX] Fast Link Pulse (FLP) burst-to-burst
	transmit timing for Auto-Negotiation defaults to 8ms. IEEE 802.3
	Standard specifies this timing to be 16ms +/-8ms. Some PHY link
	partners need to receive the FLP with 16ms centered timing;
	otherwise, there can be intermittent link failures and long
	link-up times.

The PHY data sheet recommends configuring the FLP burst registers after
power-up/reset and immediately thereafter restarting auto-negotiation, so
we center the FLP timing at 16ms and then restart auto-negotiation in the
config_init for KSZ9031.
Signed-off-by: NJaeden Amero <jaeden.amero@ni.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

There are some defines for a few pad skew related extended registers.
Specify for which MMD Address (dev_addr) they are for.
Signed-off-by: NJaeden Amero <jaeden.amero@ni.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

In a few places in this driver, we weren't using const where we could
have. Use const more.

In addition, change the arrays of strings in ksz9031_config_init() to be
not only const, but also static.
Signed-off-by: NJaeden Amero <jaeden.amero@ni.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

API compliance scanning with coccinelle flagged:
./drivers/net/wan/dscc4.c:1036:1-33:
        WARNING: timeout (10) seems HZ dependent
./drivers/net/wan/dscc4.c:554:2-34:
        WARNING: timeout (10) seems HZ dependent
./drivers/net/wan/dscc4.c:599:2-34:
        WARNING: timeout (10) seems HZ dependent

Numeric constants passed to schedule_timeout_*() make the effective
timeout HZ dependent which does not seem to be the intent here.
Fixed up by converting the constant to jiffies with msecs_to_jiffies(),
passing 100ms (assuming HZ==100 in the original code).
Signed-off-by: NNicholas Mc Guire <hofrat@osadl.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

API compliance scanning with coccinelle flagged:
./drivers/net/wan/cosa.c:520:2-18: WARNING:
	timeout (30) seems HZ dependent

Numeric constants passed to schedule_timeout() make the effective
timeout HZ dependent which makes little sense in a device probe.
Fixed up by converting the constant to jiffies with msecs_to_jiffies()
Signed-off-by: NNicholas Mc Guire <hofrat@osadl.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Fix static checker warnings in the flow of system guid query.

Fixes: 707c4602 ('net/mlx5_core: Add new query HCA vport commands')
Signed-off-by: NMajd Dibbiny <majd@mellanox.com>
Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

When the driver gets unregistered a call to netif_napi_del() was
missing, this all was also missing in the error paths of
b44_init_one().
Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

use time_is_before_eq_jiffies macro for time comparison
Signed-off-by: NAntonio Murdaca <antonio.murdaca@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

There are several places in the driver (all in control paths) where
coherent dma memory is being allocated using either dma_alloc_coherent()
or the deprecated pci_alloc_consistent(). All these calls should be
changed to use dma_zalloc_coherent() to avoid uninitialized fields in
data structures backed by this memory.
Reported-by: NJoerg Roedel <jroedel@suse.de>
Tested-by: NJoerg Roedel <jroedel@suse.de>
Signed-off-by: NSriharsha Basavapatna <sriharsha.basavapatna@avagotech.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

The current driver adjust freq formula is:
fe * diff = ppb * pc
Note:
  fe: ENET ref clock frequency in Hz
  diff = inc_corr - inc: difference between default increment and correction increment
  ppb: parts per billion adjustment from base
  pc: correction period (in number of fe clock cycles)

The correction increment will be used after N cycles of regular increments,
not every N cycles (with N being the correction period). For example, set ENET_ATCOR=4,
INC=8, INC_CORR=9, there will be 4 increments of 8 (ENET_ATINC[INC]) , followed by 1
increment of 9 (ENET_ATINC[INC_CORR]).

So, the correct formula is:
	fe * diff = ppb * (pc + 1)

For ENET_ATCOR, a value 0 disables the correction counter and no corrections occur.
So base on the origin formula, set pc = pc > 1 ? pc - 1 : pc.
Signed-off-by: NFugang Duan <B38611@freescale.com>
Signed-off-by: NFrank Li <Frank.Li@freescale.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Remove sparse warnings:
drivers/net/ethernet/xilinx/ll_temac_main.c:65:16: warning: cast removes
address space of expression
drivers/net/ethernet/xilinx/ll_temac_main.c:70:9: warning: cast removes
address space of expression
drivers/net/ethernet/xilinx/ll_temac_main.c:127:16: warning: cast
removes address space of expression
drivers/net/ethernet/xilinx/ll_temac_main.c:137:9: warning: cast removes
address space of expression
drivers/net/ethernet/xilinx/ll_temac_main.c:409:3: warning: symbol
'temac_options' was not declared. Should it be static?
drivers/net/ethernet/xilinx/ll_temac_main.c:590:6: warning: symbol
'temac_adjust_link' was not declared. Should it be static?
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Dump useful ring statistics along with interrupt status, software
maintained pointers and hardware registers to help troubleshoot TX queue
stalls.

When a timeout occurs, disable TX NAPI for the rings, dump their states
while interrupts are disabled, re-enable interrupts, NAPI and queue flow
control to help with the recovery.
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

ethtool -S on a DSA interface can deadlock for some switches because
the same lock is taken twice. Use the register read function which
expects the lock to be already held.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Fixes: 31888234 ("net: dsa: mv88e6xxx: Replace stats mutex with SMI mutex")
Signed-off-by: NDavid S. Miller <davem@davemloft.net>