- 17 2月, 2013 1 次提交
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由 Jayachandran C 提交于
Add support for XLS6xx CPUs to the Fast Message Network (FMN) configuration. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4785/Signed-off-by: NJohn Crispin <blogic@openwrt.org>
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- 31 1月, 2013 1 次提交
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由 Jayachandran C 提交于
The commit 2a37b1ae "MIPS: Netlogic: Move from u32 cpumask to cpumask_t" breaks uniprocessor compilation on XLR with: arch/mips/netlogic/xlr/setup.c: In function 'prom_init': arch/mips/netlogic/xlr/setup.c:196:6: error: unused variable 'i' Fix by defining 'i' only when CONFIG_SMP is defined. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4760/Signed-off-by: NJohn Crispin <blogic@openwrt.org> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 01 12月, 2012 1 次提交
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由 Stephen Warren 提交于
All architectures that use cmd_dtc do so in almost the same way. Create a central build rule to avoid duplication. The one difference is that most current uses of dtc build $(obj)/%.dtb from $(src)/dts/%.dts rather than building the .dtb in the same directory as the .dts file. This difference will be eliminated arch-by-arch in future patches. MIPS is the exception here; it already uses the exact same rule as the new common rule, so the duplicate is removed in this patch to avoid any conflict. arch/mips changes courtesy of Ralf Baechle. Update Documentation/kbuild to remove the explicit call to cmd_dtc from the example, now that the rule exists in a centralized location. Cc: Arnd Bergmann <arnd@arndb.de> Cc: linux-arm-kernel@lists.infradead.org Cc: Olof Johansson <olof@lixom.net> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Cc: Jonas Bonn <jonas@southpole.se> Cc: linux@lists.openrisc.net Cc: Aurelien Jacquiot <a-jacquiot@ti.com> Cc: linux-c6x-dev@linux-c6x.org Cc: Mark Salter <msalter@redhat.com> Cc: Michal Simek <monstr@monstr.eu> Cc: microblaze-uclinux@itee.uq.edu.au Cc: Chris Zankel <chris@zankel.net> Cc: linux-xtensa@linux-xtensa.org Cc: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NRob Herring <rob.herring@calxeda.com>
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- 09 11月, 2012 8 次提交
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由 Ganesan Ramalingam 提交于
On XLR/XLS, the cpu cores communicate with fast on-chip devices (e.g. network accelerator, security engine etc.) using the Fast Messaging Network(FMN). The FMN queues and credits needs to be configured and intialized before it can be used. The co-processor 2 on XLR/XLS CPU cores has registers for FMN access, and the XLR/XLS has custom instructions for sending and loading messages. The FMN can deliver also per-cpu interrupts when messages are available at the CPU. This patch adds FMN initialization, adds interrupt setup and handling, and also provides support for sending and receiving FMN messages. Signed-off-by: NGanesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: NJayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4468Signed-off-by: NJohn Crispin <blogic@openwrt.org>
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由 Jayachandran C 提交于
Create struct nlm_pic_irq for interrupts handled by the PIC. This simplifies IRQ handling for multi-SoC as well as the single SoC cases. Also split the setup of percpu and PIC interrupts so that we can configure the PIC interrupts for every node. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4467Signed-off-by: NJohn Crispin <blogic@openwrt.org>
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由 Jayachandran C 提交于
There can be 1, 2 or 4 SoCs(nodes) in a multi-chip XLP board. Add an option for multi-chip boards in case of XLP, and make the number of nodes configurable. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4470Signed-off-by: NJohn Crispin <blogic@openwrt.org>
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由 Jayachandran C 提交于
Upto 4 Netlogic XLP SoCs can be connected over ICI links to form a coherent multi-node system. Each SoC has its own set of on-chip devices including PIC. To support this, add a per SoC stucture and use it for the PIC and SYS block addresses instead of using global variables. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4469Signed-off-by: NJohn Crispin <blogic@openwrt.org>
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由 Jayachandran C 提交于
Initial code to support more than 32 cpus. The platform CPU mask is updated from 32-bit mask to cpumask_t. Convert places that use cpu_/cpus_ functions to use cpumask_* functions. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4464Signed-off-by: NJohn Crispin <blogic@openwrt.org>
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由 Jayachandran C 提交于
The cpuid was not passed into early_init_secondary even though the comment indicated that it will be. Fix this. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4458Signed-off-by: NJohn Crispin <blogic@openwrt.org>
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由 Jayachandran C 提交于
At this point early printk is available, so debugging device tree issues is easier. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4460Signed-off-by: NJohn Crispin <blogic@openwrt.org>
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由 Jayachandran C 提交于
Enable Speculative Unmap Enable bit, which will enable speculative L2 cache requests for unmapped memory. This should give better performance for kernel code/data which is in KSEG0 Signed-off-by: NJayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4461Signed-off-by: NJohn Crispin <blogic@openwrt.org>
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- 23 10月, 2012 2 次提交
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由 Florian Fainelli 提交于
The OHCI platform driver is suitable for use by the Netlogic XLR platform so use this driver instead of the OHCI XLS platform driver. Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Acked-by: NAlan Stern <stern@rowland.harvard.edu> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Florian Fainelli 提交于
The EHCI platform driver is suitable for use by the Netlogic XLR platform since there is nothing specific that the EHCI XLR platform driver does. Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Acked-by: NAlan Stern <stern@rowland.harvard.edu> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 23 8月, 2012 4 次提交
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由 Jayachandran C 提交于
Provide a config option to embed a device tree for XLP evaluation boards. This DTB will be used if the firmware does not pass in a device tree pointer. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Patchwork: http://patchwork.linux-mips.org/patch/4103/Signed-off-by: NJohn Crispin <blogic@openwrt.org>
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由 Jayachandran C 提交于
Add the serial ports to the device tree and remove the platform code for adding them. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Patchwork: http://patchwork.linux-mips.org/patch/4098/Signed-off-by: NJohn Crispin <blogic@openwrt.org>
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由 Ganesan Ramalingam 提交于
Add a basic DTS file netlogic/dts/nlm_xlp.dts which contains memory, i2c devices, NOR flash and command line arguments. Signed-off-by: NGanesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Patchwork: http://patchwork.linux-mips.org/patch/4100/Signed-off-by: NJohn Crispin <blogic@openwrt.org>
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由 Jayachandran C 提交于
Move the function device_tree_init() from netlogic/xlp/of.c to setup.c, and remove the wrapper functions reserve_mem_mach() and free_mem_mach(). Remove file netlogic/xlp/of.c, and the Makefile entry for it. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Patchwork: http://patchwork.linux-mips.org/patch/4097/Signed-off-by: NJohn Crispin <blogic@openwrt.org>
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- 25 7月, 2012 2 次提交
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由 Jayachandran C 提交于
In prom_putchar(), wait for just the TX empty bit to clear in the UART LSR. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Cc: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/4112/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Jayachandran C 提交于
[ralf@linux-mips.org: I've folded most segments of this patch into those patches in -next that originally were causing the whitespace damage. This is just what's left over] Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4094/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 24 7月, 2012 10 次提交
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由 Ganesan Ramalingam 提交于
Probe and add devices on SoC "simple-bus" on startup. This will in turn add devices like I2C controller that are specified in the device tree under 'soc'. Signed-off-by: NGanesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3762/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Jayachandran C 提交于
Add IRT to IRQ translation for the MMC and I2C IRQs. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3761/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ganesan Ramalingam 提交于
The XLP USB controller appears as a device on the internal SoC PCIe bus, the block has 2 EHCI blocks and 4 OHCI blocks. Change are to: * Add files netlogic/xlp/usb-init.c and asm/netlogic/xlp-hal/usb.h to initialize the USB controller and define PCI fixups. The PCI fixups are to setup interrupts and DMA mask. * Update include/asm/xlp-hal/{iomap.h,pic.h,xlp.h} to add interrupt mapping for EHCI/OHCI interrupts. Signed-off-by: NGanesan Ramalingam <ganesanr@netlogicmicro.com> Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3756/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ganesan Ramalingam 提交于
Adds support for the XLP on-chip PCIe controller. On XLP, the on-chip devices(including the 4 PCIe links) appear in the PCIe configuration space of the XLP as PCI devices. The changes are to initialize and register the PCIe controller, enable hardware byte swap in the PCIe IO and MEM space, and to enable PCIe interrupts. Signed-off-by: NGanesan Ramalingam <ganesanr@netlogicmicro.com> Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3760/ Patchwork: https://patchwork.linux-mips.org/patch/4104/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Jayachandran C 提交于
Add platform code for XLR/XLS I2C controller and devices. Add devices on the I2C bus on the XLR/XLS developement boards. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3757/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ganesan Ramalingam 提交于
Changes to add support for the boot NOR flash on XLR boards and the boot NAND/NOR flash drivers on the XLS boards. Signed-off-by: NGanesan Ramalingam <ganesanr@netlogicmicro.com> Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3758/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Jayachandran C 提交于
Add USB initialization code, setup resources and add USB platform driver in mips/netlogic/xlr/platform.c. Add USB support for XLR/XLS platform in Kconfig. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3759/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Jayachandran C 提交于
Remove NETLOGIC_ prefix from gpio register definitions, this will bring it in-line with the other Netlogic headers. Having NETLOGIC prefix here is misleading because these are XLR/XLS specific register definitions. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3754/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Jayachandran C 提交于
Update for core intialization code. Initialize status register after receiving NMI for CPU wakeup. Add the low level L1D flush code before enabling threads in core. Also convert the ehb to _ehb so that it works under more GCC versions. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3755/ Patchwork: https://patchwork.linux-mips.org/patch/4095/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Jayachandran C 提交于
No change in logic, comments update and whitespace cleanup. * A few comments in the file were in assembler style and the rest int C style, convert all of them to C style. * Mark workarounds for Ax silicon with a macro XLP_AX_WORKAROUND * Whitespace fixes - use tabs consistently * rename __config_lsu macro to xlp_config_lsu Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3749/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 23 7月, 2012 1 次提交
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由 David Daney 提交于
This code is not common enough to be in a shared file. It is also not used by any existing boards, so just remove it. [ralf@linux-mips.org: Dropped removal of irq_create_of_mapping which was already removed by abd2363f [irq_domain/mips: Allow irq_domain on MIPS]. Moved device_tree_init() and dependencies to its sole user, the XLP code.] Signed-off-by: NDavid Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: grant.likely@secretlab.ca Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2946/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 04 7月, 2012 1 次提交
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由 Jayachandran C 提交于
Starting other threads in the core will change the number of TLB entries of a CPU. Re-calculate current_cpu_data.tlbsize on the boot cpu after enabling and waking up other threads. The secondary CPUs do not need this logic because the threads are enabled on the secondary cores at wakeup and before cpu_probe. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3751/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 29 3月, 2012 2 次提交
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由 Rusty Russell 提交于
This has been obsolescent for a while; time for the final push. In adjacent context, replaced old cpus_* with cpumask_*. Signed-off-by: NRusty Russell <rusty@rustcorp.com.au> Acked-by: David S. Miller <davem@davemloft.net> (arch/sparc) Acked-by: Chris Metcalf <cmetcalf@tilera.com> (arch/tile) Cc: user-mode-linux-devel@lists.sourceforge.net Cc: Russell King <linux@arm.linux.org.uk> Cc: linux-arm-kernel@lists.infradead.org Cc: Richard Kuo <rkuo@codeaurora.org> Cc: linux-hexagon@vger.kernel.org Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Helge Deller <deller@gmx.de> Cc: sparclinux@vger.kernel.org
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由 David Howells 提交于
Disintegrate asm/system.h for MIPS. Signed-off-by: NDavid Howells <dhowells@redhat.com> Acked-by: NRalf Baechle <ralf@linux-mips.org> cc: linux-mips@linux-mips.org
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- 08 12月, 2011 7 次提交
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由 Hillf Danton 提交于
Netlogic XLR chip has multiple cores. Each core includes four integrated hardware threads, and they share L1 data and instruction caches. If the chip is marked to be SMT capable, scheduler then could do more, say, idle load balancing. Changes are now confined only to the code of XLR, and hardware is probed to get core ID for correct setup. [jayachandranc: simplified and adapted for new merged XLR/XLP code] Signed-off-by: NHillf Danton <dhillf@gmail.com> Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2972/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Jayachandran C 提交于
Add new processor ID to asm/cpu.h and kernel/cpu-probe.c. Update to new CPU frequency detection code which works on XLP 3XX and 8XX. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2971/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Jayachandran C 提交于
Create a common NMI and reset handler in smpboot.S and use this for both XLR and XLP. In the earlier code, the woken up CPUs would busy wait until released, switch this to wakeup by NMI. The initial wakeup code or XLR and XLP are differ since they are started from different bootloaders (XLP from u-boot and XLR from netlogic bootloader). But in both platforms the woken up CPUs wait and are released by sending an NMI. Add support for starting XLR and XLP in 1/2/4 threads per core. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2970/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Jayachandran C 提交于
- Add CPU_XLP and NLM_XLR_BOARD to arch/mips/Kconfig for Netlogic XLP boards - Update mips Makefiles to add XLP Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2968/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Jayachandran C 提交于
- Update common files to support XLP. - Add arch/mips/include/asm/netlogic/xlp-hal for register definitions and access macros - Add arch/mips/netlogic/xlp/ for XLP specific files. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2967/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Jayachandran C 提交于
- Move code that can be shared with XLP (irq.c, smp.c, time.c and xlr_console.c) to arch/mips/netlogic/common - Add asm/netlogic/haldefs.h and asm/netlogic/common.h for common and io functions shared with XLP - remove type 'nlm_reg_t *' and use uint64_t for mmio offsets - Move XLR specific code in smp.c to xlr/wakeup.c - Move XLR specific PCI code from irq.c to mips/pci/pci-xlr.c - Provide API for pic functions called from common/irq.c Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2964/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Jayachandran C 提交于
The -Werror compilation flag is already set for arch/mips - it can be removed from arch/mips/xlr/Makefile Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2963/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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