We use the FPU and therefore cannot sleep during the crypto
loops.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

We tried linking in a single built object to hold the device table,
but only works if all of the sparc64 crypto modules get built the same
way (modular vs. non-modular).

Just include the device ID stub into each driver source file so that
the table gets compiled into the correct result in all cases.
Reported-by: NMeelis Roos <mroos@linux.ee>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

The hashes and crc32c had it, only the AES/DES/CAMELLIA drivers were
missing it.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Make the crypto opcode implementations have a higher priority than
those provides by the ring buffer based Niagara crypto device.

Also, several crypto opcode hashes were not setting the priority value
at all.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NDavid S. Miller <davem@davemloft.net>