1. 12 7月, 2005 1 次提交
  2. 10 6月, 2005 1 次提交
    • C
      [IA64] Fix race condition in the rt_sigprocmask fastcall · a2a64769
      Christoph Lameter 提交于
      current->blocked will be set to the value of current->thread_info->flags if the
      cmpxchg to update thread_info->flags fails. For performance reasons the store into
      current->blocked was placed in the cmpxchg loop. However, the cmpxchg overwrites the
      register holding the value to be stored. In the rare case of a retry the value of
      thread_info->flags will be written into current->blocked.
      
      The fix is to use another register so that the register containing the current->blocked
      value is not overwritten.
      Signed-off-by: NChristoph Lameter <clameter@sgi.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      a2a64769
  3. 09 6月, 2005 5 次提交
  4. 04 6月, 2005 1 次提交
  5. 02 6月, 2005 2 次提交
  6. 01 6月, 2005 1 次提交
  7. 27 5月, 2005 1 次提交
  8. 19 5月, 2005 2 次提交
    • T
      [IA64] initialize spinlock pfm_alt_install_check · fe12e25e
      Tony Luck 提交于
      I applied the penultimate version of the perfmon patch, which didn't have
      the initialization of the new spinlock that was added.
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      fe12e25e
    • T
      [IA64] alternate perfmon handler · a1ecf7f6
      Tony Luck 提交于
      Patch from Charles Spirakis
      
      Some linux customers want to optimize their applications on the latest
      hardware but are not yet willing to upgrade to the latest kernel. This
      patch provides a way to plug in an alternate, basic, and GPL'ed PMU
      subsystem to help with their monitoring needs or for specialty work. It
      can also be used in case of serious unexpected bugs in perfmon. Mutual
      exclusion between the two subsystems is guaranteed, hence no conflict
      can arise from both subsystem being present.
      Acked-by: NStephane Eranian <eranian@hpl.hp.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      a1ecf7f6
  9. 18 5月, 2005 3 次提交
  10. 17 5月, 2005 1 次提交
  11. 11 5月, 2005 1 次提交
    • D
      [IA64] Avoid .spillpsp directive in handcoded assembly · bfd68594
      David Mosberger-Tang 提交于
      Some time ago, GAS was fixed to bring the .spillpsp directive in line
      with the Intel assembler manual (there was some disagreement as to
      whether or not there is a built-in 16-byte offset).  Unfortunately,
      there are two places in the kernel where this directive is used in
      handwritten assembly files and those of course relied on the "buggy"
      behavior.  As a result, when using a "fixed" assembler, the kernel
      picks up the UNaT bits from the wrong place (off by 16) and randomly
      sets NaT bits on the scratch registers.  This can be noticed easily by
      looking at a coredump and finding various scratch registers with
      unexpected NaT values.  The patch below fixes this by using the
      .spillsp directive instead, which works correctly no matter what
      assembler is in use.
      Signed-off-by: NDavid Mosberger-Tang <davidm@hpl.hp.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      bfd68594
  12. 10 5月, 2005 1 次提交
  13. 07 5月, 2005 1 次提交
  14. 06 5月, 2005 1 次提交
  15. 05 5月, 2005 1 次提交
  16. 04 5月, 2005 17 次提交