1. 04 6月, 2013 4 次提交
    • D
      drm/i915: move find_pll callback to dev_priv->display · ee9300bb
      Daniel Vetter 提交于
      Now that the DP madness is cleared out, this is all only per-platform.
      So move it out from the intel clock limits structure.
      
      While at it drop the intel prefix on the static functions, call the
      vtable entry find_dpll (since it's for the display pll) and rip out
      the now unnecessary forward declarations.
      
      Note that the parameters of ->find_dpll are still unchanged, but they
      eventually need to be moved over to just take in a pipe configuration.
      But currently a lot of things are still missing from the pipe
      configuration (reflock, output-specific dpll limits and preferences,
      downclocked dotclock). So this will happen in a later step.
      
      Note that intel_g4x_limit has a peculiar case where it selects
      intel_limits_i9xx_sdvo as the limit. This is pretty bogus and also not
      used since the only output types left are DP and native TV-out which
      both use special pre-tuned dpll values.
      
      v2: Re-add comment for the find_pll callback (requested by Paulo) and
      elaborate on why the transformation is correct for g4x platforms (to
      clarify a review question from Paulo). Double up on that by adding a
      WARN as suggested by Paulo Zanoni on irc.
      
      v3: Initialize limits to NULL since gcc is now unhappy.
      
      v4: v2/3 will blow up with a NULL dereference in ->find_dpll for dp and
      TV-out ports, spotted by Paulo on irc. So just give up on this madness for
      now, and leave this to be fixed in a later patch.
      
      v5: Since the ever-so-slight change for g4x might result in some dpll
      parameter computation failing spuriously where before it didn't for
      ports with preset dpll settings (DP & TV-out) override this. For
      paranoia also do it in the ilk+ code.
      
      Cc: Paulo Zanoni <przanoni@gmail.com>
      Reviewed-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      ee9300bb
    • D
      drm/i915: split out intel_pnv_find_best_PLL · ac58c3f0
      Daniel Vetter 提交于
      Pineview is just different.
      
      Also split out i9xx_clock from intel_clock and drop the now redundant
      struct device * parameter.
      
      Note that in this patch I kill an XXX comment about 100MHz clocks. I
      couldn't figure out what this is about, and we don't seem to have any
      bug reports about this either. I suspect that it's a remnant from when
      the i9xx and ilk+ modeset code was all in the same file since ilk+
      does indeed have a 100MHz clock. So I've just killed it to stop the
      cargo-culting.
      Reviewed-by: NPaulo Zanoni <przanoni@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      ac58c3f0
    • D
      drm/i915: fix EDID/sink-based bpp clamping · 1b829e05
      Daniel Vetter 提交于
      Since this is run in the compute config stage we need to check
      the new_ pointers, i.e the stage output routing, not the current
      modeset layout. Also there was a little logic bug in properly skipping
      connectors: The old code did not skip any unused connectors and so
      clamped to whatever was left in there (usually 0 if that connector
      hasn't seen a EDID 1.4 screen ever since boot-up).
      
      This has been broken when moving the pipe bpp selection in
      
      commit 4e53c2e0
      Author: Daniel Vetter <daniel.vetter@ffwll.ch>
      Date:   Wed Mar 27 00:44:58 2013 +0100
      
          drm/i915: precompute pipe bpp before touching the hw
      
      To avoid too much casting switch from drm_ to intel_ types.
      
      Also add a bit of debug output to help reconstructing what's going
      on.
      
      v2: Try to clarify this a bit:
      - s/pipe_config_set_bpp/compute_baseline_pipe_bpp/ to make it clearer
        at which stage this function is run. Also add a comment about what
        it does.
      - Extract the sink clamping into it's own function.
      
      v3: Actually make it compile.
      
      v4: Split out all the prep refactoring to make the bugfix stick out
      really badly. Also elaborate a bit in the commit message about the
      nature of the bugfix.
      
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      1b829e05
    • D
      drm/i915: refactor sink bpp clamping · 050f7aeb
      Daniel Vetter 提交于
      As a prep work to fix it up:
      - Use intel_connector instead of drm_connector to avoid too much
        upcasting in the bugfix patch.
      - Extract the connector bpp clamping from the loop-over-connectors
        logic.
      - Bikeshed function names (to make it clearer that
        acompute_baseline_pipe_bpp runs in the compute stage of the modeset
        sequence) and add a comment to make it clearer what it does.
      
      No functional change in this patch.
      
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      050f7aeb
  2. 03 6月, 2013 1 次提交
  3. 01 6月, 2013 7 次提交
  4. 24 5月, 2013 2 次提交
  5. 23 5月, 2013 1 次提交
  6. 21 5月, 2013 3 次提交
  7. 15 5月, 2013 3 次提交
  8. 11 5月, 2013 19 次提交