If reservation_object_get_fences_rcu failed, we'd previously go directly
to the cleanup label, so we'd leave the BO pinned.

While we're at it, remove two amdgpu_bo_unreserve calls in favour of two
new labels.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Fixed mc stop and resume hardware programming sequence.
Signed-off-by: NJunwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Skip IP blocks that are not enabled.
Reviewed-by: NChunming zhou <david1.zhou@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Saves a few CPU cycles.
Reviewed-by: NChunming zhou <david1.zhou@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Helpers to to call the IP functions for the selected IP.
Reviewed-by: NChunming zhou <david1.zhou@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Not enabled yet, but missing the call.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Use UPDATE_IMMEDIATE (update on next data request boundary) rather
than UPDATE_H_RETRACE (update on next line boundary).  The data
request boundary is less than a scanline, so it update will happen
sooner.

Cc: Vitaly Prosyak <vitaly.prosyak@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

It's just overhead to do so and allocating a VMID
when we don't need one is actually a bit dangerous.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Flush and invalidate the HDP caches.

v2: fix typo in comment
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This patch changes pcie_gen_cap magic code to macro to make it more
readable.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: NHuang Rui <ray.huang@amd.com>
Cc: Eric Huang <JinHuiEric.Huang@amd.com>
Cc: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Not used outside of gfx7.
Reviewed-by: NChunming Zhou <david1.zhou@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

gfx8 already uses them.  Remove the direct exports and
use the callbacks fpr gfx7.
Reviewed-by: NChunming Zhou <david1.zhou@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

It's gfx IP specific, not asic specific, so move to a
gfx callback.
Reviewed-by: NChunming Zhou <david1.zhou@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

It's gfx IP specific, not asic specific, so move to a
gfx callback.
Reviewed-by: NChunming Zhou <david1.zhou@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Only used in the gmc IP modules so just call the local
function directly.
Reviewed-by: NChunming Zhou <david1.zhou@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

These are not used outside of the respective gmc ip modules.
Reviewed-by: NChunming Zhou <david1.zhou@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

We don't need to validate them again if the eviction counter didn't changed.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Keep track of the number of evictions since boot.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

irq need to update when gpu reset happens.
Signed-off-by: NChunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This patch is a port of similar patch for amdgpu
when PP is disabled. Since the code flow is little
different when PP is enabled, we need to make sure
the patch is applied for PP enabled path as well.

With the current code, when we boot with the amdgpu
driver enabled and loaded, the VCE also automatically
remains enabled since bootup. This can be verified from
the output of amdgpu_pm_info. It does not matter whether
we boot into command line directly or into X, the VCE
stays enabled the entire time.

This patch addresses the issue and makes sure that
VCE is turned on only during playback, and remains
disabled otherwise.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NArindam Nath <arindam.nath@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

With the current code, when we boot with the amdgpu
driver enabled and loaded, the VCE also automatically
remains enabled since bootup. This can be verified from
the output of amdgpu_pm_info. It does not matter whether
we boot into command line directly or into X, the VCE
stays enabled the entire time.

This patch addresses the issue and makes sure that
VCE is turned on only during playback, and remains
disaled otherwise.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NArindam Nath <arindam.nath@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

No need to stall the pipe when we are using firmware with the
fix.
Reviewed-by: NChunming Zhou <david1.zhou@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

v2: do not overwrite register when bitmap is zero
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NNicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

v2: do not overwrite register when bitmap is zero
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NNicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This parameter will allow disabling individual CUs on module load, e.g.
amdgpu.disable_cu=2.0.3,2.0.4 to disable CUs 3 and 4 of SE2.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NNicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

On workstation cards with ECC vram, the entirety of vram is cleared to 0
on asic init to set the ECC status correctly.  On non ECC boards, I don't
think they do any explicit clearing, but the vram controller is reset
which may cause issues with the data there.
Signed-off-by: NChunming Zhou <David1.Zhou@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NChunming Zhou <David1.Zhou@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

In the AMD powerplay driver, a pointer is checked for validity by
comparing against an integer '0', which causes a harmless warning
when building with "make W=1":

drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/processpptables.c:1502:16: error: ordered comparison of pointer with integer zero [-Werror=extra]

This changes the code to the more conventional "if (pointer)" check.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This boosts Xonotic from 38fps to 47fps when artificially limiting VRAM to
256MB for testing. It should improve all CPU bound rendering situations
where we have a lot of swapping to/from VRAM.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

When we pipeline evictions the page directory could already be
moving somewhere else when grab_id is called.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

It isn't used and not waiting for the GPU after scheduling a move is
actually quite dangerous.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Not needed any more.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Otherwise we could update the VM page tables while the move is only scheduled.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

When we want to pipeline accelerated moves we need to wait in the fallback path.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Wait for idle before moving the BO in all drivers implementing
an accelerated move function.

This should keep the current behavior when removing the pre move wait.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

It changes the way to skip newline character and also avoids
warning message from some compiler.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

The soft pptable was used for re-uploading pptable as cache, but since
previous commits, the generic codes for uploading pptable are used and
backend is released during resetting powerplay. So it becomes redundance.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Due to uploading pptable implementation changed, the generic codes in
previous commit have been used intead of the Asic specific codes.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>