1. 27 1月, 2015 5 次提交
  2. 13 1月, 2015 5 次提交
    • M
      drm/i915: Drop unused position fields (v2) · 53a366b9
      Matt Roper 提交于
      The userspace-requested plane coordinates are now always available via
      plane->state.base (and the i915-adjusted values are stored in
      plane->state), so we no longer use the coordinate fields in intel_plane
      and can drop them.
      
      Also, note that the error case for pageflip calls update_plane() to
      program the values from plane->state; it's simpler to just call
      intel_plane_restore() which does the same thing.
      
      v2: Replace manual update_plane() with intel_plane_restore() in pageflip
          error handler.
      
      Reviewed-by(v1): Bob Paauwe <bob.j.paauwe@intel.com>
      Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      53a366b9
    • M
      drm/i915: Move to atomic plane helpers (v9) · ea2c67bb
      Matt Roper 提交于
      Switch plane handling to use the atomic plane helpers.  This means that
      rather than provide our own implementations of .update_plane() and
      .disable_plane(), we expose the lower-level check/prepare/commit/cleanup
      entrypoints and let the DRM core implement update/disable for us using
      those entrypoints.
      
      The other main change that falls out of this patch is that our
      drm_plane's will now always have a valid plane->state that contains the
      relevant plane state (initial state is allocated at plane creation).
      The base drm_plane_state pointed to holds the requested source/dest
      coordinates, and the subclassed intel_plane_state holds the adjusted
      values that our driver actually uses.
      
      v2:
       - Renamed file from intel_atomic.c to intel_atomic_plane.c (Daniel)
       - Fix a copy/paste comment mistake (Bob)
      
      v3:
       - Use prepare/cleanup functions that we've already factored out
       - Use newly refactored pre_commit/commit/post_commit to avoid sleeping
         during vblank evasion
      
      v4:
       - Rebase to latest di-nightly requires adding an 'old_state' parameter
         to atomic_update;
      
      v5:
       - Must have botched a rebase somewhere and lost some work.  Restore
         state 'dirty' flag to let begin/end code know which planes to
         run the pre_commit/post_commit hooks for.  This would have actually
         shown up as broken in the next commit rather than this one.
      
      v6:
       - Squash kerneldoc patch into this one.
       - Previous patches have now already taken care of most of the
         infrastructure that used to be in this patch.  All we're adding here
         now is some thin wrappers.
      
      v7:
       - Check return of intel_plane_duplicate_state() for allocation
         failures.
      
      v8:
       - Drop unused drm_plane_state -> intel_plane_state cast.  (Ander)
       - Squash in actual transition to plane helpers.  Significant
         refactoring earlier in the patchset has made the combined
         prep+transition much easier to swallow than it was in earlier
         iterations. (Ander)
      
      v9:
       - s/track_fbs/disabled_planes/ in the atomic crtc flags.  The only fb's
         we need to update frontbuffer tracking for are those on a plane about
         to be disabled (since the atomic helpers never call prepare_fb() when
         disabling a plane), so the new name more accurately describes what
         we're actually tracking.
      
      Testcase: igt/kms_plane
      Testcase: igt/kms_universal_plane
      Testcase: igt/kms_cursor_crc
      Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: NAnder Conselvan de Oliveira <conselvan2@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      ea2c67bb
    • M
      drm/i915: Clarify sprite plane function names (v4) · 4a3b8769
      Matt Roper 提交于
      A few of the sprite-related function names in i915 are very similar
      (e.g., intel_enable_planes() vs intel_crtc_enable_planes()) and don't
      make it clear whether they only operate on sprite planes, or whether
      they also apply to all universal plane types.  Rename a few functions to
      be more consistent with our function naming for primary/cursor planes or
      to clarify that they apply specifically to sprite planes:
      
       - s/intel_disable_planes/intel_disable_sprite_planes/
       - s/intel_enable_planes/intel_enable_sprite_planes/
      
      Also, drop the sprite-specific intel_destroy_plane() and just use
      the type-agnostic intel_plane_destroy() function.  The extra 'disable'
      call that intel_destroy_plane() did is unnecessary since the plane will
      already be disabled due to framebuffer destruction by the point it gets
      called.
      
      v2: Earlier consolidation patches have reduced the number of functions
          we need to rename here.
      
      v3: Also rename intel_plane_funcs vtable to intel_sprite_plane_funcs
          for consistency with primary/cursor.  (Ander)
      
      v4: Convert comment for intel_plane_destroy() to kerneldoc now that it
          is no longer a static function.  (Ander)
      
      Reviewed-by(v1): Bob Paauwe <bob.j.paauwe@intel.com>
      Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: NAnder Conselvan de Oliveira <conselvan2@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      4a3b8769
    • M
      drm/i915: Move vblank evasion to commit (v4) · c34c9ee4
      Matt Roper 提交于
      Move the vblank evasion up from the low-level, hw-specific
      update_plane() handlers to the general plane commit operation.
      Everything inside commit should now be non-sleeping, so this brings us
      closer to how vblank evasion will behave once we move over to atomic.
      
      v2:
       - Restore lost intel_crtc->active check on vblank evasion
      
      v3:
       - Replace assert_pipe_enabled() in intel_disable_primary_hw_plane()
         with an intel_crtc->active test; it turns out assert_pipe_enabled()
         grabs some mutexes and can sleep, which we can't do with interrupts
         disabled.
      
      v4:
       - Equivalent to v2; v3 change is now squashed into an earlier patch
         of the series.  (Ander).
      Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: NAnder Conselvan de Oliveira <conselvan2@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      c34c9ee4
    • M
      drm/i915: Refactor work that can sleep out of commit (v7) · 32b7eeec
      Matt Roper 提交于
      Once we integrate our work into the atomic pipeline, plane commit
      operations will need to happen with interrupts disabled, due to vblank
      evasion.  Our commit functions today include sleepable work, so those
      operations need to be split out and run either before or after the
      atomic register programming.
      
      The solution here calculates which of those operations will need to be
      performed during the 'check' phase and sets flags in an intel_crtc
      sub-struct.  New intel_begin_crtc_commit() and
      intel_finish_crtc_commit() functions are added before and after the
      actual register programming; these will eventually be called from the
      atomic plane helper's .atomic_begin() and .atomic_end() entrypoints.
      
      v2: Fix broken sprite code split
      
      v3: Make the pre/post commit work crtc-based to match how we eventually
          want this to be called from the atomic plane helpers.
      
      v4: Some platforms that haven't had their watermark code reworked were
          waiting for vblank, then calling update_sprite_watermarks in their
          platform-specific disable code.  These also need to be flagged out
          of the critical section.
      
      v5: Sprite plane test for primary show/hide should just set the flag to
          wait for pending flips, not actually perform the wait.  (Ander)
      
      v6:
       - Rebase onto latest di-nightly; picks up an important runtime PM fix.
       - Handle 'wait_for_flips' flag in intel_begin_crtc_commit(). (Ander)
       - Use wait_for_flips flag for primary plane update rather than
         performing the wait in the check routine.
       - Added kerneldoc to pre_disable/post_enable functions that are no
         longer static.  (Ander)
       - Replace assert_pipe_enabled() in intel_disable_primary_hw_plane()
         with an intel_crtc->active test; it turns out assert_pipe_enabled()
         grabs some mutexes and can sleep, which we can't do with interrupts
         disabled.
      
      v7:
       - Check for fb != NULL when deciding whether the sprite plane hides the
         primary plane during a sprite update.  (PRTS)
      Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: NAnder Conselvan de Oliveira <conselvan2@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      32b7eeec
  3. 11 12月, 2014 1 次提交
  4. 06 12月, 2014 5 次提交
  5. 14 11月, 2014 1 次提交
    • P
      drm/i915: use the correct obj when preparing the sprite plane · b8bbac1d
      Paulo Zanoni 提交于
      Commit "drm/i915: create a prepare phase for sprite plane updates"
      changed the old_obj pointer we use when committing sprite planes,
      which caused a WARN() and a BUG() to be triggered. Later, commit
      "drm/i915: use intel_fb_obj() macros to assign gem objects" introduced
      the same problem to function intel_commit_sprite_plane().
      
      Regression introduced by:
          commit ec82cb793c9224e0692eed904f43490cf70e8258
          Author: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
          Date:   Fri Oct 24 14:51:32 2014 +0100
              drm/i915: create a prepare phase for sprite plane updates
      and:
          commit 77cde952
          Author: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
          Date:   Fri Oct 24 14:51:33 2014 +0100
              drm/i915: use intel_fb_obj() macros to assign gem objects
      
      Credits to Imre Deak for pointing out the exact lines that were wrong.
      
      v2: Also fix intel_commit_sprite_plane() (Ville)
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85634
      Testcase: igt/pm_rpm/legacy-planes
      Testcase: igt/pm_rpm/legacy-planes-dpms
      Testcase: igt/pm_rpm/universal-planes
      Testcase: igt/pm_rpm/universal-planes-dpms
      Credits-to: Imre Deak <imre.deak@intel.com>
      Cc: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      b8bbac1d
  6. 08 11月, 2014 4 次提交
  7. 05 11月, 2014 4 次提交
  8. 24 10月, 2014 1 次提交
  9. 24 9月, 2014 1 次提交
  10. 19 9月, 2014 3 次提交
  11. 03 9月, 2014 3 次提交
    • D
      drm/i915: init sprites with univeral plane init function · 8fe8a3fe
      Derek Foreman 提交于
      Really just for completeness - old init function ends up making the plane
      exactly the same way due to the way the enums are set up.
      Signed-off-by: NDerek Foreman <derek.foreman@collabora.co.uk>
      Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
      Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      8fe8a3fe
    • V
      drm/i915: Don't call intel_plane_restore() when the prop value didn't change · 09dba00c
      Ville Syrjälä 提交于
      No point in calling intel_plane_restore() in .set_property() if the
      value didn't change.
      
      More importantly this papers over a bug where the current primary plane
      code forgets to update the user coordinates we store under intel_plane
      unless the primary plane .update_plane() hook is actually called. This
      means we have 0 in the coordinates straight after boot and any call
      to intel_restore_plane() (such as from restore_fbdev_mode()) will
      actually turn off the primary plane. This mess needs to be fixed properly
      but that's a bigger task and the first step there is killing off
      intel_pipe_set_base() and just calling the primary plane
      .update_plane() hook. For the immediate problem of black screen after
      boot this small patch is enough to hide it.
      
      The problem originates from these two commits:
       commit 3a5f87c2
       Author: Thomas Wood <thomas.wood@intel.com>
       Date:   Wed Aug 20 14:45:00 2014 +0100
      
          drm: fix plane rotation when restoring fbdev configuration
      
       commit d91a2cb8e5104233c02bbde539bd4ee455ec12ac
       Author: Sonika Jindal <sonika.jindal@intel.com>
       Date:   Fri Aug 22 14:06:04 2014 +0530
      
          drm/i915: Add 180 degree primary plane rotation support
      
      Cc: Thomas Wood <thomas.wood@intel.com>
      Cc: Sonika Jindal <sonika.jindal@intel.com>
      Tested-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
      Tested-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      09dba00c
    • S
      drm/i915: Add 180 degree primary plane rotation support · 48404c1e
      Sonika Jindal 提交于
      Primary planes support 180 degree rotation. Expose the feature
      through rotation drm property.
      
      v2: Calculating linear/tiled offsets based on pipe source width and
      height. Added 180 degree rotation support in ironlake_update_plane.
      
      v3: Checking if CRTC is active before issueing update_plane. Added
      wait for vblank to make sure we dont overtake page flips. Disabling
      FBC since it does not work with rotated planes.
      
      v4: Updated rotation checks for pending flips, fbc disable. Creating
      rotation property only for Gen4 onwards. Property resetting as part
      of lastclose.
      
      v5: Resetting property in i915_driver_lastclose properly for planes
      and crtcs. Fixed linear offset calculation that was off by 1 w.r.t
      width in i9xx_update_plane and ironlake_update_plane. Removed tab
      based indentation and unnecessary braces in intel_crtc_set_property
      and intel_update_fbc. FBC and flip related checks should be done only
      for valid crtcs.
      
      v6: Minor nits in FBC disable checks for comments in intel_crtc_set_property
      and positioning the disable code in intel_update_fbc.
      
      v7: In case rotation property on inactive crtc is updated, we return
      successfully printing debug log as crtc is inactive and only property change
      is preserved.
      
      v8: update_plane is changed to update_primary_plane, crtc->fb is changed to
      crtc->primary->fb  and return value of update_primary_plane is ignored.
      
      v9: added rotation property to primary plane instead of crtc. Removing reset
      of rotation property from lastclose. rotation_property is moved to
      drm_mode_config, so drm layer will take care of resetting. Adding updation of
      fbc when rotation is set to 0. Allowing rotation only if value is
      different than old one.
      
      v10: Calling intel_primary_plane_setplane instead of update_primary_plane in
      set_property(Daniel).
      
      v11: Using same set_property function for both primary and sprite, Adding
      primary plane specific code in the same function (Matt).
      
      v12: Removing disabling/ enabling of fbc from set_property because it is done
      from intel_pipe_set_base. Other formatting
      
      v13: we need to call disable_fbc before changing the rotation to 180,
      disable_fbc from intel_pipe_set_base gets called very late, that will
      be used to re-enable fbc if rotation is set to 0 (Ville).
      
      Testcase: igt/kms_rotation_crc
      Signed-off-by: NUma Shankar <uma.shankar@intel.com>
      Signed-off-by: NSagar Kamble <sagar.a.kamble@intel.com>
      Signed-off-by: NSonika Jindal <sonika.jindal@intel.com>
      [danvet: Add FIXME to explain why we need the open-coded update_fbc
      hunk to disable fbc when rotated 180 degree. And make checkpatch
      happier.]
      Acked-by: NMatt Roper <matthew.d.roper@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      48404c1e
  12. 08 8月, 2014 4 次提交
  13. 23 7月, 2014 1 次提交
  14. 18 7月, 2014 1 次提交
  15. 27 6月, 2014 1 次提交
    • V
      drm/i915: Wait for vblank after enabling the primary plane on BDW · 33c3b0d1
      Ville Syrjälä 提交于
      BDW signals the flip done interrupt immediately after the DSPSURF write
      when the plane is disabled. This is true even if we've already armed
      DSPCNTR to enable the plane at the next vblank. This causes major
      problems for our page flip code which relies on the flip done interrupts
      happening at vblank time.
      
      So what happens is that we enable the plane, and immediately allow
      userspace to submit a page flip. If the plane is still in the process
      of being enabled when the page flip is issued, the flip done gets
      signalled immediately. Our DSPSURFLIVE check catches this to prevent
      premature flip completion, but it also means that we don't get a flip
      done interrupt when the plane actually gets enabled, and so the page
      flip is never completed.
      
      Work around this by re-introducing blocking vblank waits on BDW
      whenever we enable the primary plane.
      
      I removed some of the vblank waits here:
       commit 6304cd91
       Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
       Date:   Fri Apr 25 13:30:12 2014 +0300
      
          drm/i915: Drop the excessive vblank waits from modeset codepaths
      
      To avoid these blocking vblank waits we should start using the vblank
      interrupt instead of the flip done interrupt to complete page flips.
      But that's material for another patch.
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79354Tested-by: NGuo Jinxian <jinxianx.guo@intel.com>
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      33c3b0d1