- 21 12月, 2017 1 次提交
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由 Gregory CLEMENT 提交于
Add the cpu frequency scaling support for Armada 37xx by default, this should allow a better coverage in kernel continuous integration tests. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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- 30 10月, 2017 1 次提交
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由 Masahiro Yamada 提交于
Enable the GPIO controller driver used for UniPhier SoC family. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 20 10月, 2017 2 次提交
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由 Nicolas Dechesne 提交于
Enable QCOM IOMMU driver for 'B' family devices, such as APQ8016 found on the Dragonboard 410c. With this change, graphics console and GPU are working fine (using mesa/freedreno for GPU driver). Signed-off-by: NNicolas Dechesne <nicolas.dechesne@linaro.org> Acked-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Robin Murphy 提交于
ThunderX needs its PCI host drivers to do anything useful, and it's probably helpful to have networking by default too. Signed-off-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 19 10月, 2017 1 次提交
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由 Tuomas Tynkkynen 提交于
The driver has supported the 64-bit Tegra210 for a while now, so enable it in the defconfig. Signed-off-by: NTuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 17 10月, 2017 1 次提交
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由 Alex Elder 提交于
Stephen Boyd reworked some Qualcomm USB code earlier this year. The result requires a few different config options to be enabled in order for the USB on the DragonBoard 410c to continue working, but these were never added to arm64 "defconfig". As a result, USB on that board stopped working during the v4.13-rc1 merge window. Re-enable this functionality by setting the needed config options in the arm64 "defconfig" file. Signed-off-by: NAlex Elder <elder@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
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- 12 10月, 2017 2 次提交
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由 Gregory CLEMENT 提交于
The Armada 38x RTC driver supports also the RTC controller found on the Armada 7K/8K SoCs, so enable it. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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由 Nicolas Dechesne 提交于
Enable QCOM IOMMU driver for 'B' family devices, such as APQ8016 found on the Dragonboard 410c. With this change, graphics console and GPU are working fine (using mesa/freedreno for GPU driver). Signed-off-by: NNicolas Dechesne <nicolas.dechesne@linaro.org> Acked-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
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- 10 10月, 2017 1 次提交
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由 Kefeng Wang 提交于
Enable DRM_HISI_HIBMC as module for Hisilicon D03/D05 board. Signed-off-by: NKefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
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- 27 9月, 2017 1 次提交
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由 Gregory CLEMENT 提交于
The PXA3xx NAND driver supports also the NAND controller found on the Armada 7K/8K SoCs, so enable it. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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- 25 9月, 2017 1 次提交
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由 Sergei Shtylyov 提交于
Enable the Renesas R-Car V3M (R8A77970) SoC in the ARM64 defconfig. Suggested-by: NSimon Horman <horms@verge.net.au> Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 20 9月, 2017 2 次提交
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由 Miquel Raynal 提交于
The comphy is an hardware block giving access to common PHYs that can be used by various other engines (Network, SATA, ...). This is used on Marvell 7k/8k platforms for now. Enable the corresponding driver. Signed-off-by: NMiquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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由 Antoine Tenart 提交于
The Marvell 10G PHY is present on mvebu platforms. Enable it as a module so that the network works on these platforms. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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- 19 9月, 2017 1 次提交
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由 Wolfram Sang 提交于
We want this driver to detect critical temperatures in time. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 18 9月, 2017 1 次提交
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由 Geert Uytterhoeven 提交于
Enable support for the Renesas R-Car D3 SoC. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 30 8月, 2017 1 次提交
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由 Heiko Stuebner 提交于
Enable the graphics-related options needed by Rockchip boards. This includes the pwm-backlight which will be needed by the internal displays used on Gru Chrome-devices. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Reviewed-by: NMark yao <mark.yao@rock-chips.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 19 8月, 2017 1 次提交
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由 Abhishek Sahu 提交于
These configs are required for booting kernel in QCOM IPQ8074 boards. Signed-off-by: NAbhishek Sahu <absahu@codeaurora.org> Signed-off-by: NVaradarajan Narayanan <varada@codeaurora.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
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- 16 8月, 2017 4 次提交
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由 Markus Mayer 提交于
Turn on CONFIG_BRCMSTB_THERMAL as module. Signed-off-by: NMarkus Mayer <mmayer@broadcom.com> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
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由 Ard Biesheuvel 提交于
Add the arm64 crypto drivers that have been added over the past couple of kernel releases to its defconfig as modules. Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Keiji Hayashibara 提交于
Enable the watchdog driver for UniPhier SoC Signed-off-by: NKeiji Hayashibara <hayashibara.keiji@socionext.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Viresh Kumar 提交于
commit cee22a15 ("workqueues: Introduce new flag WQ_POWER_EFFICIENT for power oriented workqueues") introduced the concept of power efficient workqueues (4 years back), but it was never enabled in upstream kernel configs. Power efficient workqueues are simply marked as "unbound," so that jobs queued to them can run on any CPU in the system. It leaves the target CPU selection to the scheduler, which is the best place for such decision making. This improves power efficiency for workqueues which are otherwise pinned to a CPU. Enable it for ARM64 platforms as ARM platforms were the main target for the introduction of power efficient workqueues. Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 14 8月, 2017 9 次提交
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由 Wang Ruyi 提交于
enable DMA driver for hi3660. Signed-off-by: NWang Ruyi <wangruyi@huawei.com> Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
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由 Victor Chong 提交于
This patch enables configs for Trusted Execution Environment (TEE) and OP-TEE. +CONFIG_TEE=y +CONFIG_OPTEE=y Signed-off-by: NVictor Chong <victor.chong@linaro.org> Signed-off-by: NGuodong Xu <guodong.xu@linaro.org> Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
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由 Guodong Xu 提交于
This patch enables these configs: +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y As example, a bluetooth device connected to UART port can be supported by this. Signed-off-by: NGuodong Xu <guodong.xu@linaro.org> Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
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由 Guodong Xu 提交于
Enable CONFIG_SYSCON_REBOOT_MODE Signed-off-by: NGuodong Xu <guodong.xu@linaro.org> Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
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由 Guodong Xu 提交于
Enable configs for hi6421v530 mfd and regulator driver + CONFIG_MFD_HI6421_PMIC=y + CONFIG_REGULATOR_HI6421V530=y Signed-off-by: NGuodong Xu <guodong.xu@linaro.org> Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
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由 Xiaowei Song 提交于
Enable HiSilicon Kirin series SoCs PCIe controllers Signed-off-by: NGuodong Xu <guodong.xu@linaro.org> Signed-off-by: NXiaowei Song <songxiaowei@hisilicon.com> Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
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由 John Garry 提交于
Enable HiSilicon SAS controller based on PCI device, which is included in hip08 SoC. Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
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由 Jagan Teki 提交于
The Allwinner A64 SoC is paired with the X-Powers AXP803 PMIC over the Reduced Serial Bus (RSB). The regulators of this PMIC supply all power rails of the SoC and many external peripherals. Enable the driver for the regulators of this PMIC. Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> [wens@csie.org: refined commit message] Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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由 Jagan Teki 提交于
The Allwinner A64 SoC is paired with the X-Powers AXP803 PMIC over the Reduced Serial Bus (RSB). Enable the driver for this PMIC. Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> [wens@csie.org: Refined commit message] Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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- 12 8月, 2017 1 次提交
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由 David Wu 提交于
Make the rockchip PHY driver built into the kernel. Signed-off-by: NDavid Wu <david.wu@rock-chips.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 8月, 2017 1 次提交
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由 Marcin Wojtas 提交于
Tests showed, that under certain conditions, the summary number of jiffies spent on softirq/idle, which are counted by system statistics can be even below 10% of expected value, resulting in false load presentation. The issue was observed on the quad-core Marvell Armada 8k SoC, whose two 10G ports were bound into L2 bridge. Load was controlled by bidirectional UDP traffic, produced by a packet generator. Under such condition, the dominant load is softirq. With 100% single CPU occupation or without any activity (all CPUs 100% idle), total number of jiffies is 10000 (2500 per each core) in 10s interval. Also with other kind of load this was true. However below a saturation threshold it was observed, that with CPU which was occupied almost by softirqs only, the statistic were awkward. See the mpstat output: CPU %usr %nice %sys %iowait %irq %soft %steal %guest %gnice %idle all 0.00 0.00 0.13 0.00 0.00 0.55 0.00 0.00 0.00 99.32 0 0.00 0.00 0.00 0.00 0.00 23.08 0.00 0.00 0.00 76.92 1 0.00 0.00 0.40 0.00 0.00 0.00 0.00 0.00 0.00 99.60 2 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 100.00 3 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 100.00 Above would mean basically no total load, debug CPU0 occupied in 25%. Raw statistics, printed every 10s from /proc/stat unveiled a root cause - summary idle/softirq jiffies on loaded CPU were below 200, i.e. over 90% samples lost. All problems were gone after enabling fine granulity IRQ time accounting. This patch fixes possible wrong statistics processing by enabling CONFIG_IRQ_TIME_ACCOUNTING for arm64 platfroms, which is by default done on other architectures, e.g. x86 and arm. Tests showed no noticeable performance penalty, nor stability impact. Signed-off-by: NMarcin Wojtas <mw@semihalf.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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- 28 7月, 2017 1 次提交
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由 Georgi Djakov 提交于
The hardware spinlock drivers now depend on HWSPINLOCK (instead of selecting it), so we need to explicitly enable it after commit 35fc8a07 ("Make HWSPINLOCK a menuconfig to ease disabling") Without HWSPINLOCK, various drivers are left with unsatisfied dependencies and Qcom boards using shared memory based communication to request regulators are failing to boot and mount rootfs. Fix this by explicitly enabling HWSPINLOCK in defconfig. Signed-off-by: NGeorgi Djakov <georgi.djakov@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
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- 27 7月, 2017 1 次提交
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由 Kuninori Morimoto 提交于
Compile the renesas sound and ak4613 drivers as modules to reduce the ARM64 kernel size. These modules are currently only used by Renesas platforms so there should little risk of negative impact of this change on other users. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> [simon: consolidated two patches into one] Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 18 7月, 2017 1 次提交
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由 Thomas Petazzoni 提交于
This commit enables the nop-xceiv PHY driver, which is needed for USB support to work on the MacchiatoBin platform (Marvell Armada 8K). Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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- 02 7月, 2017 1 次提交
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由 Maxime Ripard 提交于
This reverts commits 2c0cba48 ("arm: sun8i: sunxi-h3-h5: Add dt node for the syscon control module") to 2428fd0f ("arm64: defconfig: Enable dwmac-sun8i driver on defconfig") and 3432a86e ("arm: sun8i: orangepipc: use internal phy-mode") to 5a79b4f2 ("arm: sun8i: orangepi-2: use internal phy-mode") that should be merged through the arm-soc tree, and end up in merge conflicts and build failures. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 26 6月, 2017 1 次提交
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由 Arnd Bergmann 提交于
This fixes a warning: warning: override: reassigning to symbol SPI_MESON_SPIFC Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 23 6月, 2017 3 次提交
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由 Timur Tabi 提交于
The EMAC is present on Qualcomm Technologies' server and some mobile chips, and is used as the primary Ethernet interface. Systems that have these SOCs typically have an Atheros 803x or Marvell 88e1111 PHY in them, so enable those drivers too. Signed-off-by: NTimur Tabi <timur@codeaurora.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Timur Tabi 提交于
Now that the drivers are available, enable support for L2 and L3 performance monitoring Qualcomm Datacenter Technologies Centriq SoCs. These PMU drivers provide support for performance optimization. Signed-off-by: NTimur Tabi <timur@codeaurora.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Timur Tabi 提交于
Enable EDAC (Error Detection and Correction) support for ARM64 server systems that feature it, so that user space applications can be notified of memory errors. Signed-off-by: NTimur Tabi <timur@codeaurora.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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