1. 03 6月, 2013 4 次提交
  2. 22 5月, 2013 1 次提交
  3. 17 5月, 2013 1 次提交
  4. 09 5月, 2013 1 次提交
    • S
      KVM/MIPS32: Binary patching of select privileged instructions. · 50c83085
      Sanjay Lal 提交于
      Currently, the following instructions are translated:
      - CACHE (indexed)
      - CACHE (va based): translated to a SYNCI, overkill on D-CACHE operations,
        but still much faster than a trap.
      - mfc0/mtc0: the virtual COP0 registers for the guest are implemented as
        2-D array.
        [COP#][SEL] and this is mapped into the guest kernel address space @ VA 0x0.
        mfc0/mtc0 operations are transformed to load/stores.
      Signed-off-by: NSanjay Lal <sanjayl@kymasys.com>
      Cc: kvm@vger.kernel.org
      Cc: linux-mips@linux-mips.org
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      50c83085
  5. 08 5月, 2013 9 次提交