1. 11 5月, 2012 3 次提交
    • L
      ARM: ux500: switch over to Nomadik pinctrl driver · ed781d39
      Linus Walleij 提交于
      This converts the Ux500 family to use the pinctrl driver for
      configuring pins.
      Acked-by: NStephen Warren <swarren@wwwdotorg.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      ed781d39
    • L
      pinctrl/nomadik: implement pin configuration · d41af627
      Linus Walleij 提交于
      This implements the pin configuration interface for the
      Nomadik pin controller.
      
      As part of the exercise we add a bit in the pin_cfg_t for
      the Nomadik pinctrl driver that indicates if the pin should
      be forced into GPIO mode. This is not done to go behind the
      back of the GPIO subsystem, but to ensure that default modes
      can be set by hogs on boot and system suspend/resume states.
      It was used implicitly by the old code defining all config
      settings and modes in a single config word but we now have
      a split between pinmux and pinconf leading to the need to
      have this.
      
      We also add a bit for explicitly setting sleepmode of the
      pin. This was previously handled by custom calls with the
      _sleep() suffix, but we now have one single interface into
      the configuration so we replace this with a bit indicating
      that the pin shall be configured into sleep mode.
      
      Some of the configuration can be refactored later to use
      less custom fields on the pin_cfg_t but we are currently
      leaving the old function calls in place so we stay
      compatible.
      
      ChangeLog v1->v2:
      - Drop a hunk changing pinmuxing for GPIO and move it
        over to the preceding pinmux patch.
      Acked-by: NStephen Warren <swarren@wwwdotorg.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      d41af627
    • L
      pinctrl/nomadik: basic Nomadik pinctrl interface · e98ea774
      Linus Walleij 提交于
      This adds a scratch pin control interface to the Nomadik pinctrl
      driver, and defines the pins and groups in the DB8500 ASIC. We
      define GPIO ranges to cover the pins exposed. The DB8500 has
      more pins than this but we restrict the driver to the pins that
      can be controlled from the combined GPIO and pin control hardware
      to begin with.
      
      ChangeLog v1->v2:
      - Base on the latest pinctrl development from
        pinctrl-mergebase-20120418 so we can get rid of legacy
        group count mechanism. Also drop the range checks for group
        index, this is handled by the core now.
      Acked-by: NStephen Warren <swarren@wwwdotorg.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      e98ea774
  2. 24 4月, 2012 7 次提交
  3. 23 4月, 2012 1 次提交
  4. 19 4月, 2012 1 次提交
    • P
      ARM: bcmring: fix UART declarations · 888073d4
      Paul Gortmaker 提交于
      This error appeared in the bcmring_defconfig build:
      
        CC      arch/arm/mach-bcmring/core.o
      arch/arm/mach-bcmring/core.c:55: error: macro "AMBA_APB_DEVICE" requires 6 arguments, but only 5 given
      arch/arm/mach-bcmring/core.c:55: warning: type defaults to 'int' in declaration of 'AMBA_APB_DEVICE'
      arch/arm/mach-bcmring/core.c:56: error: macro "AMBA_APB_DEVICE" requires 6 arguments, but only 5 given
      arch/arm/mach-bcmring/core.c:56: warning: type defaults to 'int' in declaration of 'AMBA_APB_DEVICE'
      arch/arm/mach-bcmring/core.c:134: error: 'uartA_device' undeclared here (not in a function)
      arch/arm/mach-bcmring/core.c:135: error: 'uartB_device' undeclared here (not in a function)
      make[2]: *** [arch/arm/mach-bcmring/core.o] Error 1
      
      It appeared as of commit 8ede1ae6
      
          "ARM: amba: bcmring: use common amba device initializers"
      
      Note that in include/linux/amba/bus.h we have:
         #define AMBA_APB_DEVICE(name, busid, id, base, irqs, data) ...
      
      There is an a --> A case error in the busid and a missing zero
      placeholder for the id field.
      
      Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
      [olof: reworded patch subject]
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      888073d4
  5. 18 4月, 2012 7 次提交
    • R
      ARM: imx: Fix imx5 idle logic bug · 4659b7f1
      Robert Lee 提交于
      The imx5_idle() check of the tzic_eanble_wake() return value uses
      incorrect (inverted) logic causing all attempt to idle to fail.
      Signed-off-by: NRobert Lee <rob.lee@linaro.org>
      Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
      4659b7f1
    • F
      ARM: imx27-dt: Fix build due to removal of irq_domain_add_simple() · de1de159
      Fabio Estevam 提交于
      commit 6b783f7c (irq_domain: Remove irq_domain_add_simple()
      replaced irq_domain_add_simple with irq_domain_add_legacy()
      
      Implement this conversion so that imx27-dt can be built again.
      Reported-by: NChris Ball <cjb@laptop.org>
      Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
      Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
      de1de159
    • F
      ARM: imx_v4_v5_defconfig: Add support for CONFIG_REGULATOR_FIXED_VOLTAGE · 9fd4a50a
      Fabio Estevam 提交于
      Add support for CONFIG_REGULATOR_FIXED_VOLTAGE.
      
      Without this option the mx27_3ds cannot have the external Ethernet functional
      due to the need of smsc regulators.
      Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
      Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
      9fd4a50a
    • P
      ARM: OMAP1: DMTIMER: fix broken timer clock source selection · 6aaec67d
      Paul Walmsley 提交于
      DMTIMER source selection on OMAP1 is broken.  omap1_dm_timer_set_src()
      tries to use __raw_{read,write}l() to read from and write to physical
      addresses, but those functions take virtual addresses.
      
      sparse caught this:
      
      arch/arm/mach-omap1/timer.c:50:13: warning: incorrect type in argument 1 (different base types)
      arch/arm/mach-omap1/timer.c:50:13:    expected void const volatile [noderef] <asn:2>*<noident>
      arch/arm/mach-omap1/timer.c:50:13:    got unsigned int
      arch/arm/mach-omap1/timer.c:52:9: warning: incorrect type in argument 1 (different base types)
      arch/arm/mach-omap1/timer.c:52:9:    expected void const volatile [noderef] <asn:2>*<noident>
      arch/arm/mach-omap1/timer.c:52:9:    got unsigned int
      
      Fix by using omap_{read,writel}(), just like the other users of the
      MOD_CONF_CTRL_1 register in the OMAP1 codebase.  Of course, in the long term,
      removing omap_{read,write}l() is the appropriate thing to do; but
      this will take some work to do this cleanly.
      
      Looks like this was caused by 97933d6c (ARM: OMAP1: dmtimer: conversion
      to platform devices) that dangerously moved code and changed it in
      the same patch.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
      Cc: stable@vger.kernel.org
      [tony@atomide.com: updated comments to include the breaking commit]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      6aaec67d
    • S
      ARM: OMAP: serial: Fix the ocp smart idlemode handling bug · 5ae256dc
      Santosh Shilimkar 提交于
      The current serial UART code, while fidling with ocp idlemode bits,
      forget about the smart idle wakeup bit even if it is supported by
      UART IP block. This will lead to missing the module wakeup on OMAP's
      where the smart idle wakeup is supported.
      
      This was the root cause of the console sluggishness issue, I have been
      observing on OMAP4 devices and also can be potential reason for some
      other UART wakeup issues.
      Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      Acked-by: NKevin Hilman <khilman@ti.com>
      Acked-by: NGovindraj.R <govindraj.raja@ti.com>
      Reviewed-by: NPaul Walmsley <paul@pwsan.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      5ae256dc
    • G
      ARM: OMAP2+: UART: Fix incorrect population of default uart pads · bce492c0
      Govindraj.R 提交于
      Commit (7496ba30  ARM: OMAP2+: UART: Add default mux for all uarts)
      wrongly added muxing of default pads for all uarts. This causes
      breakage on multiple boards using uart pins for alternate functions.
      
      For example, on zoom3 random oopses can be seen with nfsroot as
      the smsc911x ethernet FIFO timings on GPMC bus are controlled
      by gpmc_wait2 and gpmc_wait3 pins. This means we can't mux these
      pads to uart4 functionality as commit 7496ba30 was doing.
      
      Not all boards tend to use all uarts and most of unused uart pins
      are muxed for other purpose. This commit breaks the modules which
      where trying to use unused uart pins on their boards.
      
      So remove the default pad muxing. Note that this is not a complete
      fix, as we now rely on bootloader set muxing for the uart wake-up
      events. Further patching is needed to enable wake-up events for
      uarts that are already muxed to uart mode.
      
      Cc: Felipe Balbi <balbi@ti.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Acked-by: NRuss Dill <russ.dill@gmail.com>
      Reported-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NGovindraj.R <govindraj.raja@ti.com>
      [tony@atomide.com: updated comments to describe oops on zoom3]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      bce492c0
    • G
      ARM: OMAP: sram: fix BUG in dpll code for !PM case · 63878acf
      Grazvydas Ignotas 提交于
      _omap3_sram_configure_core_dpll is called when SDRC is reprogrammed,
      which is done regardless of CONFIG_PM setting, so we always need it's
      setup code too. Without this, we hit a BUG() on OMAP3 when kernel is
      built without CONFIG_PM:
      
      Reprogramming SDRC clock to 332000000 Hz
      ------------[ cut here ]------------
      kernel BUG at arch/arm/plat-omap/sram.c:342!
      Internal error: Oops - BUG: 0 [#1] ARM
      ...
      [<c001c694>] (omap3_configure_core_dpll+0x68/0x6c) from [<c001b2dc>] (omap3_core_dpll_m2_set_rate+0x1)
      [<c001b2dc>] (omap3_core_dpll_m2_set_rate+0x138/0x1b0) from [<c001a478>] (omap2_clk_set_rate+0x14/0x2)
      [<c001a478>] (omap2_clk_set_rate+0x14/0x20) from [<c001c9dc>] (clk_set_rate+0x54/0x74)
      [<c001c9dc>] (clk_set_rate+0x54/0x74) from [<c022b9c8>] (omap_sdrc_init+0x70/0x90)
      [<c022b9c8>] (omap_sdrc_init+0x70/0x90) from [<c022f178>] (omap3pandora_init+0x11c/0x164)
      [<c022f178>] (omap3pandora_init+0x11c/0x164) from [<c022849c>] (customize_machine+0x20/0x28)
      [<c022849c>] (customize_machine+0x20/0x28) from [<c0225810>] (do_one_initcall+0xa0/0x16c)
      [<c0225810>] (do_one_initcall+0xa0/0x16c) from [<c02259e0>] (kernel_init+0x104/0x1ac)
      [<c02259e0>] (kernel_init+0x104/0x1ac) from [<c0009cec>] (kernel_thread_exit+0x0/0x8)
      Signed-off-by: NGrazvydas Ignotas <notasas@gmail.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      63878acf
  6. 16 4月, 2012 15 次提交
  7. 15 4月, 2012 2 次提交
  8. 14 4月, 2012 4 次提交