As the DDR/IO and MMDC setting are different on LPDDR2 and DDR3,
we used cpu type to decide how to do these settings in suspend
before which is NOT flexible, take i.MX6SL for example, although
it has LPDDR2 on EVK board, but users can also use DDR3 on other
boards, so it is better to read the DDR type from MMDC then decide
how to do related settings.
Signed-off-by: NAnson Huang <b20788@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

Add more revision support for the new i.MX6DQ tape-out (TO1.5).  This
TO1.5 is the Rev 1.3 as documented in i.MX6DQ data sheet, because TO1.3
and TO1.4 are never revealed.
Signed-off-by: NJason Liu <r64343@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>

imx6q_pm_enter calls imx6sl_set_wait_clk when run on an imx6sl
based machine. However if support for imx6sl is not enabled
at compile time, this prevents us from building the kernel and
we get this link error instead:

arch/arm/mach-imx/built-in.o: In function `imx6q_pm_enter':
:(.text+0x4b84): undefined reference to `imx6sl_set_wait_clk'

This makes the cpu_is_imx6sl function conditionally return false
if imx6sl is disabled at compile-time, which matches what the
older cpu_is_mx* macros did. We have similar inline functions for
the other imx6 variants, but so far I have not run into a case
where the extra #ifdef is necessary.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

Add basic suppport for i.MX6 SoloX SoC.
Signed-off-by: NAnson Huang <b20788@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

The imx6sl low power mode implementation inherits imx6q/dl one,
and pm-imx6q.c can just work for imx6sl with some minor updates.
Let's enable imx6sl suspend support by reusing pm-imx6q.c and use
cpu_is_imxXX() to handle the those minor differences between imx6sl
and imx6q/dl.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The patch enables soc bus infrastructure and adds a function
imx_soc_device_init() to report soc info via soc device interface for
imx6qdl and imx6sl.  With the support, user space can get soc related
info by looking at sysfs like below.

  $ cat /sys/devices/soc0/machine
  Freescale i.MX6 Quad SABRE Smart Device Board
  $ cat /sys/devices/soc0/family
  Freescale i.MX
  $ cat /sys/devices/soc0/soc_id
  i.MX6Q
  $ cat /sys/devices/soc0/revision
  1.2
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The i.MX6 DualLite/Solo is another i.MX6 family SoC, which is highly
compatible with i.MX6 Quad/Dual.  And that's why we choose to support
it using imx6q code with cpu_is_imx6dl() check when necessary.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Only mx508 based board is mach-mx50_rdp and it has been marked as BROKEN
for several releases.

mx508 currently lacks clock support.

In case someone needs to add mx508 support back, then the recommended approach
is to use device tree.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

It moves a bunch of header files included in hardware.h and itself
from mach-imx/include/mach to mach-imx, and updates users to include
hardware.h rather than mach/hardware.h.  The files in mach-imx/devices
will need to include "../hardware.h".
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Acked-by: NArnd Bergmann <arnd@arndb.de>

It's really unnecessary to have plat-mxc, and let's merge it into
mach-imx.  It's pretty much just a bunch of file renaming and
Kconfig/Makefile merge.

To make the change less invasive, we keep using Kconfig symbol
CONFIG_ARCH_MXC for mach-imx sub-architecture.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Acked-by: NArnd Bergmann <arnd@arndb.de>

Two problems exist in the current i.MX5 pm suspend/resume and idle
functions. The first is the current i.MX5 suspend routine will call
tzic_enable_wake(1) to set wake source, this will set all enabled
irq as wake source rather than those wake capable. The second
is i.MX5 idle will call mx5_cpu_lp_set() to prepare enter low power
mode, but it forgets to call wfi instruction to enter this mode.

To fix these two problems, using generic irq chip pm interface and
modify function imx5_idle().

[Tested by Shawn Guo on imx51 babbage board.
 Tested by Hui Wang on imx51 pdk board.]
Signed-off-by: NHui Wang <jason77.wang@gmail.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Since commit (167a19d2: ARM: imx: Introduce generic function for displaying silicon revision)
we no longer need the chip revision strings, so remove them.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch adds an idle hook imx_idle to be called in arch_idle().
Any soc that needs a customized idle implementation other than
cpu_do_idle() can set up this hook in soc specific call.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

CONFIG_ARCH_* are deprecated, so remove one user.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

LAKML-Reference: 1302464943-20721-6-git-send-email-u.kleine-koenig@pengutronix.de
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Since support for mxc91231 was introduced 2009 it only saw patches that
were part of (mxc or arm) global cleanups. The only supported machine
only had 4 devices (2x UART, sdhc, watchdog).

Cc: Dmitriy Taychenachev <dimichxp@gmail.com>
LAKML-Reference: 1302211482-17926-1-git-send-email-u.kleine-koenig@pengutronix.de
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Implement code for MX51 that allows the SoC to enter WFI when
arch_idle is called.

This patch is also necessary for correctly suspending the system.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Having the silicon revision to appear on the boot log is a useful information.

MX31 and MX35 already show the silicon revision on boot.

Add support for displaying such information for MX51 as well.

Tested on a MX51EVK, where it shows:

CPU identified as i.MX51, silicon rev 3.0
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Move to SOC_SOC_IMX3X.
Leave ARCH_MX31/35 definitions there, in case some place prevent multi-soc
single image.
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Acked-by: NMarc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Move to SOC_SOC_IMX5X. Leave only places which prevent multi-soc
using ARCH_MX5X.
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add core definitions and memory map, gpio, irq, iomux, uart device
support.
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Instead of reading the silicon version from ROM, we should
read the SREV register from the IIM.

Freescale has dropped all support for MX51 REV1.0, only MX51
REV 2.0 and 3.0 are valid.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add iomux, clocks,  and memory map for Freescale's MX53 SoC.
Add cpu_is_mx53 function to common.h.
Add 3 more banks of gpio's to mxc_gpio_ports.
Add MX53 phys offset address.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Currently, only two operating points: 160Mhz and 800Mhz.
the operating points are tested on babbage 3.0
Signed-off-by: NYong Shen <yong.shen@linaro.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Prepare for i.MX5 SoC code by adding the relevant macros to common plat-mxc
code.
Signed-off-by: NAmit Kucheria <amit.kucheria@canonical.com>

This has the addional effect that the macros CSCR_U, CSCR_L and CSCR_A
are not used anymore in mach-pcm038.c and mach-qong.c.  These still use
the deprecated IO_ADDRESS macro and shouldn't be used in new code.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Holger Schurig <hs4233@mail.mn-solutions.de>
Cc: Dmitriy Taychenachev <dimichxp@gmail.com>

don't use

	IO_ADDRESS($base) + $offset

but

	IO_ADDRESS($base + $offset)
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Holger Schurig <hs4233@mail.mn-solutions.de>
Cc: Rabin Vincent <rabin@rab.in>
Cc: "Agustín Ferrín Pozuelo" <gatoguan-os@yahoo.com>
Cc: Javier Martin <javier.martin@vista-silicon.com>
Cc: Valentin Longchamp <valentin.longchamp@epfl.ch>
Cc: Daniel Mack <daniel@caiaq.de>
Cc: Dmitriy Taychenachev <dimichxp@gmail.com>

Signed-off-by: NDmitriy Taychenachev <dimichxp@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

We had hardcoded cpu_is_ macros for mxc architectures till now. As we
want to run the same kernel on i.MX31 and i.MX35 this patch adds cpu_is_
macros which expand to 0 or 1 if only one architecture is compiled in and
only check for the cpu type if more than one architecture is compiled
in.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

* define new CONFIG_ARCH_MX21 (this one is currently mutually exclusive to
  CONFIG_ARCH_MX27, but this might change)
* splits one header file. Memory definitions, interrupt sources,
  DMA channels are split into common part, i.MX27 specific and i.MX21
  specific.
* guard access to UART5/UART6, which don't exist on i.MX21
Signed-off-by: NHolger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

* adds Kconfig variables
* specifies different physical address for i.MX21 because of the
  different memory layouts
* disables support for UART5/UART6 in the i.MX serial driver
  (the i.MX21 doesn't have those modules)

Based on code from "Martin Fuzzey" <mfuzzey@gmail.com>
Signed-off-by: NHolger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This adds macros to get CSCR upper, lower and additional registers.
These registers are needed to configure a chip select line. The offset
layouts of these Registers are identical on mx27 and mx31, hence we can
use the macros in generic way
Signed-off-by: NLuotao Fu <l.fu@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add basic i.MX27 CPU support
Signed-off-by: NJuergen Beisert <j.beisert@pengutronix.de>

Simplify architecture's irq headers and sources, to share these files
between MXC3 and MXC2.
Signed-off-by: NJuergen Beisert <j.beisert@pengutronix.de>

This patch adds timer support for the i.MX machine family. This code can
be used on the following machs:

 - i.MX1 (tested)
 - i.MX2 (i.MX21 (to be tested), i.MX27 (tested))
 - i.MX3 (i.MX31 (tested))

TODO: It seems impossible to build a kernel for more than one CPU because the
timer do not follow the platform device rules. So it does only work if
timer 1 can be accessed on all CPUs at the same address.
Signed-off-by: NJuergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

From: Juergen Beisert <j.beisert@pengutronix.de>

This patch separates the current code into i.MX2 and i.MX3 and modifies
the Kconfig files to reflect this separation in the menus.

Things happend since last review:
 - make i.MX3 compile again
 - fix some structure names to be conform with all the shared/common
   sources from i.MX1/i.MX2

Previous changes:
 - stay conform to other Kconfig files (note from Russell King)
Signed-off-by: NJuergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

From: Juergen Beisert <j.beisert@pengutronix.de>

Clean up current header files from doxygen style comments. There are
probably more such comments left, but we start with these.

Things happend since last review:
 - needless blank lines removed (note by Russell King)
 - re-format comments (note by Ross Wille)
Signed-off-by: NJuergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: NRoss Wille <wille@freescale.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>