1. 14 9月, 2012 1 次提交
  2. 10 8月, 2012 1 次提交
    • A
      ARM: davinci: remove broken ntosd2_init_i2c · de923430
      Arnd Bergmann 提交于
      ntosd2_init_i2c walks the ntosd2_i2c_info array, which it expects to
      be populated with at least one member. gcc correctly warns about
      the out-of-bounds access here.
      
      Since this can not possibly work, it's better to disable i2c
      support entirely on this board.
      
      Without this patch, building davinci_all_defconfig results in:
      
      arch/arm/mach-davinci/board-neuros-osd2.c: In function 'davinci_ntosd2_init':
      arch/arm/mach-davinci/board-neuros-osd2.c:187:20: warning: array subscript is above array bounds [-Warray-bounds]
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NSekhar Nori <nsekhar@ti.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Cc: Andrey Porodko <panda@chelcom.ru>
      de923430
  3. 29 7月, 2012 1 次提交
  4. 20 7月, 2012 1 次提交
  5. 09 7月, 2012 1 次提交
    • S
      ARM: davinci: da8xx: fix interrupt handling · bbb33445
      Sekhar Nori 提交于
      CP_INTC code in entry-macro.S code reads SECR1n register to see if
      an interrupt was indeed pending. This register is actually marked as
      write-only in the OMAP-L138 TRM. Moreover, the code just checks to see
      the entire register is non-zero and does not check a specific interrupt
      number.
      
      Fix this to use interrupt pending bit in GIPR register for this purpose.
      GIPR register is already being read to know the highest priority interrupt
      pending.
      Signed-off-by: NSekhar Nori <nsekhar@ti.com>
      bbb33445
  6. 05 7月, 2012 1 次提交
  7. 01 7月, 2012 1 次提交
    • K
      ARM: davinci: add runtime PM support for clock management · ce9dcb87
      Kevin Hilman 提交于
      Add runtime PM core support to davinci by using the pm_clk
      infrastructure of the PM core.
      
      When runtime PM is enabled, the davinci runtime PM implementation will
      use the pm_clk layer to enable/disable clocks on demand.  When runtime
      PM is disabled, the pm_clk core will automatically enable clocks when
      the driver is bound and disable clocks when the driver is unbound.
      
      Cc: Mark A. Greer <mgreer@animalcreek.com>
      Cc: Sekhar Nori <nsekhar@ti.com>
      Signed-off-by: NKevin Hilman <khilman@ti.com>
      [nsekhar@ti.com: pruned list of header file includes and removed some
      debug code]
      Signed-off-by: NSekhar Nori <nsekhar@ti.com>
      ce9dcb87
  8. 26 6月, 2012 1 次提交
    • H
      ARM: davinci: cp_intc: Add irq domain support · 07caba96
      Heiko Schocher 提交于
      Add irq domain support for DaVinci cp_intc.
      
      Boot tested on AM18x EVM. Also tested with GPIO IRQ support on
      AM18x EVM.
      Signed-off-by: NHeiko Schocher <hs@denx.de>
      Cc: davinci-linux-open-source@linux.davincidsp.com
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: devicetree-discuss@lists.ozlabs.org
      Cc: Grant Likely <grant.likely@secretlab.ca>
      Cc: Sekhar Nori <nsekhar@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Sergei Shtylyov <sshtylyov@mvista.com>
      [nsekhar@ti.com: add commit description, select IRQ_DOMAIN for CP_INTC
      in Kconfig]
      Signed-off-by: NSekhar Nori <nsekhar@ti.com>
      07caba96
  9. 19 6月, 2012 1 次提交
  10. 09 5月, 2012 3 次提交
    • A
      arm: davinci: use for_each_set_bit_from · 98e3b339
      Akinobu Mita 提交于
      Use for_each_set_bit_from to iterate over all the set bit in a memory
      region.
      Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com>
      Acked-by: NSekhar Nori <nsekhar@ti.com>
      Cc: Sekhar Nori <nsekhar@ti.com>
      Cc: Christian Riesch <christian.riesch@omicron.at>
      Cc: Kevin Hilman <khilman@ti.com>
      Cc: davinci-linux-open-source@linux.davincidsp.com
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: linux-arm-kernel@lists.infradead.org
      Signed-off-by: NSekhar Nori <nsekhar@ti.com>
      98e3b339
    • S
      ARM: davinci: optimize the DMA ISR · bcd59b0f
      Sebastian Andrzej Siewior 提交于
      The ISR does quiete a lot of hw access which could be avoided. First it
      checks for a pending interrupt by reading alteast one register. Then it
      checks for the "activated" slots by reading another register. This is
      more or a less a must.
      Now, once it found an active slot it does the same two reads again.
      After that it "knows" that there must be a pending transfer however it
      cross checks with the other register. There are 32 bit in an interger
      which are polled instead of considering only the set bits and ignoring
      those which are zero. This performs atleast 32 reads which could be
      avoided. In case of a first match it does another read.
      This patch reorganizes the access by re-using the register which have
      been read and then uses ffs() to find the matching slot instead looping
      over it. By doing this we get rid of the last (32 + 2 + hits) reads.
      
      It is possible however that by really busy bank0 we never get to handle
      bank1. If this is a problem, we could try to handle bank1 after we are
      done with bank0 to check if there are any outstanding transfers.
      
      To put some numbers on this, this is from spi transfer via spidev. The
      first column is the number of total transfers, the time stamp is taken
      before and after the ioctl():
      
      |10000, min: 542us      avg: 591us
      |20000, min: 542us      avg: 592us
      |30000, min: 542us      avg: 592us
      |40000, min: 542us      avg: 585us
      |50000, min: 542us      avg: 593us
      
      The same test case with the patch applied
      |10000, min: 444us      avg: 493us
      |20000, min: 444us      avg: 491us
      |30000, min: 444us      avg: 489us
      |40000, min: 444us      avg: 491us
      |50000, min: 444us      avg: 492us
      
      that is almost 100us that just went away.
      Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
      Signed-off-by: NSekhar Nori <nsekhar@ti.com>
      bcd59b0f
    • U
      ARM: davinci: implement DEBUG_LL port choice · 477099f1
      Uwe Kleine-König 提交于
      Apart from the necessity to do this change for multi-platform kernels
      the previous logic depended on the zImage decompressor to write the
      physical and virtual address to a magic memory location.
      If the decompressor is unused or not correctly configured for the
      current machid, the addruart macro was an infinite loop. Moreover
      debugging the early zImage code was not possible either.
      Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
      [nsekhar@ti.com: add braces in _DEBUG_LL_ENTRY() macro to fix checkpatch
      error. Fix debug port choice config dependency for traditional DaVincis.
      Modify debug port config names and add help text.]
      Signed-off-by: NSekhar Nori <nsekhar@ti.com>
      477099f1
  11. 05 5月, 2012 1 次提交
  12. 27 4月, 2012 1 次提交
    • U
      ARM: davinci: da850-evm: fix section mismatch · 59858b71
      Uwe Kleine-König 提交于
      This fixes:
      	WARNING: arch/arm/mach-davinci/built-in.o(.text+0x2d84): Section mismatch in reference from the function da850_evm_ui_expander_setup() to the (unknown reference) .init.data:(unknown)
      	The function da850_evm_ui_expander_setup() references
      	the (unknown reference) __initdata (unknown).
      	This is often because da850_evm_ui_expander_setup lacks a __initdata
      	annotation or the annotation of (unknown) is wrong.
      
      Note this is a real issue because if the tca6416 driver only binds when
      the init sections are already discarded da850_evm_ui_expander_setup is
      called when da850_evm_devices might already be overwritten.
      Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
      Signed-off-by: NSekhar Nori <nsekhar@ti.com>
      59858b71
  13. 19 4月, 2012 2 次提交
  14. 29 3月, 2012 1 次提交
  15. 22 3月, 2012 1 次提交
  16. 21 3月, 2012 1 次提交
  17. 14 3月, 2012 1 次提交
  18. 13 3月, 2012 2 次提交
  19. 11 3月, 2012 2 次提交
  20. 07 3月, 2012 2 次提交
  21. 27 2月, 2012 1 次提交
  22. 25 2月, 2012 5 次提交
  23. 22 2月, 2012 1 次提交
  24. 03 2月, 2012 3 次提交
  25. 28 1月, 2012 1 次提交
    • S
      ARM: davinci: update mdio bus name · f6f97588
      Sekhar Nori 提交于
      Commit 5a05a820 ("davinci_emac:
      use an unique MDIO bus name") introduced during the v3.3 merge
      window updated the davinci mdio bus name to make it unique.
      
      Update the bus name in board files which use DaVinci MDIO bus
      to match the new name. Without this PHY is not detected with
      error like:
      
      PHY 0:01 not found
      net eth0: could not connect to phy 0:01
      
      Tested on DM365 and DA850 EVMs.
      
      Cc: Florian Fainelli <florian@openwrt.org>
      Cc: David S. Miller <davem@davemloft.net>
      Signed-off-by: NSekhar Nori <nsekhar@ti.com>
      f6f97588
  26. 21 1月, 2012 3 次提交