1. 07 9月, 2012 4 次提交
  2. 05 9月, 2012 1 次提交
  3. 01 9月, 2012 1 次提交
  4. 29 8月, 2012 4 次提交
  5. 25 8月, 2012 2 次提交
  6. 31 7月, 2012 2 次提交
    • F
      clk: validate pointer in __clk_disable() · e47c6a34
      Fengguang Wu 提交于
      clk_get() returns -ENOENT on error and some careless caller might
      dereference it without error checking:
      
      In mxc_rnga_remove():
      
              struct clk *clk = clk_get(&pdev->dev, "rng");
      
      	// ...
      
              clk_disable(clk);
      
      Since it's insane to audit the lots of existing and future clk users,
      let's add a check in the callee to avoid kernel panic and warn about
      any buggy user.
      
      Cc: Russell King <rmk@arm.linux.org.uk>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Viresh Kumar <viresh.kumar@st.com>
      Cc: viresh kumar <viresh.linux@gmail.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      e47c6a34
    • V
      clk: remove redundant depends on from drivers/Kconfig · 01da40bf
      Viresh Kumar 提交于
      menu "Common Clock Framework" has "depends on COMMON_CLK" and so configs
      defined within menu don't require these "depends on COMMON_CLK again".
      Signed-off-by: NViresh Kumar <viresh.kumar@st.com>
      Cc: Wolfram Sang <w.sang@pengutronix.de>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Jeff Garzik <jgarzik@redhat.com>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Bhupesh Sharma <bhupesh.sharma@st.com>
      Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
      Cc: Russell King <rmk@arm.linux.org.uk>
      Cc: Mike Turquette <mturquette@linaro.org>
      Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
      Cc: viresh kumar <viresh.linux@gmail.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      01da40bf
  7. 20 7月, 2012 2 次提交
  8. 19 7月, 2012 1 次提交
  9. 18 7月, 2012 6 次提交
  10. 12 7月, 2012 12 次提交
    • R
    • R
      clk: add highbank clock support · 8d4d9f52
      Rob Herring 提交于
      This adds real clock support to Calxeda Highbank SOC using the common
      clock infrastructure.
      Signed-off-by: NRob Herring <rob.herring@calxeda.com>
      [mturquette@linaro.org: fixed up invalid writes to const struct member]
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      8d4d9f52
    • G
      clk: add DT fixed-clock binding support · 015ba402
      Grant Likely 提交于
      Add support for DT "fixed-clock" binding to the common fixed rate clock
      support.
      Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      [Rob Herring] Rework and move into common clock infrastructure
      Signed-off-by: NRob Herring <rob.herring@calxeda.com>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      015ba402
    • G
      clk: add DT clock binding support · 766e6a4e
      Grant Likely 提交于
      Based on work 1st by Ben Herrenschmidt and Jeremy Kerr, then by Grant
      Likely, this patch adds support to clk_get to allow drivers to retrieve
      clock data from the device tree.
      
      Platforms scan for clocks in DT with of_clk_init and a match table, and
      the register a provider through of_clk_add_provider. The provider's
      clk_src_get function will be called when a device references the
      provider's OF node for a clock reference.
      
      v6 (Rob Herring):
          - Return error values instead of NULL to match clock framework
            expectations
      
      v5 (Rob Herring):
          - Move from drivers/of into common clock subsystem
          - Squashed "dt/clock: add a simple provider get function" and
            "dt/clock: add function to get parent clock name"
          - Rebase to 3.4-rc1
          - Drop CONFIG_OF_CLOCK and just use CONFIG_OF
          - Add missing EXPORT_SYMBOL to various functions
          - s/clock-output-name/clock-output-names/
          - Define that fixed-clock binding is a single output
      
      v4 (Rob Herring):
          - Rework for common clk subsystem
          - Add of_clk_get_parent_name function
      
      v3: - Clarified documentation
      
      v2: - fixed errant ';' causing compile error
          - Editorial fixes from Shawn Guo
          - merged in adding lookup to clkdev
          - changed property names to match established convention. After
            working with the binding a bit it really made more sense to follow the
            lead of 'reg', 'gpios' and 'interrupts' by making the input simply
            'clocks' & 'clock-names' instead of 'clock-input-*', and to only use
            clock-output* for the producer nodes. (Sorry Shawn, this will mean
            you need to change some code, but it should be trivial)
          - Add ability to inherit clocks from parent nodes by using an empty
            'clock-ranges' property.  Useful for busses.  I could use some feedback
            on the new property name, 'clock-ranges' doesn't feel right to me.
      Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      Signed-off-by: NRob Herring <rob.herring@calxeda.com>
      Reviewed-by: NShawn Guo <shawn.guo@freescale.com>
      Cc: Sascha Hauer <kernel@pengutronix.de>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      766e6a4e
    • L
      ARM: integrator: convert to common clock · a613163d
      Linus Walleij 提交于
      This converts the Integrator platform to use common clock
      and the ICST driver. Since from this point not all ARM
      reference platforms use the clock, we define
      CONFIG_PLAT_VERSATILE_CLOCK and select it for all platforms
      except the Integrator.
      
      Open issue: I could not use the .init_early() field of the
      machine descriptor to initialize the clocks, but had to
      move them to .init_irq(), so presumably .init_early() is
      so early that common clock is not up, and .init_machine()
      is too late since it's needed for the clockevent/clocksource
      initialization. Any suggestions on how to solve this is
      very welcome.
      
      Cc: Russell King <linux@arm.linux.org.uk>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      [mturquette@linaro.org: use 'select' instead of versatile Kconfig]
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      a613163d
    • L
      clk: add versatile ICST307 driver · 91b87a47
      Linus Walleij 提交于
      The ICST307 VCO clock has a shared driver in the ARM
      architecture. This patch provides a wrapper into the common
      clock framework so we can use the implementation in the
      ARM architecture without duplicating the code until all
      ARM platforms using this VCO are moved over. At that point
      we can merge the driver from the ARM platform into the
      generic file altogether.
      
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Mike Turquette <mturquette@ti.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      [mturquette@linaro.org: removed versatile Kconfig]
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      91b87a47
    • L
      ARM: u300: convert to common clock · 50667d63
      Linus Walleij 提交于
      This converts the U300 clock implementation over to use the common
      struct clk and moves the implementation down into drivers/clk.
      Since VCO isn't used in tree it was removed, it's not hard to
      put it back in if need be.
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      [mturquette@linaro.org: trivial Makefile conflict]
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      50667d63
    • R
      clk: cache parent clocks only for muxes · 9ca1c5a4
      Rajendra Nayak 提交于
      caching parent clocks makes sense only when a clock has more
      than one parent (mux clocks).
      Avoid doing this for every other clock.
      Signed-off-by: NRajendra Nayak <rnayak@ti.com>
      [mturquette@linaro.org: removed extra parentheses]
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      9ca1c5a4
    • M
      clk: wm831x: Add initial WM831x clock driver · f05259a6
      Mark Brown 提交于
      The WM831x and WM832x series of PMICs contain a flexible clocking
      subsystem intended to provide always on and system core clocks.  It
      features:
      
      - A 32.768kHz crystal oscillator which can optionally be used to pass
        through an externally generated clock.
      - A FLL which can be clocked from either the 32.768kHz oscillator or
        the CLKIN pin.
      - A CLKOUT pin which can bring out either the oscillator or the FLL
        output.
      - The 32.768kHz clock can also optionally be brought out on the GPIO
        pins of the device.
      
      This driver fully supports the 32.768kHz oscillator and CLKOUT.  The FLL
      is supported only in AUTO mode, the full flexibility of the FLL cannot
      currently be used.
      
      Due to a lack of access to systems where the core SoC has been converted
      to use the generic clock API this driver has been compile tested only.
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      f05259a6
    • R
      clk: Add CLK_IS_BASIC flag to identify basic clocks · f7d8caad
      Rajendra Nayak 提交于
      Most platforms end up using a mix of basic clock types and
      some which use clk_hw_foo struct for filling in custom platform
      information when the clocks don't fit into basic types supported.
      
      In platform code, its useful to know if a clock is using a basic
      type or clk_hw_foo, which helps platforms know if they can
      safely use to_clk_hw_foo to derive the clk_hw_foo pointer from
      clk_hw.
      
      Mark all basic clocks with a CLK_IS_BASIC flag.
      Signed-off-by: NRajendra Nayak <rnayak@ti.com>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      f7d8caad
    • R
      clk: Add support for rate table based dividers · 357c3f0a
      Rajendra Nayak 提交于
      Some divider clks do not have any obvious relationship
      between the divider and the value programmed in the
      register. For instance, say a value of 1 could signify divide
      by 6 and a value of 2 could signify divide by 4 etc.
      Also there are dividers where not all values possible
      based on the bitfield width are valid. For instance
      a 3 bit wide bitfield can be used to program a value
      from 0 to 7. However its possible that only 0 to 4
      are valid values.
      
      All these cases need the platform code to pass a simple
      table of divider/value tuple, so the framework knows
      the exact value to be written based on the divider
      calculation and can also do better error checking.
      
      This patch adds support for such rate table based
      dividers and as part of the support adds a new
      registration function 'clk_register_divider_table()'
      and a new macro for static definition
      'DEFINE_CLK_DIVIDER_TABLE'.
      Signed-off-by: NRajendra Nayak <rnayak@ti.com>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      357c3f0a
    • R
      clk: Add support for power of two type dividers · 6d9252bd
      Rajendra Nayak 提交于
      Quite often dividers and the value programmed in the
      register have a relation of 'power of two', something like
      value	div
      0	1
      1	2
      2	4
      3	8...
      
      Add support for such dividers as part of clk-divider.
      
      The clk-divider flag 'CLK_DIVIDER_POWER_OF_TWO' should be used
      to define such clocks.
      Signed-off-by: NRajendra Nayak <rnayak@ti.com>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      6d9252bd
  11. 05 7月, 2012 1 次提交
  12. 04 7月, 2012 1 次提交
    • R
      clk: fix parent validation in __clk_set_parent() · 863b1327
      Rajendra Nayak 提交于
      The below commit introduced a bug in __clk_set_parent()
      which could cause it to *skip* the parent validation
      which makes sure the parent passed to the api is a valid
      one.
      
          commit 7975059d
          Author: Rajendra Nayak <rnayak@ti.com>
          Date:   Wed Jun 6 14:41:31 2012 +0530
      
              clk: Allow late cache allocation for clk->parents
      
      This was identified by the following compiler warning..
      
          drivers/clk/clk.c: In function '__clk_set_parent':
          drivers/clk/clk.c:1083:5: warning: 'i' may be used uninitialized in this function [-Wuninitialized]
      
      .. as reported by Marc Kleine-Budde.
      
      There were various options discussed on how to fix this, one
      being initing 'i' to clk->num_parents, but the below approach
      was found to be more appropriate as it also makes the 'parent
      validation' code simpler to read.
      Reported-by: NMarc Kleine-Budde <mkl@pengutronix.de>
      Signed-off-by: NRajendra Nayak <rnayak@ti.com>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      Cc: stable@kernel.org
      863b1327
  13. 27 6月, 2012 3 次提交