- 06 6月, 2014 1 次提交
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由 Thierry Reding 提交于
V_DIRECTION is the name of the field in the documentation, so use that for consistency. Also add the H_DIRECTION field for completeness. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 04 4月, 2014 1 次提交
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由 Thierry Reding 提交于
Add support for eDP functionality found on Tegra124 and later SoCs. Only fast link training is currently supported. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 20 12月, 2013 3 次提交
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由 Thierry Reding 提交于
Some of the code in the CRTC's mode setting code is specific to the RGB output or needs to be called slightly differently depending on the type of output. Push that code down into the output drivers. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Tegra124 and later support interlacing, but the driver doesn't support it yet. Make sure interlacing stays disabled on hardware that supports it. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
This commit adds support for both DSI outputs found on Tegra. Only very minimal functionality is implemented, so advanced features like ganged mode won't work. Due to the lack of other test hardware, some sections of the driver are hardcoded to work with Dalmore. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 31 10月, 2013 3 次提交
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由 Thierry Reding 提交于
The gr3d engine renders images bottom-up. Allow buffers that are used for 3D content to be marked as such and implement support in the display controller to present them properly. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
The gr2d and gr3d engines work more efficiently on buffers with a tiled memory layout. Allow created buffers to be marked as tiled so that the display controller can scan them out properly. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
In order to make subsystem-wide changes easier, move the Tegra DRM driver back into the DRM tree. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 22 4月, 2013 1 次提交
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由 Terje Bergstrom 提交于
Make drm part of host1x driver. Signed-off-by: NArto Merilainen <amerilainen@nvidia.com> Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NErik Faye-Lund <kusmabite@gmail.com> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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- 22 2月, 2013 2 次提交
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由 Thierry Reding 提交于
All the necessary support bits like .mode_set_base() and VBLANK are now available, so page-flipping case easily be implemented on top. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Thierry Reding 提交于
Add support for the B and C planes which support RGB and YUV pixel formats and can be used as overlays or hardware cursor. Currently 32-bit XRGB as well as UYVY, YUV420 and YUV422 pixel formats are advertised. Other formats should be easy to add but these are the most common ones and should cover the majority of use-cases. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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- 20 11月, 2012 1 次提交
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由 Thierry Reding 提交于
This commit adds a KMS driver for the Tegra20 SoC. This includes basic support for host1x and the two display controllers found on the Tegra20 SoC. Each display controller can drive a separate RGB/LVDS output. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NStephen Warren <swarren@nvidia.com> Acked-by: NMark Zhang <markz@nvidia.com> Reviewed-by: NMark Zhang <markz@nvidia.com> Tested-by: NMark Zhang <markz@nvidia.com> Tested-and-acked-by: NAlexandre Courbot <acourbot@nvidia.com> Acked-by: NTerje Bergstrom <tbergstrom@nvidia.com> Tested-by: NTerje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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