WARNING: at drivers/gpio/gpiolib.c:83 gpio_ensure_requested+0x58/0xbc()
 autorequest GPIO-71
 Modules linked in:
 [<c0028bd0>] (unwind_backtrace+0x0/0xe8) from [<c003c328>] (warn_slowpath_common+0x48/0x78)
 [<c003c328>] (warn_slowpath_common+0x48/0x78) from [<c003c394>] (warn_slowpath_fmt+0x28/0x38)
 [<c003c394>] (warn_slowpath_fmt+0x28/0x38) from [<c0146128>] (gpio_ensure_requested+0x58/0xbc)
 [<c0146128>] (gpio_ensure_requested+0x58/0xbc) from [<c0146308>] (gpio_direction_input+0x80/0xf4)
 [<c0146308>] (gpio_direction_input+0x80/0xf4) from [<c000c668>] (zylonite_pxa300_init+0x108/0x214)
 [<c000c668>] (zylonite_pxa300_init+0x108/0x214) from [<c000c4e4>] (zylonite_init+0x8/0x84)
 [<c000c4e4>] (zylonite_init+0x8/0x84) from [<c00097cc>] (customize_machine+0x18/0x24)
 [<c00097cc>] (customize_machine+0x18/0x24) from [<c00222e0>] (do_one_initcall+0x30/0x1b0)
 [<c00222e0>] (do_one_initcall+0x30/0x1b0) from [<c00083f4>] (kernel_init+0xa4/0x11c)
 [<c00083f4>] (kernel_init+0xa4/0x11c) from [<c0023f3c>] (kernel_thread_exit+0x0/0x8)
 ---[ end trace 1b75b31a2719ed1c ]---

This issue is caused by using gpio pin without request. Add gpio_request()
into zylonite. To simplify the code, error checking is omitted since this
is being performed early.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Attepmpt to configure ULPI pins gives the following compile error:
  CC      arch/arm/mach-pxa/cm-x300.o
  arch/arm/mach-pxa/cm-x300.c:155: error: 'MFP_MFP_AF0' undeclared here (not in a function)
  arch/arm/mach-pxa/cm-x300.c:155: error: 'MFP_MFP_DS01X' undeclared here (not in a function)
  make[2]: *** [arch/arm/mach-pxa/cm-x300.o] Error 1
  make[1]: *** [arch/arm/mach-pxa] Error 2
  make: *** [sub-make] Error 2

Fix it.
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

As slab is available early now, use kzalloc() rather than
alloc_bootmem_low() in pxa_init_gpio_chip().

This removes the following boot time warning:

<4>------------[ cut here ]------------
<4>WARNING: at mm/bootmem.c:535 alloc_arch_preferred_bootmem+0x2c/0x54()
<d>Modules linked in:
[<c0029430>] (unwind_backtrace+0x0/0xdc) from [<c0036f64>] (warn_slowpath_common+0x4c/0x80)
[<c0036f64>] (warn_slowpath_common+0x4c/0x80) from [<c000ede0>] (alloc_arch_preferred_bootmem+0x2c/0x54)
[<c000ede0>] (alloc_arch_preferred_bootmem+0x2c/0x54) from [<c000f2e4>] (___alloc_bootmem_nopanic+0x34/0xd0)
[<c000f2e4>] (___alloc_bootmem_nopanic+0x34/0xd0) from [<c000f6e4>] (___alloc_bootmem+0xc/0x34)
[<c000f6e4>] (___alloc_bootmem+0xc/0x34) from [<c000cb20>] (pxa_init_gpio+0x48/0x228)
[<c000cb20>] (pxa_init_gpio+0x48/0x228) from [<c0009794>] (init_IRQ+0x34/0x44)
[<c0009794>] (init_IRQ+0x34/0x44) from [<c00089d4>] (start_kernel+0x144/0x264)
[<c00089d4>] (start_kernel+0x144/0x264) from [<a0008034>] (0xa0008034)
<4>---[ end trace 1b75b31a2719ed1c ]---
Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

In commit f23d4911, the pwr-i2c device name changed due to the
newly introduced device table. This patch fixes the clock so the
driver's probe will succeed again.
Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Acked-by: NRussell King <linux@arm.linux.org.uk>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

pm_idle is used by infrastructure (eg, cpuidle) which expects architectures
to call it in a certain way.  Arrange for ARM to follow x86's lead on this
and call pm_idle() with interrupts already disabled.  However, we expect
pm_idle() to enable interrupts before it returns.

Also, OMAP wants to be able to disable hlt-ing, so allow hlt_counter to
prevent all calls to pm_idle.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Fix gpio-config off-by-one bug. Without this patch, touching GPA0 pin on
S3C64XX platform causes kernel oops.
Reviewed-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

N group

Add to_irq() function to onvert gpio to irq for external interrupt
group (GPN).
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

The usb-host clock was using the wrong define (the SCLK enable for the
usb-host-bus) to change the HCLK register instead of the HCLK_UHOST bit.
Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

A few typos seems to have sneaked into the HCLK gate defines, causing the
usb host clock to not get enabled. Fix them according to the reference
manual and throw in the 3d accel bit for good measure.
Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

This allows the callers to now pass down the full set of FAULT_FLAG_xyz
flags to handle_mm_fault().  All callers have been (mechanically)
converted to the new calling convention, there's almost certainly room
for architectures to clean up their code and then add FAULT_FLAG_RETRY
when that support is added.
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

with while (i++ < MAX_CLOCK_ENABLE_WAIT); i can reach MAX_CLOCK_ENABLE_WAIT + 1
after the loop, so if (i == MAX_CLOCK_ENABLE_WAIT) that's still success.
Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Correspondence with the TI OMAP hardware team indicates that
SDRC_DLLA_CTRL.FIXEDDELAY should be initialized to 0x0f.  This number
was apparently derived from process validation.  This is only used
when the SDRC DLL is unlocked (e.g., SDRC clock frequency less than
83MHz).
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Previously only 1 and 2 was supported. This is needed for DVFS VDD2 control.
Signed-off-by: NTero Kristo <tero.kristo@nokia.com>

Convert omap3_sram_configure_core_dpll() to use macros rather than
magic numbers.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Clean up comments and copyrights on the CORE DPLL3 M2 divider change code.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Program the SDRC_MR_0 register as well during SDRC clock changes.
This register allows selection of the memory CAS latency.  Some SDRAM
chips, such as the Qimonda HYB18M512160AF6, have a lower CAS latency
at lower clock rates.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

When changing the SDRAM clock from 166MHz to 83MHz via the CORE DPLL M2
divider, add a short delay before returning to SDRAM to allow the SDRC
time to stabilize.  Without this delay, the system is prone to random
panics upon re-entering SDRAM.

This time delay varies based on MPU frequency.  At 500MHz MPU frequency at
room temperature, 64 loops seems to work okay; so add another 32 loops for
environmental and process variation.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

On the OMAP3, initialize SDRC timings when the kernel boots.  This ensures
that the kernel is running with known, optimized SDRC timings, rather than
whatever was configured by the bootloader.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

The original CDP kernel that this code comes from waited for 0x800
loops after switching the CORE DPLL M2 divider.  This does not appear
to be necessary.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

This patch supports the cache handling for some old Feroceon cores for
which the CPU ID is like 0x41159260.  This is a complement to
commit ab6d15d5.
Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

When a kthread function returns, it branches to do_exit(). However, the
unwinding information isn't valid anymore and any stack trace caused by
do_exit() may be incorrect. This patch adds a kernel_thread_exit()
function and annotated with '.cantunwind' so that the unwinder stops
when reaching it.
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

There are situations where the unwinder goes beyond stack boundaries and
unwinds random data. This patch moves the stack boundaries check after
the unwind_exec_insn() call and adds an extra check for possible
infinite loops (like "mov pc, lr" with pc == lr).

The patch also fixes a bug in the unwind instructions interpreter. The
0xb0 instruction can only set PC to LR if this wasn't already set by
a previous instruction (this is used on exceptions taken while in kernel
mode where svc_entry is annotated with ".save {r0 - pc}").
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Not discarding these sections when hotplug isn't available prevents the
kernel from building.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

From: Min Zhang <mzhang@mvista.com>

Add alignment fault fixup support for 32-bit Thumb-2 LDM, LDRD, POP,
PUSH, STM and STRD instructions.  Alignment fault fixup support for
the remaining 32-bit Thumb-2 load/store instruction cases is not
included since ARMv6 and later processors include hardware support
for loads and stores of unaligned words and halfwords.
Signed-off-by: NMin Zhang <mzhang@mvista.com>
Signed-off-by: NGeorge G. Davis <gdavis@mvista.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The cpu member of struct irq_desc was recently renamed to node. The
patch renames the ARM references to the old member.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This header file is needed for twd_base.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This function was only used by pci_claim_resource(), and the last commit
deleted that use.
Signed-off-by: NMatthew Wilcox <willy@linux.intel.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

* create mm/init-mm.c, move init_mm there
* remove INIT_MM, initialize init_mm with C99 initializer
* unexport init_mm on all arches:

  init_mm is already unexported on x86.

  One strange place is some OMAP driver (drivers/video/omap/) which
  won't build modular, but it's already wants get_vm_area() export.
  Somebody should look there.

[akpm@linux-foundation.org: add missing #includes]
Signed-off-by: NAlexey Dobriyan <adobriyan@gmail.com>
Cc: Mike Frysinger <vapier.adi@gmail.com>
Cc: Americo Wang <xiyou.wangcong@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This patch introduces the Openmoko GTA02 machine definition.

Much of the code is based on Harald Welte's work, although it
has been largely rewritten several times.

This is intended to be the minimum machine definition to boot and
be able to run a rootfs from NAND on GTA02 / FreeRunner.  It does
not bring up the framebuffer / Glamo and lacks many other peripheral
drivers from outside the SoC.  But once we have this basis in
mainline kernel, we will be able to introduce the other drivers
and add them here.

Thanks to Sven Rebhan <odinshorse@googlemail.com> for his fixes to this
patch (Kconfig and defconfig files).
Signed-off-by: NAndy Green <andy@warmcat.com>
Signed-off-by: NNelson Castillo <arhuaco@freaks-unidos.net>
[ben-linux@fluff.org: Fix the GPIO definitions]
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

This patch provides initial support for CPU frequency scaling on the
Samsung S3C ARM processors. Currently only S3C6410 processors are
supported, though addition of another data table with supported clock
rates should be sufficient to enable support for further CPUs.

Use the regulator framework to provide optional support for DVFS in
the S3C cpufreq driver. When a software controllable regulator is
configured the driver will use it to lower the supply voltage when
running at a lower frequency, giving improved power savings.

When regulator support is disabled or no regulator can be obtained
for VDDARM the driver will fall back to scaling only the frequency.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

This allows the S3C64XX IIS drivers to be converted to the standard
driver model and allows fixes there for problems with attempting to
acquire the clocks for the IIS blocks via the clock API.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Remove duplicated #include in arch/arm/mach-s3c2410/usb-simtec.c.
Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

The resume_mask wasn't being checked in vic_set_wake()
to see if the IRQ was a valid wakeup source.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Currently pcm990 camera bus-width management functions request a GPIO and never
free it again. With this approach the GPIO extender driver cannot be unloaded
once camera drivers have been loaded, also unloading theb i2c-pxa bus driver
produces errors, because the GPIO extender driver cannot unregister properly.
Another problem is, that if camera drivers are once loaded before the GPIO
extender driver, the platform code marks the GPIO unavailable and only a reboot
helps to recover. Adding an explicit free_bus method and using it in mt9m001
and mt9v022 drivers fixes these problems.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: NEric Miao <eric.miao@marvell.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>

The wm8731 driver has been converted to register using the standard I2C
device registration mechanism so we can now do the registration in the
arch/arm code as normal.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Maxim 1586 V3 gain can be configured by external resistors
(R24, R25) connected to the FB3 pin. To avoid accidental
overvoltage, it now requires this gain to be configured
explicitly.
Signed-off-by: NPhilipp Zabel <philipp.zabel@gmail.com>
Acked-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NEric Miao <eric.miao@marvell.com>

On this board, the PXA272 CPU voltage VCC_CORE is provided
by a Maxim 1586 voltage regulator. Use the regulator
framework to provide VCC_CORE control. When cpufreq will be
updated to ask for vcc_core, this will optimize power
drained by the board.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NEric Miao <eric.miao@marvell.com>