1. 20 3月, 2007 2 次提交
  2. 17 3月, 2007 7 次提交
  3. 14 3月, 2007 1 次提交
  4. 08 3月, 2007 1 次提交
    • D
      [PATCH] Add epoll compat_ code to fs/compat.c · f6dfb4fd
      Davide Libenzi 提交于
      IA64 and ARM-OABI are currently using their own version of epoll compat_
      code.
      
      An architecture needs epoll_event translation if alignof(u64) in 32 bit
      mode is different from alignof(u64) in 64 bit mode.  If an architecture
      needs epoll_event translation, it must define struct compat_epoll_event in
      asm/compat.h and set CONFIG_HAVE_COMPAT_EPOLL_EVENT and use
      compat_sys_epoll_ctl and compat_sys_epoll_wait.
      
      All 64 bit architecture should use compat_sys_epoll_pwait.
      
      [sfr: restructure and move to fs/compat.c, remove MIPS version
      of compat_sys_epoll_pwait, use __put_user_unaligned]
      Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
      Cc: David Woodhouse <dwmw2@infradead.org>
      Cc: Russell King <rmk@arm.linux.org.uk>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      f6dfb4fd
  5. 07 3月, 2007 2 次提交
  6. 05 3月, 2007 4 次提交
  7. 27 2月, 2007 7 次提交
  8. 22 2月, 2007 2 次提交
    • R
      de7fa296
    • F
      [MIPS] Add basic SMARTMIPS ASE support · 9693a853
      Franck Bui-Huu 提交于
      This patch adds trivial support for SMARTMIPS extension. This extension
      is currently implemented by 4KS[CD] CPUs.
      
      Basically it saves/restores ACX register, which is part of the SMARTMIPS
      ASE, when needed. This patch does *not* add any support for Smartmips MMU
      features.
      
      Futhermore this patch does not add explicit support for 4KS[CD] CPUs since
      they are respectively mips32 and mips32r2 compliant.  So with the current
      processor configuration, a platform that has such CPUs needs to select
      both configs:
      
      	CPU_HAS_SMARTMIPS
      	SYS_HAS_CPU_MIPS32_R[12]
      
      This is due to the processor configuration which is mixing up all the
      architecture variants and the processor types.
      
      The drawback of this, is that we currently pass '-march=mips32' option to
      gcc when building a kernel instead of '-march=4ksc' for 4KSC case. This
      can lead to a kernel image a little bit bigger than required.
      Signed-off-by: NFranck Bui-Huu <fbuihuu@gmail.com>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      9693a853
  9. 21 2月, 2007 3 次提交
  10. 20 2月, 2007 1 次提交
  11. 19 2月, 2007 6 次提交
  12. 18 2月, 2007 1 次提交
  13. 17 2月, 2007 1 次提交
  14. 14 2月, 2007 2 次提交