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  1. 29 9月, 2010 1 次提交
  3. 17 9月, 2010 1 次提交
  5. 25 8月, 2010 1 次提交
  7. 15 4月, 2010 1 次提交
  9. 08 4月, 2010 1 次提交
    • B
      ath5k: Adaptive Noise Immunity (ANI) Implementation · 2111ac0d
      由 Bruno Randolf 提交于 
      This is an Adaptive Noise Imunity (ANI) implementation for ath5k. I have looked
at both ath9k and HAL sources (they are nearly the same), and even though i
have implemented some things differently, the basic algorithm is practically
the same, for now. I hope that this can serve as a clean start to improve the
algorithm later.

This also adds a possibility to manually control ANI settings, right now only
thru a debugfs file:
  * set lowest sensitivity (=highest noise immunity):
	echo sens-low > /sys/kernel/debug/ath5k/phy0/ani
  * set highest sensitivity (=lowest noise immunity):
	echo sens-high > /sys/kernel/debug/ath5k/phy0/ani
  * automatically control immunity (default):
	echo ani-on > /sys/kernel/debug/ath5k/phy0/ani
  * to see the parameters in use and watch them change:
	cat /sys/kernel/debug/ath5k/phy0/ani

Manually setting sensitivity will turn the automatic control off. You can also
control each of the five immunity parameters (noise immunity, spur immunity,
firstep, ofdm weak signal detection, cck weak signal detection) manually thru
the debugfs file.

This is tested on AR5414 and nearly doubles the thruput in a noisy 2GHz band.
Signed-off-by: NBruno Randolf <br1@einfach.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      2111ac0d
  11. 11 3月, 2010 2 次提交
    • B
      ath5k: Minor EEPROM documentation updates · 687c8ff1
      由 Bruno Randolf 提交于 
      Here are some minor updates for EEPROM, mostly documentation and some small
fixes which have no effect at the moment.

- fixed_bias is not available for B mode.

- AR5K_EEPROM_[RT]X_CHAIN_DIS is 3 bit. this is MIMO and will not be used in
  ath5k, but just to be correct.

- AR5K_EEPROM_JAP_MID_EN added, and shift of following flags adapted.

- added some documentation for EEPROM values and some comments.
Signed-off-by: NBruno Randolf <br1@einfach.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      687c8ff1
    • B
      ath5k: fix I/Q calibration (for real) · 86415d43
      由 Bruno Randolf 提交于 
      I/Q calibration was completely broken, resulting in a high number of CRC errors
on received packets. before i could see around 10% to 20% CRC errors, with this
patch they are between 0% and 3%.

1.) the removal of the mask in commit "ath5k: Fix I/Q calibration
(f1cf2dbd)" resulted in no mask beeing used
when writing the I/Q values into the register. additional errors in the
calculation of the values (see 2.) resulted too high numbers, exceeding the
masks, so wrong values like 0xfffffffe were written. to be safe we should
always use the bitmask when writing parts of a register.

2.) using a (s32) cast for q_coff is a wrong conversion to signed, since we
convert to a signed value later by substracting 128. this resulted in too low
numbers for Q many times, which were limited to -16 by the boundary check later
on.

3.) checked everything against the HAL sources and took over comments and minor
optimizations from there.

4.) we can't use ENABLE_BITS when we want to write a number (the number can
contain zeros). also always write the correction values first and set ENABLE
bit last, like the HAL does.
Signed-off-by: NBruno Randolf <br1@einfach.org>
Cc: stable@kernel.org
Acked-by: NNick Kossifidis <mickflemm@gmail.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      86415d43
  13. 28 10月, 2009 1 次提交
  15. 08 10月, 2009 1 次提交
  17. 21 9月, 2009 1 次提交
  19. 25 7月, 2009 1 次提交
  21. 07 5月, 2009 1 次提交
  23. 23 4月, 2009 1 次提交
  25. 28 3月, 2009 1 次提交
  27. 14 2月, 2009 3 次提交
  29. 13 1月, 2009 1 次提交
  31. 05 12月, 2008 1 次提交
  33. 11 11月, 2008 1 次提交
    • N
      ath5k: Update PCU code · f07a6c49
      由 Nick Kossifidis 提交于 
      * In set_opmode don't handle antenna settings and preserve other STA_ID1 settings
(shouldn't matter because we call it during reset but it makes things cleaner)
Also set properly AP/ADHOC indicator flag on CFG while setting AP/ADHOC modes
and always enable key search mode.

* Properly set BSSID Mask during reset (cache it and reuse it durring set_associd)

* Update beacon_init to flush pending BMISS interrupts and handle setting of adhoc
beacon ATIM policy flag for ad-hoc mode. Also set TSF to 0 to start TSF increment
on AP mode. We need to handle sleep timers for AR5212 there + add support for PCF.

* Properly clean MIC key from keytable when TKIP is used (Bob is working on set_key
function etc so i leave it for now).

Tested on AR5212 (Hainan) and AR5413 and works fine

v2 Set PISR on AR5211+ and ISR on AR5210, got to sleep more ;-)

Changes-Licensed-under: ISC
Signed-Off-by: NNick Kossifidis <mickflemm@gmail.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      f07a6c49
  35. 01 11月, 2008 1 次提交
    • N
      ath5k: Update interrupt masking code · 4c674c60
      由 Nick Kossifidis 提交于 
      *Properly get/set all available ISR/IMR values and review common/uncommon bits
*Better handling of per-txq interrupts (we can now resolve what q is generating
 each interrupt -this will help in debuging wme later)
*Some minor updates from legacy-hal
*Properly handle RXNOFRM and TXNOFRM interrupt masking (even when we don't set
 them on IMR they keep showing up, so we disable them by zeroing AR5K_RXNOFRM
 and AR5K_TXNOFRM registers). This doesn't exist on legacy-hal but i've tested
 it on various cards and it works fine.

Changes-Licensed-under: ISC
Signed-Off-by: NNick Kossifidis <mickflemm@gmail.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      4c674c60
  37. 01 10月, 2008 2 次提交
  39. 25 9月, 2008 1 次提交
  41. 06 9月, 2008 1 次提交
    • N
      ath5k: HW code cleanup · c6e387a2
      由 Nick Kossifidis 提交于 
       * No code changes...

 * Split hw.c to multiple files for better maintenance and add some documentation on each file
   code is going to grow soon (eeprom.c for example is going to get much stuff currently developed
   on ath_info) so it's better this way.

 * Rename following functions to maintain naming scheme:

     ah_setup_xtx_desc -> ah_setup_mrr_tx_desc
     (Because xtx doesn't say much, it's actually
     a multi-rate-retry tx descriptor)

     ath5k_hw_put_tx/rx_buf - > ath5k_hw_set_tx/rxdp
     ath5k_hw_get_tx/rx_buf -> ath5k_hw_get_tx/rxdp
     (We don't put any "buf" we set descriptor pointers on hw)

     ath5k_hw_tx_start -> ath5k_hw_start_tx_dma
     ath5k_hw_start_rx -> ath5k_hw_start_rx_dma
     ath5k_hw_stop_pcu_recv -> ath5k_hw_stop_rx_pcu
     (It's easier this way to identify them, we also
     have ath5k_hw_start_rx_pcu which completes the
     set)

     ath5k_hw_set_intr -> ath5k_hw_set_imr
     (As in get_isr we set imr here, not "intr")

  * Move ath5k_hw_setup_rx_desc on ah->ah_setup_rx_desc so we can
    include support for different rx descriptors in the future

  * Further cleanups so that checkpatch doesn't complain
    (only some > 80 col warnings for eeprom.h and reg.h as usual
    due to comments)

  Tested on 5211 and 5213 cards and works ok.

Changes-licensed-under: ISC
Signed-off-by: NNick Kossifidis <mickflemm@gmail.com>
Acked-by: NLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      c6e387a2
  43. 02 8月, 2008 1 次提交
  45. 08 3月, 2008 1 次提交
  47. 29 1月, 2008 1 次提交