1. 22 9月, 2012 5 次提交
  2. 31 8月, 2012 1 次提交
  3. 29 8月, 2012 1 次提交
  4. 15 8月, 2012 2 次提交
  5. 07 8月, 2012 1 次提交
  6. 27 7月, 2012 20 次提交
  7. 25 7月, 2012 2 次提交
    • S
      ARM: Kirkwood: Fix PHY disable clk problems · b5409430
      Simon Baatz 提交于
      Commit 98d9986c (ARM: Kirkwood: Replace clock gating) and the fix 5fb2ce
      (ARM: Kirkwood: clk_register_gate_fn: add fn assignment) introduced a custom
      variant of clock gating which allows to define a function to be called
      before gating the clock off.
      
      This is used to disable the SATA and PCIe PHYs if the respective clocks
      are unused after initialization.
      
      However, of these two drivers, the SATA driver may be compiled as a module.
      The driver re-enables the clocks at module init but the PHYs stay disabled.
      
      Since the custom clock gating disabled the PHYs when gating the clock off,
      it should also re-enable them when enabling the clock gate.  This is done by
      adding a second function that may be used to enable the PHYs.
      Signed-off-by: NSimon Baatz <gmbnomis@gmail.com>
      Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
      b5409430
    • A
      ARM: Kirkwood: Ensure runit clock always ticks. · f479db44
      Andrew Lunn 提交于
      Marvell engineers tell us:
      
      	It seems that many units use the RUNIT clock.
      	SPI, UART, NAND, TWSI, ...
      	So it's not possible to clock gate it.
      
      Currently the SPI, NAND and TWSI driver will clk_prepaure_enable()
      this clk, but since we have no idea what ... is, and turning this clk
      off results in a hard lock, unconditionally enable runit.
      Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
      Tested-by: NSimon Baatz <gmbnomis@gmail.com>
      f479db44
  8. 24 6月, 2012 2 次提交
  9. 18 6月, 2012 1 次提交
  10. 17 6月, 2012 1 次提交
    • A
      ARM: Kirkwood: Fix clk problems modular ethernet driver · 128789a8
      Andrew Lunn 提交于
      When the ethernet driver was built as a module, it would lock the
      machine when loaded. At boot the ethernet clks are unused, so get
      turned off.  Later, when the module is loaded, the probe function
      would access the hardware before the clock was restarted, and the
      machine would lock. It has also been determined that when the clk is
      turned off, the interface forgets its MAC address, which for most
      systems, is set by the boot loader.
      
      When the machine setup file creates a platform device for the
      interface, prepare and enable the clock for the interface. This will
      ensure it is not turned off. However, if the setup file only
      instantiates one platform device, the other will have its clk
      disabled, thus maybe saving a little power.
      Report-by: NSimon Baatz <gmbnomis@gmail.com>
      Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
      Tested-by: NSimon Baatz <gmbnomis@gmail.com>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      128789a8
  11. 16 5月, 2012 1 次提交
  12. 15 5月, 2012 3 次提交