1. 04 5月, 2012 8 次提交
  2. 21 3月, 2012 1 次提交
  3. 15 12月, 2011 1 次提交
    • G
      ARM: OMAP2+: UART: Remove omap_uart_can_sleep and add pm_qos · 2fd14964
      Govindraj.R 提交于
      Omap_uart_can_sleep function blocks system wide low power state until
      uart is active remove this func and add qos requests to prevent
      MPU from transitioning.
      
      Keep qos request to default value which will allow MPU to transition
      and while uart baud rate is available calculate the latency value
      from the baudrate and use the same to hold constraint while uart clocks
      are enabled, and if uart is auto-idled the constraint is updated with
      default constraint value allowing MPU to transition.
      
      Qos requests are blocking notifier calls so put these requests to
      work queue, also the driver uses irq_safe version of runtime API's
      and callbacks can be called in interrupt disabled context.
      So to avoid warn on slow path warning while using qos update
      API's from runtime callbacks use the qos_work_queue.
      
      During bootup the runtime_resume call backs might not be called and runtime
      callback gets called only after uart is idled by setting the autosuspend
      timeout. So qos_request from runtime resume callback might not activated during
      boot if uart baudrate is calculated during bootup for console uart, so schedule
      the qos_work queue once we calc_latency while configuring the uart port.
      
      Flush and complete any pending qos jobs in work queue while suspending.
      Signed-off-by: NGovindraj.R <govindraj.raja@ti.com>
      Acked-by: Greg Kroah-Hartman <gregkh@suse.de> (for drivers/tty changes)
      Signed-off-by: NKevin Hilman <khilman@ti.com>
      2fd14964
  4. 09 12月, 2011 1 次提交
  5. 06 12月, 2011 1 次提交
  6. 08 11月, 2011 1 次提交
  7. 07 11月, 2011 3 次提交
  8. 20 5月, 2011 4 次提交
    • J
      OMAP3: cpuidle: change the power domains modes determination logic · 04908918
      Jean Pihet 提交于
      The achievable power modes of the power domains in cpuidle
      depends on the system wide 'enable_off_mode' knob in debugfs.
      Upon changing enable_off_mode, do not change the C-states
      'valid' field but instead dynamically restrict the power modes
      when entering idle.
      
      The C-states 'valid' field is just used to enable/disable some
      C-states at init and shall not be changed later on.
      Signed-off-by: NJean Pihet <j-pihet@ti.com>
      Signed-off-by: NKevin Hilman <khilman@ti.com>
      04908918
    • J
      OMAP3: cpuidle: code rework for improved readability · c6cd91de
      Jean Pihet 提交于
      - fix single and multi-lines comments format
      - removed the omap3_idle_bm_check function and replaced the test
         in omap3_enter_idle_bm by the equivalent code
      - re-organize omap3_enter_idle_bm code path, assign local variables
         only when needed
      - reword some comments
      Signed-off-by: NJean Pihet <j-pihet@ti.com>
      Signed-off-by: NKevin Hilman <khilman@ti.com>
      c6cd91de
    • J
      OMAP3: cpuidle: re-organize the C-states data · badc303a
      Jean Pihet 提交于
      The current implementation defines an internal structure and a
      C-states array. Using those structures is redundant to the
      structs used by the cpuidle framework.
      
      This patch provides a clean-up of the internal struct, removes the
      internal C-states array, stores the data using the existing cpuidle
      per C-state struct and registers the mach specific data to cpuidle
      C-state driver_data (accessed using cpuidle_[gs]et_statedata).
      Also removes unused macros, fields and code and compacts the repeating
      code using an inline helper function.
      
      The result is more compact and more readable code as well as
      reduced data RAM usage.
      
      Also retain C1 as the only always valid C-state and system safe state.
      Signed-off-by: NJean Pihet <j-pihet@ti.com>
      Signed-off-by: NKevin Hilman <khilman@ti.com>
      badc303a
    • J
      OMAP3: clean-up mach specific cpuidle data structures · 866ba0ef
      Jean Pihet 提交于
      - sleep_latency and wake_latency are not used, replace them by
        exit_latency which is used by cpuidle. exit_latency simply is
        the sum of sleep_latency and wake_latency,
      - replace threshold by target_residency,
      - changed the OMAP3 specific cpuidle code accordingly,
      - changed the OMAP3 board code accordingly.
      Signed-off-by: NJean Pihet <j-pihet@ti.com>
      Signed-off-by: NKevin Hilman <khilman@ti.com>
      866ba0ef
  9. 31 3月, 2011 1 次提交
  10. 10 3月, 2011 2 次提交
  11. 26 2月, 2011 1 次提交
  12. 13 1月, 2011 1 次提交
  13. 22 12月, 2010 4 次提交
    • P
      OMAP2+: powerdomain: move header file from plat-omap to mach-omap2 · 72e06d08
      Paul Walmsley 提交于
      The OMAP powerdomain code and data is all OMAP2+-specific.  This seems
      unlikely to change any time soon.  Move plat-omap/include/plat/powerdomain.h
      to mach-omap2/powerdomain.h.  The primary point of doing this is to remove
      the temptation for unrelated upper-layer code to access powerdomain code
      and data directly.
      
      As part of this process, remove the references to powerdomain data
      from the GPIO "driver" and the OMAP PM no-op layer, both in plat-omap.
      Change the DSPBridge code to point to the new location for the
      powerdomain headers.  The DSPBridge code should not be including the
      powerdomain headers; these should be removed.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      Cc: Omar Ramirez Luna <omar.ramirez@ti.com>
      Cc: Felipe Contreras <felipe.contreras@gmail.com>
      Cc: Greg Kroah-Hartman <greg@kroah.com>
      72e06d08
    • P
      OMAP2+: clockdomain: move header file from plat-omap to mach-omap2 · 1540f214
      Paul Walmsley 提交于
      The OMAP clockdomain code and data is all OMAP2+-specific.  This seems
      unlikely to change any time soon.  Move plat-omap/include/plat/clockdomain.h
      to mach-omap2/clockdomain.h.  The primary point of doing this is to remove
      the temptation for unrelated upper-layer code to access clockdomain code
      and data directly.
      
      DSPBridge also uses the clockdomain headers for some reason, so,
      modify it also. The DSPBridge code should not be including the
      clockdomain headers; these should be removed.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      Cc: Omar Ramirez Luna <omar.ramirez@ti.com>
      Cc: Felipe Contreras <felipe.contreras@gmail.com>
      Cc: Greg Kroah-Hartman <greg@kroah.com>
      Tested-by: NRajendra Nayak <rnayak@ti.com>
      Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      1540f214
    • E
      OMAP3630: PM: Erratum i583: disable coreoff if < ES1.2 · cc1b6028
      Eduardo Valentin 提交于
      Limitation i583: Self_Refresh Exit issue after OFF mode
      
      Issue:
      When device is waking up from OFF mode, then SDRC state machine sends
      inappropriate sequence violating JEDEC standards.
      
      Impact:
      OMAP3630 < ES1.2 is impacted as follows depending on the platform:
      CS0: for 38.4MHz as internal sysclk, DDR content seen to be stable, while
      	for all other sysclk frequencies, varied levels of instability
      	seen based on varied parameters.
      CS1: impacted
      
      This patch takes option #3 as recommended by the Silicon erratum:
      Avoid core power domain transitioning to OFF mode. Power consumption
      impact is expected in this case.
      To do this, we route core OFF requests to RET request on the impacted
      revisions of silicon.
      Acked-by: NJean Pihet <j-pihet@ti.com>
      
      [nm@ti.com: rebased the code to 2.6.37-rc2- short circuit code changed a bit]
      Signed-off-by: NNishanth Menon <nm@ti.com>
      Signed-off-by: NEduardo Valentin <eduardo.valentin@nokia.com>
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      cc1b6028
    • N
      OMAP3: PM: make omap3_cpuidle_update_states independent of enable_off_mode · 80723c3f
      Nishanth Menon 提交于
      Currently omap3_cpuidle_update_states makes whole sale decision
      on which C states to update based on enable_off_mode variable
      Instead, achieve the same functionality by independently providing
      mpu and core deepest states the system is allowed to achieve and
      update the idle states accordingly.
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      Acked-by: NJean Pihet <j-pihet@ti.com>
      Signed-off-by: NNishanth Menon <nm@ti.com>
      [khilman: fixed additional user of this API in OMAP CPUidle driver]
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      80723c3f
  14. 02 11月, 2010 1 次提交
  15. 09 10月, 2010 1 次提交
    • P
      OMAP: control: move plat-omap/control.h to mach-omap2/control.h · 4814ced5
      Paul Walmsley 提交于
      Only OMAP2+ platforms have the System Control Module (SCM) IP block.
      In the past, we've kept the SCM header file in plat-omap.  This has
      led to abuse - device drivers including it; includes being added that
      create implicit dependencies on OMAP2+ builds; etc.
      
      In response, move the SCM headers into mach-omap2/.
      
      As part of this, remove the direct SCM access from the OMAP UDC
      driver.  It was clearly broken.  The UDC code needs an indepth review for
      use on OMAP2+ chips.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Cory Maccarrone <darkstar6262@gmail.com>
      Cc: Kyungmin Park <kyungmin.park@samsung.com>
      4814ced5
  16. 02 10月, 2010 1 次提交
  17. 24 9月, 2010 1 次提交
    • K
      OMAP3: PM: move device-specific special cases from PM core into CPUidle · e7410cf7
      Kevin Hilman 提交于
      In an effort to simplify the core idle path, move any device-specific
      special case handling from the core PM idle path into the CPUidle
      pre-idle checking path.
      
      This keeps the core, interrupts-disabled idle path streamlined and
      independent of any device-specific handling, and also allows CPUidle
      to do the checking only for certain C-states as needed.  This patch
      has the device checks in place for all states with the CHECK_BM flag,
      namely all states >= C2.
      
      This patch was inspired by a similar patch written by Tero Kristo as
      part of a larger series to add INACTIVE state support.
      
      NOTE: This is a baby-step towards decoupling device idle (or system
      idle) from CPU idle.  Eventually, CPUidle should only manage the CPU,
      and device/system idle should be managed elsewhere.
      
      Cc: Tero Kristo <tero.kristo@nokia.com>
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      e7410cf7
  18. 24 2月, 2010 3 次提交
    • K
      OMAP3: cpuidle: Add valid field into C-state parameter passing · 709731bb
      Kalle Jokiniemi 提交于
      Different boards benefit differently from the available
      seven C-states for cpu idle. In most cases, only few,
      properly spaced (in terms of consumption and latency)
      C-states are required to make the power management
      optimal. Hence we need a possibility to pass which
      C-states are actually used for each board.
      
      So added the valid field to cpuidle_params and added
      support to 3430sdp, which uses the paramenter passing.
      Signed-off-by: NKalle Jokiniemi <kalle.jokiniemi@digia.com>
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      709731bb
    • K
      OMAP3: cpuidle: configure latencies/thresholds from board file · bb4de3df
      Kevin Hilman 提交于
      The CPUidle C state latencies and thresholds are dependent on various
      board specific details.  This patch makes it possible to configure
      these values from the respective board files.
      
      omap3_pm_init_cpuidle() can now be optionally called from board files
      to pass board specific cpuidle parameters.  If the board files do not
      use this function to pass the params default values are used which
      might cause higher consumption dur to wrong state selection by the
      governor.
      
      This patch only updates the 3430sdp board files to use
      omap3_pm_init_cpuidle().
      
      From Kalle, in addition to original patch from Rajendra:
      
      Building without CONFIG_CPU_IDLE or CONFIG_PM causes build to fail if
      cpu idle parameters are tried to pass using omap3_pm_init_cpuidle
      function.
      Signed-off-by: NRajendra Nayak <rnayak@ti.com>
      Signed-off-by: NKalle Jokiniemi <kalle.jokiniemi@digia.com>
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      bb4de3df
    • S
      OMAP3: cpuidle: Update statistics for correct state · 6af83b38
      Sanjeev Premi 提交于
      When 'enable_off_mode' is 0, the target power state for MPU
      and CORE was locally changed to PWRDM_POWER_RET but, the
      statistics are updated for idle state originally selected
      by the governor.
      
      This patch 'invalidates' the idle states that lead either of
      MPU or Core to PWRDM_POWER_OFF state when 'enable_off_mode'
      is '0'. The states are valid once 'enable_off_mode' is set
      to '1'.
      
      Added function next_valid_state() to check if current state
      is valid; else get the next valid state. It is called from
      omap3_enter_idle_bm().
      Signed-off-by: NSanjeev Premi <premi@ti.com>
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      6af83b38
  19. 21 1月, 2010 1 次提交
  20. 12 11月, 2009 3 次提交