1. 09 2月, 2014 1 次提交
  2. 29 10月, 2013 1 次提交
    • P
      perf/x86: Fix NMI measurements · e8a923cc
      Peter Zijlstra 提交于
      OK, so what I'm actually seeing on my WSM is that sched/clock.c is
      'broken' for the purpose we're using it for.
      
      What triggered it is that my WSM-EP is broken :-(
      
        [    0.001000] tsc: Fast TSC calibration using PIT
        [    0.002000] tsc: Detected 2533.715 MHz processor
        [    0.500180] TSC synchronization [CPU#0 -> CPU#6]:
        [    0.505197] Measured 3 cycles TSC warp between CPUs, turning off TSC clock.
        [    0.004000] tsc: Marking TSC unstable due to check_tsc_sync_source failed
      
      For some reason it consistently detects TSC skew, even though NHM+
      should have a single clock domain for 'reasonable' systems.
      
      This marks sched_clock_stable=0, which means that we do fancy stuff to
      try and get a 'sane' clock. Part of this fancy stuff relies on the tick,
      clearly that's gone when NOHZ=y. So for idle cpus time gets stuck, until
      it either wakes up or gets kicked by another cpu.
      
      While this is perfectly fine for the scheduler -- it only cares about
      actually running stuff, and when we're running stuff we're obviously not
      idle. This does somewhat break down for perf which can trigger events
      just fine on an otherwise idle cpu.
      
      So I've got NMIs get get 'measured' as taking ~1ms, which actually
      don't last nearly that long:
      
                <idle>-0     [013] d.h.   886.311970: rcu_nmi_enter <-do_nmi
        ...
                <idle>-0     [013] d.h.   886.311997: perf_sample_event_took: HERE!!! : 1040990
      
      So ftrace (which uses sched_clock(), not the fancy bits) only sees
      ~27us, but we measure ~1ms !!
      
      Now since all this measurement stuff lives in x86 code, we can actually
      fix it.
      Signed-off-by: NPeter Zijlstra <peterz@infradead.org>
      Cc: mingo@kernel.org
      Cc: dave.hansen@linux.intel.com
      Cc: eranian@google.com
      Cc: Don Zickus <dzickus@redhat.com>
      Cc: jmario@redhat.com
      Cc: acme@infradead.org
      Link: http://lkml.kernel.org/r/20131017133350.GG3364@laptop.programming.kicks-ass.netSigned-off-by: NIngo Molnar <mingo@kernel.org>
      e8a923cc
  3. 12 7月, 2013 1 次提交
  4. 23 6月, 2013 2 次提交
    • D
      x86: Add NMI duration tracepoints · 0c4df02d
      Dave Hansen 提交于
      This patch has been invaluable in my adventures finding
      issues in the perf NMI handler.  I'm as big a fan of
      printk() as anybody is, but using printk() in NMIs is
      deadly when they're happening frequently.
      
      Even hacking in trace_printk() ended up eating enough
      CPU to throw off some of the measurements I was making.
      Signed-off-by: NDave Hansen <dave.hansen@linux.intel.com>
      Acked-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: paulus@samba.org
      Cc: acme@ghostprotocols.net
      Cc: Dave Hansen <dave@sr71.net>
      Signed-off-by: NIngo Molnar <mingo@kernel.org>
      0c4df02d
    • D
      x86: Warn when NMI handlers take large amounts of time · 2ab00456
      Dave Hansen 提交于
      I have a system which is causing all kinds of problems.  It has
      8 NUMA nodes, and lots of cores that can fight over cachelines.
      If things are not working _perfectly_, then NMIs can take longer
      than expected.
      
      If we get too many of them backed up to each other, we can
      easily end up in a situation where we are doing nothing *but*
      running NMIs.  The biggest problem, though, is that this happens
      _silently_.  You might be lucky to get an hrtimer warning, but
      most of the time system simply hangs.
      
      This patch should at least give us some warning before we fall
      off the cliff.  the warnings look like this:
      
      	nmi_handle: perf_event_nmi_handler() took: 26095071 ns
      
      The message is triggered whenever we notice the longest NMI
      we've seen to date.  You can always view and reset this value
      via the debugfs interface if you like.
      Signed-off-by: NDave Hansen <dave.hansen@linux.intel.com>
      Acked-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: paulus@samba.org
      Cc: acme@ghostprotocols.net
      Cc: Dave Hansen <dave@sr71.net>
      Signed-off-by: NIngo Molnar <mingo@kernel.org>
      2ab00456
  5. 17 1月, 2013 1 次提交
  6. 09 6月, 2012 2 次提交
    • S
      x86: Save cr2 in NMI in case NMIs take a page fault (for i386) · 70fb74a5
      Steven Rostedt 提交于
      Avi Kivity reported that page faults in NMIs could cause havic if
      the NMI preempted another page fault handler:
      
         The recent changes to NMI allow exceptions to take place in NMI
         handlers, but I think that a #PF (say, due to access to vmalloc space)
         is still problematic.  Consider the sequence
      
          #PF  (cr2 set by processor)
            NMI
              ...
              #PF (cr2 clobbered)
                do_page_fault()
                IRET
              ...
              IRET
            do_page_fault()
              address = read_cr2()
      
         The last line reads the overwritten cr2 value.
      
      This is the i386 version, which has the luxury of doing the work
      in C code.
      
      Link: http://lkml.kernel.org/r/4FBB8C40.6080304@redhat.comReported-by: NAvi Kivity <avi@redhat.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NSteven Rostedt <rostedt@goodmis.org>
      70fb74a5
    • S
      x86: Remove cmpxchg from i386 NMI nesting code · c7d65a78
      Steven Rostedt 提交于
      I've been informed by someone on LWN called 'slashdot' that
      some i386 machines do not support a true cmpxchg. The cmpxchg
      used by the i386 NMI nesting code must be a true cmpxchg as
      disabling interrupts will not work for NMIs (which is the work
      around for i386s that do not have a true cmpxchg).
      
      This 'slashdot' character also suggested a fix to the issue.
      As the state of the nesting NMIs goes as follows:
      
        NOT_RUNNING -> EXECUTING
        EXECUTING   -> NOT_RUNNING
        EXECUTING   -> LATCHED
        LATCHED     -> EXECUTING
      
      Having these states as enum values of:
      
        NOT_RUNNING = 0
        EXECUTING   = 1
        LATCHED     = 2
      
      Instead of a cmpxchg to make EXECUTING -> NOT_RUNNING a
      dec_and_test() would work as well. If the dec_and_test brings
      the state to NOT_RUNNING, that is the same as a cmpxchg
      succeeding to change EXECUTING to NOT_RUNNING. If a nested NMI
      were to come in and change it to LATCHED, the dec_and_test() would
      convert the state to EXECUTING (what we want it to be in such a
      case anyway).
      
      I asked 'slashdot' to post this as a patch, but it never came to
      be. I decided to do the work instead.
      
      Thanks to H. Peter Anvin for suggesting to use this_cpu_dec_and_return()
      instead of local_dec_and_test(&__get_cpu_var()).
      
      Link: http://lwn.net/Articles/484932/
      
      Cc: H. Peter Anvin <hpa@zytor.com>
      Signed-off-by: NSteven Rostedt <rostedt@goodmis.org>
      c7d65a78
  7. 01 6月, 2012 1 次提交
    • S
      x86: Reset the debug_stack update counter · c0525a69
      Steven Rostedt 提交于
      When an NMI goes off and it sees that it preempted the debug stack,
      to keep the debug stack safe, it changes the IDT to point to one that
      does not modify the stack on breakpoint (to allow breakpoints in NMIs).
      
      But the variable that gets set to know to undo it on exit never gets
      cleared on exit. Thus every NMI will reset it on exit the first time
      it is done even if it does not need to be reset.
      
      [ Added H. Peter Anvin's suggestion to use this_cpu_read/write ]
      
      Cc: <stable@vger.kernel.org> # v3.3
      Signed-off-by: NSteven Rostedt <rostedt@goodmis.org>
      c0525a69
  8. 18 5月, 2012 1 次提交
    • P
      MCA: delete all remaining traces of microchannel bus support. · bb8187d3
      Paul Gortmaker 提交于
      Hardware with MCA bus is limited to 386 and 486 class machines
      that are now 20+ years old and typically with less than 32MB
      of memory.  A quick search on the internet, and you see that
      even the MCA hobbyist/enthusiast community has lost interest
      in the early 2000 era and never really even moved ahead from
      the 2.4 kernels to the 2.6 series.
      
      This deletes anything remaining related to CONFIG_MCA from core
      kernel code and from the x86 architecture.  There is no point in
      carrying this any further into the future.
      
      One complication to watch for is inadvertently scooping up
      stuff relating to machine check, since there is overlap in
      the TLA name space (e.g. arch/x86/boot/mca.c).
      
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: James Bottomley <JBottomley@Parallels.com>
      Cc: x86@kernel.org
      Acked-by: NIngo Molnar <mingo@elte.hu>
      Acked-by: NH. Peter Anvin <hpa@zytor.com>
      Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
      bb8187d3
  9. 09 5月, 2012 1 次提交
  10. 28 4月, 2012 1 次提交
    • S
      ftrace/x86: Remove the complex ftrace NMI handling code · 4a6d70c9
      Steven Rostedt 提交于
      As ftrace function tracing would require modifying code that could
      be executed in NMI context, which is not stopped with stop_machine(),
      ftrace had to do a complex algorithm with various stages of setup
      and memory barriers to make it work.
      
      With the new breakpoint method, this is no longer required. The changes
      to the code can be done without any problem in NMI context, as well as
      without stop machine altogether. Remove the complex code as it is
      no longer needed.
      
      Also, a lot of the notrace annotations could be removed from the
      NMI code as it is now safe to trace them. With the exception of
      do_nmi itself, which does some special work to handle running in
      the debug stack. The breakpoint method can cause NMIs to double
      nest the debug stack if it's not setup properly, and that is done
      in do_nmi(), thus that function must not be traced.
      
      (Note the arch sh may want to do the same)
      
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Signed-off-by: NSteven Rostedt <rostedt@goodmis.org>
      4a6d70c9
  11. 25 4月, 2012 2 次提交
    • L
      x86/nmi: Fix page faults by nmiaction if kmemcheck is enabled · 72b3fb24
      Li Zhong 提交于
      This patch tries to fix the problem of page fault exception
      caused by accessing nmiaction structure in nmi if kmemcheck
      is enabled.
      
      If kmemcheck is enabled, the memory allocated through slab are
      in pages that are marked non-present, so that some checks could
      be done in the page fault handling code ( e.g. whether the
      memory is read before written to ).
      
      As nmiaction is allocated in this way, so it resides in a
      non-present page. Then there is a page fault while the nmi code
      accessing the nmiaction structure, which would then cause a
      warning by WARN_ON_ONCE(in_nmi()) in kmemcheck_fault(), called
      by do_page_fault().
      
      This significantly simplifies the code as well, as the whole
      dynamic allocation dance goes away.
      
      v2: as Peter suggested, changed the nmiaction to use static
          storage.
      
      v3: as Peter suggested, use macro to shorten the codes. Also
          keep the original usage of register_nmi_handler, so users of
          this call doesn't need change.
      Tested-by: NSeiji Aguchi <seiji.aguchi@hds.com>
      Fixes: https://lkml.org/lkml/2012/3/2/356Signed-off-by: NLi Zhong <zhong@linux.vnet.ibm.com>
      [ simplified the wrappers ]
      Signed-off-by: NDon Zickus <dzickus@redhat.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: thomas.mingarelli@hp.com
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Link: http://lkml.kernel.org/r/1333051877-15755-4-git-send-email-dzickus@redhat.com
      [ tidied the patch a bit ]
      Signed-off-by: NIngo Molnar <mingo@kernel.org>
      72b3fb24
    • D
      x86/nmi: Add new NMI queues to deal with IO_CHK and SERR · 553222f3
      Don Zickus 提交于
      In discussions with Thomas Mingarelli about hpwdt, he explained
      to me some issues they were some when using their virtual NMI
      button to test the hpwdt driver.
      
      It turns out the virtual NMI button used on HP's machines do no
      send unknown NMIs but instead send IO_CHK NMIs.  The way the
      kernel code is written, the hpwdt driver can not register itself
      against that type of NMI and therefore can not successfully
      capture system information before panic'ing.
      
      To solve this I created two new NMI queues to allow driver to
      register against the IO_CHK and SERR NMIs.  Or in the hpwdt all
      three (if you include unknown NMIs too).
      
      The change is straightforward and just mimics what the unknown
      NMI does.
      Reported-and-tested-by: NThomas Mingarelli <thomas.mingarelli@hp.com>
      Signed-off-by: NDon Zickus <dzickus@redhat.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Link: http://lkml.kernel.org/r/1333051877-15755-3-git-send-email-dzickus@redhat.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      553222f3
  12. 22 12月, 2011 2 次提交
    • S
      x86: Allow NMIs to hit breakpoints in i386 · ccd49c23
      Steven Rostedt 提交于
      With i386, NMIs and breakpoints use the current stack and they
      do not reset the stack pointer to a fix point that might corrupt
      a previous NMI or breakpoint (as it does in x86_64). But NMIs are
      still not made to be re-entrant, and need to prevent the case that
      an NMI hitting a breakpoint (which does an iret), doesn't allow
      another NMI to run.
      
      The fix is to let the NMI be in 3 different states:
      
      1) not running
      2) executing
      3) latched
      
      When no NMI is executing on a given CPU, the state is "not running".
      When the first NMI comes in, the state is switched to "executing".
      On exit of that NMI, a cmpxchg is performed to switch the state
      back to "not running" and if that fails, the NMI is restarted.
      
      If a breakpoint is hit and does an iret, which re-enables NMIs,
      and another NMI comes in before the first NMI finished, it will
      detect that the state is not in the "not running" state and the
      current NMI is nested. In this case, the state is switched to "latched"
      to let the interrupted NMI know to restart the NMI handler, and
      the nested NMI exits without doing anything.
      
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: H. Peter Anvin <hpa@linux.intel.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Paul Turner <pjt@google.com>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
      Signed-off-by: NSteven Rostedt <rostedt@goodmis.org>
      ccd49c23
    • S
      x86: Keep current stack in NMI breakpoints · 228bdaa9
      Steven Rostedt 提交于
      We want to allow NMI handlers to have breakpoints to be able to
      remove stop_machine from ftrace, kprobes and jump_labels. But if
      an NMI interrupts a current breakpoint, and then it triggers a
      breakpoint itself, it will switch to the breakpoint stack and
      corrupt the data on it for the breakpoint processing that it
      interrupted.
      
      Instead, have the NMI check if it interrupted breakpoint processing
      by checking if the stack that is currently used is a breakpoint
      stack. If it is, then load a special IDT that changes the IST
      for the debug exception to keep the same stack in kernel context.
      When the NMI is done, it puts it back.
      
      This way, if the NMI does trigger a breakpoint, it will keep
      using the same stack and not stomp on the breakpoint data for
      the breakpoint it interrupted.
      Suggested-by: NPeter Zijlstra <peterz@infradead.org>
      Signed-off-by: NSteven Rostedt <rostedt@goodmis.org>
      228bdaa9
  13. 11 11月, 2011 1 次提交
  14. 10 11月, 2011 1 次提交
    • J
      x86/mrst: Avoid reporting wrong nmi status · 064a59b6
      Jacob Pan 提交于
      Moorestown/Medfield platform does not have port 0x61 to report
      NMI status, nor does it have external NMI sources. The only NMI
      sources are from lapic, as results of perf counter overflow or
      IPI, e.g. NMI watchdog or spin lock debug.
      
      Reading port 0x61 on Moorestown will return 0xff which misled
      NMI handlers to false critical errors such memory parity error.
      The subsequent ioport access for NMI handling can also cause
      undefined behavior on Moorestown.
      
      This patch allows kernel process NMI due to watchdog or backrace
      dump without unnecessary hangs.
      Signed-off-by: NJacob Pan <jacob.jun.pan@linux.intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      [hand applied]
      Signed-off-by: NAlan Cox <alan@linux.intel.com>
      064a59b6
  15. 01 11月, 2011 1 次提交
    • P
      x86: Fix files explicitly requiring export.h for EXPORT_SYMBOL/THIS_MODULE · 69c60c88
      Paul Gortmaker 提交于
      These files were implicitly getting EXPORT_SYMBOL via device.h
      which was including module.h, but that will be fixed up shortly.
      
      By fixing these now, we can avoid seeing things like:
      
      arch/x86/kernel/rtc.c:29: warning: type defaults to ‘int’ in declaration of ‘EXPORT_SYMBOL’
      arch/x86/kernel/pci-dma.c:20: warning: type defaults to ‘int’ in declaration of ‘EXPORT_SYMBOL’
      arch/x86/kernel/e820.c:69: warning: type defaults to ‘int’ in declaration of ‘EXPORT_SYMBOL_GPL’
      
      [ with input from Randy Dunlap <rdunlap@xenotime.net> and also
        from Stephen Rothwell <sfr@canb.auug.org.au> ]
      Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
      69c60c88
  16. 10 10月, 2011 6 次提交
    • I
      x86, nmi, drivers: Fix nmi splitup build bug · d48b0e17
      Ingo Molnar 提交于
      nmi.c needs an #include <linux/mca.h>:
      
       arch/x86/kernel/nmi.c: In function ‘unknown_nmi_error’:
       arch/x86/kernel/nmi.c:286:6: error: ‘MCA_bus’ undeclared (first use in this function)
       arch/x86/kernel/nmi.c:286:6: note: each undeclared identifier is reported only once for each function it appears in
      
      Another one is the hpwdt driver:
      
       drivers/watchdog/hpwdt.c:507:9: error: ‘NMI_DONE’ undeclared (first use in this function)
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      d48b0e17
    • D
      x86, nmi: Track NMI usage stats · efc3aac5
      Don Zickus 提交于
      Now that the NMI handler are broken into lists, increment the appropriate
      stats for each list.  This allows us to see what is going on when they
      get printed out in the next patch.
      Signed-off-by: NDon Zickus <dzickus@redhat.com>
      Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Link: http://lkml.kernel.org/r/1317409584-23662-6-git-send-email-dzickus@redhat.comSigned-off-by: NIngo Molnar <mingo@elte.hu>
      efc3aac5
    • D
      x86, nmi: Add in logic to handle multiple events and unknown NMIs · b227e233
      Don Zickus 提交于
      Previous patches allow the NMI subsystem to process multipe NMI events
      in one NMI.  As previously discussed this can cause issues when an event
      triggered another NMI but is processed in the current NMI.  This causes the
      next NMI to go unprocessed and become an 'unknown' NMI.
      
      To handle this, we first have to flag whether or not the NMI handler handled
      more than one event or not.  If it did, then there exists a chance that
      the next NMI might be already processed.  Once the NMI is flagged as a
      candidate to be swallowed, we next look for a back-to-back NMI condition.
      
      This is determined by looking at the %rip from pt_regs.  If it is the same
      as the previous NMI, it is assumed the cpu did not have a chance to jump
      back into a non-NMI context and execute code and instead handled another NMI.
      
      If both of those conditions are true then we will swallow any unknown NMI.
      
      There still exists a chance that we accidentally swallow a real unknown NMI,
      but for now things seem better.
      
      An optimization has also been added to the nmi notifier rountine.  Because x86
      can latch up to one NMI while currently processing an NMI, we don't have to
      worry about executing _all_ the handlers in a standalone NMI.  The idea is
      if multiple NMIs come in, the second NMI will represent them.  For those
      back-to-back NMI cases, we have the potentail to drop NMIs.  Therefore only
      execute all the handlers in the second half of a detected back-to-back NMI.
      Signed-off-by: NDon Zickus <dzickus@redhat.com>
      Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Link: http://lkml.kernel.org/r/1317409584-23662-5-git-send-email-dzickus@redhat.comSigned-off-by: NIngo Molnar <mingo@elte.hu>
      b227e233
    • D
      x86, nmi: Wire up NMI handlers to new routines · 9c48f1c6
      Don Zickus 提交于
      Just convert all the files that have an nmi handler to the new routines.
      Most of it is straight forward conversion.  A couple of places needed some
      tweaking like kgdb which separates the debug notifier from the nmi handler
      and mce removes a call to notify_die.
      
      [Thanks to Ying for finding out the history behind that mce call
      
      https://lkml.org/lkml/2010/5/27/114
      
      And Boris responding that he would like to remove that call because of it
      
      https://lkml.org/lkml/2011/9/21/163]
      
      The things that get converted are the registeration/unregistration routines
      and the nmi handler itself has its args changed along with code removal
      to check which list it is on (most are on one NMI list except for kgdb
      which has both an NMI routine and an NMI Unknown routine).
      Signed-off-by: NDon Zickus <dzickus@redhat.com>
      Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Acked-by: NCorey Minyard <minyard@acm.org>
      Cc: Jason Wessel <jason.wessel@windriver.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Robert Richter <robert.richter@amd.com>
      Cc: Huang Ying <ying.huang@intel.com>
      Cc: Corey Minyard <minyard@acm.org>
      Cc: Jack Steiner <steiner@sgi.com>
      Link: http://lkml.kernel.org/r/1317409584-23662-4-git-send-email-dzickus@redhat.comSigned-off-by: NIngo Molnar <mingo@elte.hu>
      9c48f1c6
    • D
      x86, nmi: Create new NMI handler routines · c9126b2e
      Don Zickus 提交于
      The NMI handlers used to rely on the notifier infrastructure.  This worked
      great until we wanted to support handling multiple events better.
      
      One of the key ideas to the nmi handling is to process _all_ the handlers for
      each NMI.  The reason behind this switch is because NMIs are edge triggered.
      If enough NMIs are triggered, then they could be lost because the cpu can
      only latch at most one NMI (besides the one currently being processed).
      
      In order to deal with this we have decided to process all the NMI handlers
      for each NMI.  This allows the handlers to determine if they recieved an
      event or not (the ones that can not determine this will be left to fend
      for themselves on the unknown NMI list).
      
      As a result of this change it is now possible to have an extra NMI that
      was destined to be received for an already processed event.  Because the
      event was processed in the previous NMI, this NMI gets dropped and becomes
      an 'unknown' NMI.  This of course will cause printks that scare people.
      
      However, we prefer to have extra NMIs as opposed to losing NMIs and as such
      are have developed a basic mechanism to catch most of them.  That will be
      a later patch.
      
      To accomplish this idea, I unhooked the nmi handlers from the notifier
      routines and created a new mechanism loosely based on doIRQ.  The reason
      for this is the notifier routines have a couple of shortcomings.  One we
      could't guarantee all future NMI handlers used NOTIFY_OK instead of
      NOTIFY_STOP.  Second, we couldn't keep track of the number of events being
      handled in each routine (most only handle one, perf can handle more than one).
      Third, I wanted to eventually display which nmi handlers are registered in
      the system in /proc/interrupts to help see who is generating NMIs.
      
      The patch below just implements the new infrastructure but doesn't wire it up
      yet (that is the next patch).  Its design is based on doIRQ structs and the
      atomic notifier routines.  So the rcu stuff in the patch isn't entirely untested
      (as the notifier routines have soaked it) but it should be double checked in
      case I copied the code wrong.
      Signed-off-by: NDon Zickus <dzickus@redhat.com>
      Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Link: http://lkml.kernel.org/r/1317409584-23662-3-git-send-email-dzickus@redhat.comSigned-off-by: NIngo Molnar <mingo@elte.hu>
      c9126b2e
    • D
      x86, nmi: Split out nmi from traps.c · 1d48922c
      Don Zickus 提交于
      The nmi stuff is changing a lot and adding more functionality.  Split it
      out from the traps.c file so it doesn't continue to pollute that file.
      
      This makes it easier to find and expand all the future nmi related work.
      
      No real functional changes here.
      Signed-off-by: NDon Zickus <dzickus@redhat.com>
      Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Link: http://lkml.kernel.org/r/1317409584-23662-2-git-send-email-dzickus@redhat.comSigned-off-by: NIngo Molnar <mingo@elte.hu>
      1d48922c
  17. 18 2月, 2009 2 次提交
  18. 17 2月, 2009 1 次提交
  19. 29 1月, 2009 1 次提交
  20. 18 1月, 2009 1 次提交
  21. 06 1月, 2009 1 次提交
  22. 03 1月, 2009 1 次提交
  23. 31 10月, 2008 1 次提交
  24. 28 10月, 2008 2 次提交
  25. 23 9月, 2008 1 次提交
    • A
      x86, NMI watchdog: setup before enabling NMI watchdog · b3e15bde
      Aristeu Rozanski 提交于
      There's a small window when NMI watchdog is being set up that if any NMIs
      are triggered, the NMI code will make make use of not initalized wd_ops
      elements:
      	void setup_apic_nmi_watchdog(void *unused)
      	{
      		if (__get_cpu_var(wd_enabled))
      			return;
      
      		/* cheap hack to support suspend/resume */
      		/* if cpu0 is not active neither should the other cpus */
      		if (smp_processor_id() != 0 && atomic_read(&nmi_active) <= 0)
      			return;
      
      		switch (nmi_watchdog) {
      		case NMI_LOCAL_APIC:
      			/* enable it before to avoid race with handler */
      -->			__get_cpu_var(wd_enabled) = 1;
      -->			if (lapic_watchdog_init(nmi_hz) < 0) {
      (...)
      	asmlinkage notrace __kprobes void default_do_nmi(struct pt_regs *regs)
      	{
      	(...)
      			if (nmi_watchdog_tick(regs, reason))
      				return;
      (...)
      	notrace __kprobes int
      	nmi_watchdog_tick(struct pt_regs *regs, unsigned reason)
      	{
      	(...)
      		if (!__get_cpu_var(wd_enabled))
      			return rc;
      		switch (nmi_watchdog) {
      		case NMI_LOCAL_APIC:
      			rc |= lapic_wd_event(nmi_hz);
      (...)
      int lapic_wd_event(unsigned nmi_hz)
      {
      	struct nmi_watchdog_ctlblk *wd = &__get_cpu_var(nmi_watchdog_ctlblk);
      	u64 ctr;
      
      -->	rdmsrl(wd->perfctr_msr, ctr);
      
      and wd->*_msr will be initialized on each processor type specific setup, after
      enabling NMIs for PMIs. Since the counter was just set, the chances of an
      performance counter generated NMI is minimal, but any other unknown NMI would
      trigger the problem. This patch fixes the problem by setting everything up
      before enabling performance counter generated NMIs and will set wd_enabled
      using a callback function.
      Signed-off-by: NAristeu Rozanski <aris@redhat.com>
      Acked-by: NDon Zickus <dzickus@redhat.com>
      Acked-by: NPrarit Bhargava <prarit@redhat.com>
      Acked-by: NVivek Goyal <vgoyal@redhat.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      b3e15bde
  26. 15 8月, 2008 2 次提交
    • I
      x86, nmi: clean UP NMI watchdog failure message · 8bb85190
      Ingo Molnar 提交于
      clean up the failure message - and redirect people to bugzilla
      instead of lkml.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      8bb85190
    • A
      x86, NMI: fix watchdog failure message · 15636668
      Aristeu Rozanski 提交于
      > it just won't work at boot time - the second logic unit will be stuck:
      >
      > Booting processor 1/2 APIC 0x1
      > Initializing CPU#1
      > Calibrating delay using timer specific routine.. 5586.12 BogoMIPS (lpj=2793063)
      > CPU: Trace cache: 12K uops, L1 D cache: 16K
      > CPU: L2 cache: 1024K
      > CPU: Physical Processor ID: 0
      > CPU: Processor Core ID: 1
      > CPU1: Thermal monitoring enabled (TM1)
      >               Intel(R) Pentium(R) D CPU 2.80GHz stepping 04
      > Brought up 2 CPUs
      > testing NMI watchdog ... <4>WARNING: CPU#1: NMI appears to be stuck (0->0)!
      
      while at it... - fix that newline
      Signed-off-by: NAristeu Rozanski <aris@redhat.com>
      Cc: jvillalo@redhat.com
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      15636668
  27. 20 7月, 2008 1 次提交
  28. 18 7月, 2008 1 次提交
    • M
      x86: APIC: remove apic_write_around(); use alternatives · 593f4a78
      Maciej W. Rozycki 提交于
      Use alternatives to select the workaround for the 11AP Pentium erratum
      for the affected steppings on the fly rather than build time.  Remove the
      X86_GOOD_APIC configuration option and replace all the calls to
      apic_write_around() with plain apic_write(), protecting accesses to the
      ESR as appropriate due to the 3AP Pentium erratum.  Remove
      apic_read_around() and all its invocations altogether as not needed.
      Remove apic_write_atomic() and all its implementing backends.  The use of
      ASM_OUTPUT2() is not strictly needed for input constraints, but I have
      used it for readability's sake.
      
      I had the feeling no one else was brave enough to do it, so I went ahead
      and here it is.  Verified by checking the generated assembly and tested
      with both a 32-bit and a 64-bit configuration, also with the 11AP
      "feature" forced on and verified with gdb on /proc/kcore to work as
      expected (as an 11AP machines are quite hard to get hands on these days).
      Some script complained about the use of "volatile", but apic_write() needs
      it for the same reason and is effectively a replacement for writel(), so I
      have disregarded it.
      
      I am not sure what the policy wrt defconfig files is, they are generated
      and there is risk of a conflict resulting from an unrelated change, so I
      have left changes to them out.  The option will get removed from them at
      the next run.
      
      Some testing with machines other than mine will be needed to avoid some
      stupid mistake, but despite its volume, the change is not really that
      intrusive, so I am fairly confident that because it works for me, it will
      everywhere.
      Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      593f4a78