1. 25 5月, 2011 9 次提交
    • P
      mmc: core: eMMC signal voltage does not use CMD11 · 261bbd46
      Philip Rakity 提交于
      eMMC chips do not use CMD11 when changing voltage.  Add extra
      argument to call to indicate if CMD11 needs to be sent.
      Signed-off-by: NPhilip Rakity <prakity@marvell.com>
      Reviewed-by: NArindam Nath <arindam.nath@amd.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      261bbd46
    • A
      mmc: sdhci: enable preset value after uhs initialization · 4d55c5a1
      Arindam Nath 提交于
      According to the Host Controller spec v3.00, setting Preset Value Enable
      in the Host Control2 register lets SDCLK Frequency Select, Clock Generator
      Select and Driver Strength Select to be set automatically by the Host
      Controller based on the UHS-I mode set. This patch enables this feature.
      Since Preset Value Enable makes sense only for UHS-I cards, we enable this
      feature after successfull UHS-I initialization. We also reset Preset Value
      Enable next time before initialization.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      4d55c5a1
    • A
      mmc: sd: add support for tuning during uhs initialization · b513ea25
      Arindam Nath 提交于
      Host Controller needs tuning during initialization to operate SDR50
      and SDR104 UHS-I cards. Whether SDR50 mode actually needs tuning is
      indicated by bit 45 of the Host Controller Capabilities register.
      A new command CMD19 has been defined in the Physical Layer spec
      v3.01 to request the card to send tuning pattern.
      
      We enable Buffer Read Ready interrupt at the very begining of tuning
      procedure, because that is the only interrupt generated by the Host
      Controller during tuning. We program the block size to 64 in the
      Block Size register. We make sure that DMA Enable and Multi Block
      Select in the Transfer Mode register are set to 0 before actually
      sending CMD19. The tuning block is sent by the card to the Host
      Controller using DAT lines, so we set Data Present Select (bit 5) in
      the Command register. The Host Controller is responsible for doing
      the verfication of tuning block sent by the card at the hardware
      level. After sending CMD19, we wait for Buffer Read Ready interrupt.
      In case we don't receive an interrupt after the specified timeout
      value, we fall back on fixed sampling clock by setting Execute
      Tuning (bit 6) and Sampling Clock Select (bit 7) of Host Control2
      register to 0. Before exiting the tuning procedure, we disable Buffer
      Read Ready interrupt and re-enable other interrupts.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      b513ea25
    • A
      mmc: sd: report correct speed and capacity of uhs cards · 3a303511
      Arindam Nath 提交于
      Since only UHS-I cards respond with S18A set in response to ACMD41,
      we set the card as ultra-high-speed after successfull initialization.
      We need to decide whether a card is SDXC based on the C_SIZE field
      of CSDv2.0 register. According to Physical Layer spec v3.01, the
      minimum value of C_SIZE for SDXC card is 00FFFFh.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      3a303511
    • A
      mmc: sd: set current limit for uhs cards · 5371c927
      Arindam Nath 提交于
      We decide on the current limit to be set for the card based on the
      Capability of Host Controller to provide current at 1.8V signalling,
      and the maximum current limit of the card as indicated by CMD6
      mode 0. We then set the current limit for the card using CMD6 mode 1.
      As per the Physical Layer Spec v3.01, the current limit switch is
      only applicable for SDR50, SDR104, and DDR50 bus speed modes. For
      other UHS-I modes, we set the default current limit of 200mA.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      5371c927
    • A
      mmc: sd: add support for uhs bus speed mode selection · 49c468fc
      Arindam Nath 提交于
      This patch adds support for setting UHS-I bus speed mode during UHS-I
      initialization procedure. Since both the host and card can support
      more than one bus speed, we select the highest speed based on both of
      their capabilities. First we set the bus speed mode for the card using
      CMD6 mode 1, and then we program the host controller to support the
      required speed mode. We also set High Speed Enable in case one of the
      UHS-I modes is selected. We take care to reset SD clock before setting
      UHS mode in the Host Control2 register, and then re-enable it as per
      the Host Controller spec v3.00. We then set the clock frequency for
      the UHS-I mode selected.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      49c468fc
    • A
      mmc: sd: add support for driver type selection · d6d50a15
      Arindam Nath 提交于
      This patch adds support for setting driver strength during UHS-I
      initialization procedure. Since UHS-I cards set S18A (bit 24) in
      response to ACMD41, we use this as a base for UHS-I initialization.
      We modify the parameter list of mmc_sd_get_cid() so that we can
      save the ROCR from ACMD41 to check whether bit 24 is set.
      
      We decide whether the Host Controller supports A, C, or D driver
      type depending on the Capabilities register. Driver type B is
      suported by default. We then set the appropriate driver type for
      the card using CMD6 mode 1. As per Host Controller spec v3.00, we
      set driver type for the host only if Preset Value Enable in the
      Host Control2 register is not set. SDHCI_HOST_CONTROL has been
      renamed to SDHCI_HOST_CONTROL1 to conform to the spec.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      d6d50a15
    • A
      mmc: sd: query function modes for uhs cards · 013909c4
      Arindam Nath 提交于
      SD cards which conform to Physical Layer Spec v3.01 can support
      additional Bus Speed Modes, Driver Strength, and Current Limit
      other than the default values. We use CMD6 mode 0 to read these
      additional card functions. The values read here will be used
      during UHS-I initialization steps.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      013909c4
    • A
      mmc: sd: add support for signal voltage switch procedure · f2119df6
      Arindam Nath 提交于
      Host Controller v3.00 adds another Capabilities register. Apart
      from other things, this new register indicates whether the Host
      Controller supports SDR50, SDR104, and DDR50 UHS-I modes. The spec
      doesn't mention about explicit support for SDR12 and SDR25 UHS-I
      modes, so the Host Controller v3.00 should support them by default.
      Also if the controller supports SDR104 mode, it will also support
      SDR50 mode as well. So depending on the host support, we set the
      corresponding MMC_CAP_* flags. One more new register. Host Control2
      is added in v3.00, which is used during Signal Voltage Switch
      procedure described below.
      
      Since as per v3.00 spec, UHS-I supported hosts should set S18R
      to 1, we set S18R (bit 24) of OCR before sending ACMD41. We also
      need to set XPC (bit 28) of OCR in case the host can supply >150mA.
      This support is indicated by the Maximum Current Capabilities
      register of the Host Controller.
      
      If the response of ACMD41 has both CCS and S18A set, we start the
      signal voltage switch procedure, which if successfull, will switch
      the card from 3.3V signalling to 1.8V signalling. Signal voltage
      switch procedure adds support for a new command CMD11 in the
      Physical Layer Spec v3.01. As part of this procedure, we need to
      set 1.8V Signalling Enable (bit 3) of Host Control2 register, which
      if remains set after 5ms, means the switch to 1.8V signalling is
      successfull. Otherwise, we clear bit 24 of OCR and retry the
      initialization sequence. When we remove the card, and insert the
      same or another card, we need to make sure that we start with 3.3V
      signalling voltage. So we call mmc_set_signal_voltage() with
      MMC_SIGNAL_VOLTAGE_330 set so that we are back to 3.3V signalling
      voltage before we actually start initializing the card.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      f2119df6
  2. 16 3月, 2011 1 次提交
  3. 09 1月, 2011 2 次提交
  4. 23 10月, 2010 2 次提交
  5. 12 8月, 2010 1 次提交
    • A
      mmc: add erase, secure erase, trim and secure trim operations · dfe86cba
      Adrian Hunter 提交于
      SD/MMC cards tend to support an erase operation.  In addition, eMMC v4.4
      cards can support secure erase, trim and secure trim operations that are
      all variants of the basic erase command.
      
      SD/MMC device attributes "erase_size" and "preferred_erase_size" have been
      added.
      
      "erase_size" is the minimum size, in bytes, of an erase operation.  For
      MMC, "erase_size" is the erase group size reported by the card.  Note that
      "erase_size" does not apply to trim or secure trim operations where the
      minimum size is always one 512 byte sector.  For SD, "erase_size" is 512
      if the card is block-addressed, 0 otherwise.
      
      SD/MMC cards can erase an arbitrarily large area up to and
      including the whole card.  When erasing a large area it may
      be desirable to do it in smaller chunks for three reasons:
      
          1. A single erase command will make all other I/O on the card
             wait.  This is not a problem if the whole card is being erased, but
             erasing one partition will make I/O for another partition on the
             same card wait for the duration of the erase - which could be a
             several minutes.
      
          2. To be able to inform the user of erase progress.
      
          3. The erase timeout becomes too large to be very useful.
             Because the erase timeout contains a margin which is multiplied by
             the size of the erase area, the value can end up being several
             minutes for large areas.
      
      "erase_size" is not the most efficient unit to erase (especially for SD
      where it is just one sector), hence "preferred_erase_size" provides a good
      chunk size for erasing large areas.
      
      For MMC, "preferred_erase_size" is the high-capacity erase size if a card
      specifies one, otherwise it is based on the capacity of the card.
      
      For SD, "preferred_erase_size" is the allocation unit size specified by
      the card.
      
      "preferred_erase_size" is in bytes.
      Signed-off-by: NAdrian Hunter <adrian.hunter@nokia.com>
      Acked-by: NJens Axboe <axboe@kernel.dk>
      Cc: Kyungmin Park <kmpark@infradead.org>
      Cc: Madhusudhan Chikkature <madhu.cr@ti.com>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Ben Gardiner <bengardiner@nanometrics.ca>
      Cc: <linux-mmc@vger.kernel.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      dfe86cba
  6. 11 8月, 2010 1 次提交
    • M
      mmc: split mmc_sd_init_card() · 71578a1e
      Michal Miroslaw 提交于
      This series adds support for SD combo cards to MMC/SD driver stack.
      
      SD combo consists of SD memory and SDIO parts in one package.  Since the
      parts have a separate SD command sets, after initialization, they can be
      treated as independent cards on one bus.
      
      Changes are divided into two patches.  First is just moving initialization
      code around so that SD memory part init can be called from SDIO init.
      Second patch is a proper change enabling SD memory along SDIO.  I tried to
      move as much no-op changes to the first patch so that it's easier to
      follow the required changes to initialization flow for SDIO cards.
      
      This is based on Simplified SDIO spec v.2.00.  The init sequence is
      slightly modified to follow current SD memory init implementation.
      Command sequences, assuming SD memory and SDIO indeed ignore unknown
      commands, are the same as before for both parts.
      
      This patch:
      
      Prepare for SD-combo (IO+mem) support by splitting SD memory
      card init and related functions.
      Signed-off-by: NMichal Miroslaw <mirq-linux@rere.qmqm.pl>
      Cc: Adrian Hunter <adrian.hunter@nokia.com>
      Cc: Chris Ball <cjb@laptop.org>
      Cc: <linux-mmc@vger.kernel.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      71578a1e
  7. 30 3月, 2010 1 次提交
    • T
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking... · 5a0e3ad6
      Tejun Heo 提交于
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
      
      percpu.h is included by sched.h and module.h and thus ends up being
      included when building most .c files.  percpu.h includes slab.h which
      in turn includes gfp.h making everything defined by the two files
      universally available and complicating inclusion dependencies.
      
      percpu.h -> slab.h dependency is about to be removed.  Prepare for
      this change by updating users of gfp and slab facilities include those
      headers directly instead of assuming availability.  As this conversion
      needs to touch large number of source files, the following script is
      used as the basis of conversion.
      
        http://userweb.kernel.org/~tj/misc/slabh-sweep.py
      
      The script does the followings.
      
      * Scan files for gfp and slab usages and update includes such that
        only the necessary includes are there.  ie. if only gfp is used,
        gfp.h, if slab is used, slab.h.
      
      * When the script inserts a new include, it looks at the include
        blocks and try to put the new include such that its order conforms
        to its surrounding.  It's put in the include block which contains
        core kernel includes, in the same order that the rest are ordered -
        alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
        doesn't seem to be any matching order.
      
      * If the script can't find a place to put a new include (mostly
        because the file doesn't have fitting include block), it prints out
        an error message indicating which .h file needs to be added to the
        file.
      
      The conversion was done in the following steps.
      
      1. The initial automatic conversion of all .c files updated slightly
         over 4000 files, deleting around 700 includes and adding ~480 gfp.h
         and ~3000 slab.h inclusions.  The script emitted errors for ~400
         files.
      
      2. Each error was manually checked.  Some didn't need the inclusion,
         some needed manual addition while adding it to implementation .h or
         embedding .c file was more appropriate for others.  This step added
         inclusions to around 150 files.
      
      3. The script was run again and the output was compared to the edits
         from #2 to make sure no file was left behind.
      
      4. Several build tests were done and a couple of problems were fixed.
         e.g. lib/decompress_*.c used malloc/free() wrappers around slab
         APIs requiring slab.h to be added manually.
      
      5. The script was run on all .h files but without automatically
         editing them as sprinkling gfp.h and slab.h inclusions around .h
         files could easily lead to inclusion dependency hell.  Most gfp.h
         inclusion directives were ignored as stuff from gfp.h was usually
         wildly available and often used in preprocessor macros.  Each
         slab.h inclusion directive was examined and added manually as
         necessary.
      
      6. percpu.h was updated not to include slab.h.
      
      7. Build test were done on the following configurations and failures
         were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
         distributed build env didn't work with gcov compiles) and a few
         more options had to be turned off depending on archs to make things
         build (like ipr on powerpc/64 which failed due to missing writeq).
      
         * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
         * powerpc and powerpc64 SMP allmodconfig
         * sparc and sparc64 SMP allmodconfig
         * ia64 SMP allmodconfig
         * s390 SMP allmodconfig
         * alpha SMP allmodconfig
         * um on x86_64 SMP allmodconfig
      
      8. percpu.h modifications were reverted so that it could be applied as
         a separate patch and serve as bisection point.
      
      Given the fact that I had only a couple of failures from tests on step
      6, I'm fairly confident about the coverage of this conversion patch.
      If there is a breakage, it's likely to be something in one of the arch
      headers which should be easily discoverable easily on most builds of
      the specific arch.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
      5a0e3ad6
  8. 16 12月, 2009 1 次提交
    • B
      mmc: add module parameter to set whether cards are assumed removable · bd68e083
      Ben Hutchings 提交于
      Some people run general-purpose distribution kernels on netbooks with
      a card that is physically non-removable or logically non-removable
      (e.g. used for /home) and cannot be cleanly unmounted during suspend.
      Add a module parameter to set whether cards are assumed removable or
      non-removable, with the default set by CONFIG_MMC_UNSAFE_RESUME.
      
      In general, it is not possible to tell whether a card present in an MMC
      slot after resume is the same that was there before suspend.  So there are
      two possible behaviours, each of which will cause data loss in some cases:
      
      CONFIG_MMC_UNSAFE_RESUME=n (default): Cards are assumed to be removed
      during suspend.  Any filesystem on them must be unmounted before suspend;
      otherwise, buffered writes will be lost.
      
      CONFIG_MMC_UNSAFE_RESUME=y: Cards are assumed to remain present during
      suspend.  They must not be swapped during suspend; otherwise, buffered
      writes will be flushed to the wrong card.
      
      Currently the choice is made at compile time and this allows that to be
      overridden at module load time.
      Signed-off-by: NBen Hutchings <ben@decadent.org.uk>
      Cc: Wouter van Heyst <larstiq@larstiq.dyndns.org>
      Cc: <linux-mmc@vger.kernel.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      bd68e083
  9. 23 9月, 2009 4 次提交
  10. 16 9月, 2009 1 次提交
  11. 09 4月, 2009 1 次提交
  12. 15 7月, 2008 2 次提交
    • D
      MMC: Trivial comment cleanup · 8769392b
      Deepak Saxena 提交于
      Make the variable name in the comments match the actual name
      of the variable.
      Signed-off-by: NDeepak Saxena <dsaxena@laptop.org>
      Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
      8769392b
    • A
      mmc: change .get_ro() callback semantics · 08f80bb5
      Anton Vorontsov 提交于
      Now get_ro() callback must return 0/1 values for its logical states, and
      negative errno values in case of error. If particular host instance doesn't
      support RO/WP switch, it should return -ENOSYS.
      
      This patch changes some hosts in two ways:
      
      1. Now functions should be smart to not return negative values in
         "RO asserted" case (particularly gpio_ calls could return negative
         values for the outermost GPIOs).
      
         Also, board code usually passes get_ro() callbacks that directly return
         gpioreg & bit result, so at91_mci, imxmmc, pxamci and mmc_spi's get_ro()
         handlers need take special care when returning platform's values to the
         mmc core.
      
      2. In case of host instance didn't implement get_ro() callback, it should
         really return -ENOSYS and let the mmc core decide what to do about it
         (mmc core thinks the same way as the hosts, so it isn't functional
         change).
      Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
      Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
      08f80bb5
  13. 23 3月, 2008 1 次提交
  14. 24 9月, 2007 2 次提交
    • D
      MMC core learns about SPI · af517150
      David Brownell 提交于
      Teach the MMC/SD/SDIO core about using SPI mode.
      
       - Use mmc_host_is_spi() so enumeration works through SPI signaling
         and protocols, not just the native versions.
      
       - Provide the SPI response type flags with each request issued,
         including requests from the new lock/unlock code.
      
       - Understand that cmd->resp[0] and mmc_get_status() results for SPI
         return different values than for "native" MMC/SD protocol; this
         affects resetting, checking card lock status, and some others.
      
       - Understand that some commands act a bit differently ... notably:
           * OP_COND command doesn't return the OCR
           * APP_CMD status doesn't have an R1_APP_CMD analogue
      
      Those changes required some new and updated primitives:
      
       - Provide utilities to access two SPI-only requests, and one
         request that wasn't previously needed:
           * mmc_spi_read_ocr() ... SPI only
           * mmc_spi_set_crc() ... SPI only (override by module parm)
           * mmc_send_cid() ... for use without broadcast mode
      
       - Updated internal routines:
           * Previous mmc_send_csd() modified into mmc_send_cxd_native();
             it uses native "R2" responses, which include 16 bytes of data.
           * Previous mmc_send_ext_csd() becomes new mmc_send_cxd_data()
             helper for command-and-data access
           * Bugfix to that mmc_send_cxd_data() code:  dma-to-stack is
             unsafe/nonportable, so kmalloc a bounce buffer instead.
      
       - Modified mmc_send_ext_csd() now uses mmc_send_cxd_data() helper
      
       - Modified mmc_send_csd(), and new mmc_spi_send_cid(), routines use
         those helper routines based on whether they're native or SPI
      
      The newest categories of cards supported by the MMC stack aren't expected
      to work yet with SPI:  MMC or SD cards with over 4GB data, and SDIO.
      All those cards support SPI mode, so eventually they should work too.
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
      af517150
    • P
      mmc: replace BUG_ON with WARN_ON · d84075c8
      Pierre Ossman 提交于
      Replace all cases of BUG_ON with WARN_ON where there is a chance
      (with varying degrees of slim) that the kernel can continue without
      incidence.
      Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
      d84075c8
  15. 23 9月, 2007 2 次提交
  16. 26 7月, 2007 4 次提交
  17. 10 7月, 2007 1 次提交
  18. 14 6月, 2007 1 次提交
  19. 07 6月, 2007 2 次提交
  20. 01 5月, 2007 1 次提交