- 21 10月, 2008 13 次提交
-
-
由 Jon Tollefson 提交于
Adjust amount to reserve based on previous nodes for reserves spanning multiple nodes. Check if the node active range is empty before attempting to pass the reserve to bootmem. In practice the range shouldn't be empty, but to be sure we check. Signed-off-by: NJon Tollefson <kniht@linux.vnet.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
-
由 Carl Love 提交于
The issue is the SPU code is not holding the kernel mutex lock while adding samples to the kernel buffer. This patch creates per SPU buffers to hold the data. Data is added to the buffers from in interrupt context. The data is periodically pushed to the kernel buffer via a new Oprofile function oprofile_put_buff(). The oprofile_put_buff() function is called via a work queue enabling the funtion to acquire the mutex lock. The existing user controls for adjusting the per CPU buffer size is used to control the size of the per SPU buffers. Similarly, overflows of the SPU buffers are reported by incrementing the per CPU buffer stats. This eliminates the need to have architecture specific controls for the per SPU buffers which is not acceptable to the OProfile user tool maintainer. The export of the oprofile add_event_entry() is removed as it is no longer needed given this patch. Note, this patch has not addressed the issue of indexing arrays by the spu number. This still needs to be fixed as the spu numbering is not guarenteed to be 0 to max_num_spus-1. Signed-off-by: NCarl Love <carll@us.ibm.com> Signed-off-by: NMaynard Johnson <maynardj@us.ibm.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NAcked-by: Robert Richter <robert.richter@amd.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
-
由 roel kluin 提交于
"unsigned int" speed cannot be negative, it's thus pointless to test if it is. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
-
由 Nathan Fontenot 提交于
The pfn of the memory to be removed should be validated prior to attempting to remove the memory. In cases where the probe of a memory section fails during hotplug add, the pfn for the lmb may not be valid. Signed-off-by: NBadari Pulavarty <pbadari@us.ibm.com> Signed-off-by: NNathan Fontenot <nfont@austin.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
-
由 Sebastian Siewior 提交于
If the vmlinux binary in memory is larger than 4 MiB than it collides with the initial boot code which is linked at 4 MiB in case of cuBoot. If the the uncompressed image size (on disk size) is less than 4 MiB then it would fit. The difference between those two sizes is the bss section. In cuBoot we have the dtb embedded right after the data section so it is very likely that the reset of the bss section (in kernel's start up code) will overwrite the dtb blob. Therefore we reallocate the dtb. Something similar is allready done to the initrd. Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Acked-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
-
由 Andre Detsch 提交于
This patch adds a comment to clarify why atomic_dec_if_positive is being used to decrement gang's aff_sched_count on SPU context unbind. Signed-off-by: NAndre Detsch <adetsch@br.ibm.com> Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
-
由 Andre Detsch 提交于
This patch improves redability of the code responsible for trying to find a node with enough SPUs not committed to other affinity gangs. An additional check is also added, to avoid taking into account gangs that have no SPU affinity. Signed-off-by: NAndre Detsch <adetsch@br.ibm.com> Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
-
由 Jeremy Kerr 提交于
No need to zero the entire buffer, just the head and tail indices. Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
-
由 Jeremy Kerr 提交于
With most file readers (eg cat, dd), reading a context's regs file will result in two reads: the first to read the data, and the second to return EOF. Because each read performs a spu_acquire_saved, we end up descheduling and re-scheduling the context twice. This change does a simple check to see if we'd return EOF before calling spu_acquire_saved(), saving the extra schedule operation. Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
-
由 Jeremy Kerr 提交于
Currently, read() on the sputrace log will block until the read buffer is full. This makes it difficult to retrieve the end of the buffer, as the user will need to read with the right-sized buffer. In a similar method as 91553a1b5e0df006a3573a88d98ee7cd48a3818a, this change makes the switch_log return if there has already been data read. Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
-
由 Jeremy Kerr 提交于
Currently, we use ctx->mapping_lock and ctx->switch_log->lock for the context switch log. The mapping lock only prevents concurrent open()s, so we require the switch_lock->lock for reads. Since writes to the switch log buffer occur on context switches, we're better off synchronising with the state_mutex, which is held during a switch. Since we're serialised througout the buffer reads and writes, we can use the state mutex to protect open and release too, and can now kfree() the log buffer on release. This allows us to perform the switch log notify without taking any extra locks. Because the buffer is only present while the file is open, we can use it to prevent multiple simultaneous openers. Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
-
由 Jeremy Kerr 提交于
Currently, read() on the sputrace buffer will only return data when the user buffer is exhausted. This may mean that we never see the end of the event log, unless we read() with exactly the right-sized buffer. This change makes sputrace_read not block if we have data ready to return. Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
-
由 Jeremy Kerr 提交于
Currently, sputrace will start logging to the event buffer before the log buffer has been open()ed. This results in a heap of "lost samples" warnings if the sputrace file hasn't yet been opened. Since the buffer is reset on open() anyway, there's no need to enable logging when no-one has opened the log. Because open clears the log, make it return EBUSY for mutliple open calls. Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
-
- 18 10月, 2008 2 次提交
-
-
由 Steven A. Falco 提交于
This patch adds support for the GPIO functions of PPC40x and PPC44x SOCs. Signed-off-by: NSteve Falco <sfalco@harris.com> Acked-by: NStefan Roese <sr@denx.de> Acked-by: NSean MacLennan <smaclennan@pikatech.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
-
由 Niklaus Giger 提交于
Adds support for a HCU4 PPC405GPr based board from Netstal Maschinen AG. Signed-off-by: NNiklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
-
- 17 10月, 2008 5 次提交
-
-
由 Josh Boyer 提交于
Add simple defconfig for the AMCC PowerPC 405EZ Acadia evaluation board Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
-
由 Josh Boyer 提交于
This adds a cuboot wrapper for the AMCC PowerPC 405EZ Acadia board. The clocking code is derived from U-Boot, originally written by Stefan Roese. Signed-off-by: NJosh Boyer <jwboyer@linux.ibm.com>
-
由 Josh Boyer 提交于
This adds a common board file for almost all of the "simple" PowerPC 40x boards that exist today. This is intended to be a single place to add support for boards that do not differ in platform support from most of the evaluation boards that are used as reference platforms. Boards that have specific requirements or custom hardware setup should still have their own board.c file. The first board ported to this is the AMCC PowerPC 405EZ Acadia board. Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
-
由 Josh Boyer 提交于
This adds the AMCC PowerPC 405EZ chip to the cputable Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
-
由 Josh Boyer 提交于
Add the base DTS for the AMCC PowerPC 405EZ Acadia evalution board. In addition to some of the normal PPC 40x peripherals, the Acadia board has: - 64 MiB PSRAM - NOR and NAND flash - Two USB 1.1 host ports - Two CAN 2.0 ports - ADC and DAC connectors - LCD display This adds the basic platform support to build from. Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
-
- 16 10月, 2008 2 次提交
-
-
由 Wolfram Sang 提交于
MPC5200 needs to have pipelining disabled for ATA to work. MPC5200B does not. So, for the latter, don't touch the original setting from the bootloader. Signed-off-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
-
由 Grant Likely 提交于
Current device trees do not have the device_type = soc property set anymore. Fix up the cuImage bootwrapper fragment to still find the IMMR nodes. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
-
- 15 10月, 2008 5 次提交
-
-
由 Benjamin Herrenschmidt 提交于
Recently, indirect_pci was changed to test if the bus number requested is the one hanging straight off the PHB, then it substitutes the bus number with another one contained in a new "self_busno" field of the pci_controller structure. However, this breaks CHRP which didn't initialize this new field, and which relies on having the right bus number passed to the hardware. This fixes it by initializing this variable properly for all CHRP bridges Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
-
由 Benjamin Herrenschmidt 提交于
The detection of the IBM "Python" PCI host bridge on IBM CHRP machines such as old RS6000 was broken when we changed of_device_is_compatible() from strncasecmp to strcasecmp (dropped the "n" variant) due to the way IBM encodes the chip version. We fix that by instead doing a match on the model property like we do for others bridges in that file. It should be good enough for those machines. If yours is still broken, let me know. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
-
由 Benjamin Herrenschmidt 提交于
prom_init was changed to take a new argument, the address where the kernel is loaded, which is now used to copy the SMP spin loop down before use. However, only head_64.S was adapted to pass this new value, not head_32.S, thus breaking SMP boot on 32-bit SMP CHRP machines. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
-
由 Benjamin Herrenschmidt 提交于
The new merged DMA code will try to access isa_bridge_pcidev when trying to DMA to/from legacy devices. This is however only defined on 64-bit. Fixes this for now by adding the variable, even if it stays NULL. In the long run, we'll make isa-bridge.c common to 32 and 64-bit. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
-
由 Benjamin Herrenschmidt 提交于
When the powerpc PCI layer is not configured to re-assign everything, it currently fails to detect that a PCI to PCI bridge has been left unassigned by the firmware and tries to allocate resource for the default window values in the bridge (0...X) (with the notable exception of a hack we have in there that detects some Apple firmware unassigned bridge resources). This results in resource allocation failures, which are generally fixed up later on but it causes scary warnings in the logs and we have seen the fixup code fall over in some circumstances (a different issue to fix as well). This code improves that by providing a more complete & useful function to intuit that a bridge was left unassigned by the firmware, and thus force a full re-allocation by the PCI code without trying to allocate the existing useless resources first. The algorithm we use basically considers unassigned a window that starts at 0 (PCI address) if the corresponding address space enable bit is not set. In addition, for memory space, it considers such a resource unassigned also if the host bridge isn't configured to forward cycles to address 0 (ie, the resource basically overlaps main memory). This fixes a range of problems with things like Bare-Metal support on pSeries machines, or attempt to use partial firmware PCI setup. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
-
- 14 10月, 2008 13 次提交
-
-
由 David Gibson 提交于
The typesafe version of the powerpc pagetable handling (with USE_STRICT_MM_TYPECHECKS defined) has bitrotted again. This patch makes a bunch of small fixes to get it back to building status. It's still not enabled by default as gcc still generates worse code with it for some reason. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
-
The "phys" argument to machine_init() isn't used and isn't likely to ever be so let's remove it. Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
-
由 Benjamin Herrenschmidt 提交于
After Becky's work we can almost have different DMA offsets between on-chip devices and PCI. Almost because there's a problem with the non-coherent DMA code that basically ignores the programmed offset to use the global one for everything. This fixes it. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
-
由 Steven Whitehouse 提交于
This is a much better version of a previous patch to make the parser tables constant. Rather than changing the typedef, we put the "const" in all the various places where its required, allowing the __initconst exception for nfsroot which was the cause of the previous trouble. This was posted for review some time ago and I believe its been in -mm since then. Signed-off-by: NSteven Whitehouse <swhiteho@redhat.com> Cc: Alexander Viro <aviro@redhat.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Anton Vorontsov 提交于
The fsl_upm nand driver fails to build because fsl_lbc_lock isn't exported, the lock is needed by the inlined fsl_upm_run_pattern() function: ERROR: "fsl_lbc_lock" [drivers/mtd/nand/fsl_upm.ko] undefined! Dave Jones purposed to export the lock, but it is better to just uninline the fsl_upm_run_pattern(). When uninlined we also no longer need the exported fsl_lbc_regs, and both fsl_lbc_lock and fsl_lbc_regs could be marked static. While at it, also add some missing includes that we should have included explicitly. Reported-by: NDave Jones <davej@redhat.com> Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Anton Vorontsov 提交于
The StMicro NAND chip (512Mbit, 64MB) is connected to the local bus, the first local bus' user-programmable machine is configured by the firmware to work with NAND chips. QE GPIO pin is used to poll the NAND's Ready-Not-Busy signal. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Martyn Welch 提交于
Support for the SBC610 VPX Single Board Computer from GE Fanuc (PowerPC MPC8641D). This patch adds support for the registers held in the devices main FPGA, exposing extra information about the revision of the board through cpuinfo. Signed-off-by: NMartyn Welch <martyn.welch@gefanuc.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Timur Tabi 提交于
The Freescale Elo DMA driver binds to all DMA channels in the device tree that are compatible with "fsl,eloplus-dma-channel". This conflicts with the sound drivers for the MPC8610 HPCD. On this board, the SSI uses two DMA channels and therefore those channels are not available for general purpose use. We change the compatible properties for these channels "fsl,ssi-dma-channel". This works because the sound drivers don't actually check the compatible property when it grabs channels. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Timur Tabi 提交于
Because CHRP and PMAC are by default enabled, several non-CHRP and non-PMAC PowerPC defconfigs will have these Kconfig options set erroneously. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Anton Vorontsov 提交于
The RTC is sitting on the I2C1 bus at address 0x68. RTC interrupt signal is connected to the IPIC's EXT3 interrupt line. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Timur Tabi 提交于
Early versions of the Freescale DIU framebuffer driver depended on a bootmem allocation of memory for the video buffer. The need for this feature was removed in commit 6b51d51a, so now we can remove the platform-specific code that allocated that memory. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Milton Miller 提交于
b38fd42f added false dependencys to order the load of upper and lower halfs of the pte, but only adjusted whitespace instead of deleting the old load in the iside handler, letting the hardware see the non-dependent load. This patch removes the extra load. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 John Rigby 提交于
Uses mpc83xx_add_bridge in fsl_pci.c Adds second register tuple to pci node register property as done for 83xx device trees in a previous patch. Signed-off-by: NJohn Rigby <jrigby@freescale.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-