- 30 3月, 2017 2 次提交
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由 Geert Uytterhoeven 提交于
Add pins, groups, and functions for all SCIF serial ports on R-Car H3 ES2.0. Extracted from a big patch in the BSP by Takeshi Kihara. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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由 Geert Uytterhoeven 提交于
The Pin Function Controller module in the R-Car H3 ES2.0 differs from ES1.x in many ways. The goal is twofold: 1. Support both the ES1.x and ES2.0 SoC revisions in a single binary for now, 2. Make it clear which code supports ES1.x, so it can easily be identified and removed later, when production SoCs are deemed ubiquitous. Hence this patch: 1. Extracts the support for R-Car H3 ES1.x into a separate file, as the differences are quite large, 2. Adds code for detecting the SoC revision at runtime using the new soc_device_match() API, and selecting pinctrl tables for the actual SoC revision, 3. Replaces the core register and bitfield definitions by their counterparts for R-Car H3 ES2.0. The addition of pins, groups, and functions for the various on-chip devices is left to subsequent patches. The R-Car H3 ES2.0 register and bitfield definitions were extracted from a patch in the BSP by Takeshi Kihara. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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- 21 3月, 2017 3 次提交
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由 Geert Uytterhoeven 提交于
Update the sh_pfc_soc_info pointer after calling the SoC-specific initialization function, as it may have been updated to e.g. handle different SoC revisions. This makes sure the correct subdriver name is printed later. Fixes: 0c151062 ("sh-pfc: Add support for SoC-specific initialization") Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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由 Geert Uytterhoeven 提交于
Somehow the QSPI and SCIF_CLK fragments were inserted at the wrong positions. Restore sort order (alphabetically, per group). Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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由 Geert Uytterhoeven 提交于
Fix typos in hscif2_clk_b_mux[] and hscif4_ctrl_mux[]. Fixes: a56069c4 ("pinctrl: sh-pfc: r8a7795: Add HSCIF pins, groups, and functions") Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 28 2月, 2017 1 次提交
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由 Masahiro Yamada 提交于
Fix typos and add the following to the scripts/spelling.txt: overrided||overridden Link: http://lkml.kernel.org/r/1481573103-11329-22-git-send-email-yamada.masahiro@socionext.comSigned-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 13 2月, 2017 5 次提交
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由 Wei Yongjun 提交于
In case of error, the function devm_ioremap() returns NULL pointer not ERR_PTR(). Fix by using devm_ioremap_resource instead of devm_ioremap. Fixes: 8b1bd11c ("pinctrl: samsung: Add the support the multiple IORESOURCE_MEM for one pin-bank") Signed-off-by: NWei Yongjun <weiyongjun1@huawei.com> Reviewed-by: NKrzysztof Kozlowski <krzk@kernel.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Dan Carpenter 提交于
We need to unlock before returning -EINVAL on this error path. Fixes: 04cc058f ("pinctrl: intel: Add support for 1k additional pull-down") Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Paul Gortmaker 提交于
None of the Kconfigs for any of these drivers are tristate, meaning that they currently are not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. Cc: "Antoine Ténart" <antoine.tenart@free-electrons.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Hongzhou Yang <hongzhou.yang@mediatek.com> Cc: Thomas Hebb <tommyhebb@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: linux-gpio@vger.kernel.org Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Acked-by: NJisheng Zhang <jszhang@marvell.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Paul Gortmaker 提交于
None of the Kconfigs for any of these drivers are tristate, meaning that they currently are not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the drivers there is no doubt they are builtin-only. All drivers get the exact same change, so they are handled in batch. Changes are (1) use init.h header in place of module.h header, (2) delete module_exit related code, (3) delete MODULE_DEVICE_TABLE, and (4) delete MODULE_LICENCE/MODULE_AUTHOR and associated tags. None of these drivers were using module_init() so we don't have to worry about the init ordering getting changed with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE etc. tags since all that information is already contained at the top of each file in the comments. Cc: spear-devel@list.st.com Cc: linux-gpio@vger.kernel.org Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Paul Gortmaker 提交于
None of the Kconfigs for any of these drivers are tristate, meaning that they currently are not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the drivers there is no doubt they are builtin-only. All drivers get the exact same change, so they are handled in batch. Changes are (1) use builtin_platform_driver, (2) dont use module.h (3) delete module_exit related code, (4) delete MODULE_DEVICE_TABLE, and (5) delete MODULE_LICENCE/MODULE_AUTHOR and associated tags. For the dove driver we explicitly disallow a driver unbind, since that doesn't have a sensible use case anyway, and it allows us to drop the ".remove" code for non-modular drivers. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. We deleted the MODULE_LICENSE etc. tags since all that information is already contained at the top of the file in the comments. Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: linux-gpio@vger.kernel.org Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 06 2月, 2017 6 次提交
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由 Paul Gortmaker 提交于
We had all these corrected in commit 0c8c6ba0 ("pinctrl: sunxi: make bool drivers explicitly non-modular") but this new one recently crept in. The Kconfig currently controlling compilation of this code is: drivers/pinctrl/sunxi/Kconfig:config PINCTRL_SUN5I drivers/pinctrl/sunxi/Kconfig: def_bool MACH_SUN5I ...meaning that it currently is not being built as a module by anyone. Lets remove the couple traces of modular infrastructure use, so that when reading the driver there is no doubt it is builtin-only. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: linux-gpio@vger.kernel.org Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Acked-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Chen-Yu Tsai 提交于
There is a stray printk call in the new sun5i pinctrl driver's probe function. Remove it. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Arnd Bergmann 提交于
The rework of the suspend/resume handling uses the wrong #ifdef check, leading to a build warning without CONFIG_PM_SLEEP: drivers/pinctrl/samsung/pinctrl-samsung.c:1142:12: error: 'samsung_pinctrl_resume' defined but not used [-Werror=unused-function] drivers/pinctrl/samsung/pinctrl-samsung.c:1092:12: error: 'samsung_pinctrl_suspend' defined but not used [-Werror=unused-function] Using a __maybe_unused annotation instead of the #ifdef is a simple way to avoid this problem class. Fixes: 2b24efa8 ("pinctrl: samsung: Replace syscore ops with standard platform device pm_ops") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Chen-Yu Tsai 提交于
Now that we can support the A31s pin controller with the A31 driver using the new variants support, the independent A31s driver becomes redundant. Remove it. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Chen-Yu Tsai 提交于
The A31s is a trimmed down version of the A31. Some hardware blocks are removed, thus not available for muxing on the external pins. Some external pins were directly removed. This makes it easy to support the A31s pin controller with the A31 driver. We just mark the pins and functions that were trimmed as A31 only. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Alexandre TORGUE 提交于
This patch adds STM32H743 pinctrl and GPIO support, relies on the generic STM32 pinctrl driver. Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 30 1月, 2017 13 次提交
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由 Alexandre TORGUE 提交于
Move gpio lock as irq from "domain alloc" callback to "domain activate" callback. It will allow to use gpiolib sysfs correctly. Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Icenowy Zheng 提交于
Based on the Allwinner H5 datasheet and the pinctrl driver of the backward-compatible H3 this introduces the pin multiplex assignments for the H5 SoC. H5 introduced some more pin functions (e.g. three more groups of TS pins, and one more groups of SIM pins) than H3. Signed-off-by: NIcenowy Zheng <icenowy@aosc.xyz> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Alexander Stein 提交于
According to VLI64 Intel Atom E3800 Specification Update (#329901) concurrent read accesses may result in returning 0xffffffff and write accesses may be dropped silently. To workaround all accesses must be protected by locks. Cc: stable@vger.kernel.org Signed-off-by: NAlexander Stein <alexander.stein@systec-electronic.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Andy Shevchenko 提交于
Debounce value is set globally per community. Otherwise user will easily get a kernel crash when they start using the feature: BUG: unable to handle kernel paging request at ffffc900003be000 IP: byt_gpio_dbg_show+0xa9/0x430 Make it clear in byt_gpio_reg(). Note that this fix just prevents kernel to crash, but doesn't make any difference to the existing logic. It means the last caller will win the trade and debounce value will be configured accordingly. The actual logic fix needs to be thought about and it's not as important as crash fix. That's why the latter goes separately and right now. Fixes: 658b476c ("pinctrl: baytrail: Add debounce configuration") Cc: Cristina Ciocan <cristina.ciocan@intel.com> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NJean Delvare <jdelvare@suse.de> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Andy Shevchenko 提交于
The commit 04ff5a09 ("pinctrl: baytrail: Rectify debounce support") almost fixes the logic of debuonce but missed couple of things, i.e. typo in mask when disabling debounce and lack of enabling it back. This patch addresses above issues. Reported-by: NJean Delvare <jdelvare@suse.de> Fixes: 04ff5a09 ("pinctrl: baytrail: Rectify debounce support") Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NJean Delvare <jdelvare@suse.de> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Mika Westerberg 提交于
This driver adds pinctrl/GPIO support for Intel Gemini Lake SoC. The GPIO controller is based on the next generation GPIO hardware but still compatible with the one supported by the Intel core pinctrl/GPIO driver. This commit includes material from David E. Box. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Mika Westerberg 提交于
The next generation Intel GPIO hardware supports additional 1k pull-down per-pad. Add support for this to the Intel core pinctrl driver. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Mika Westerberg 提交于
The next generation Intel GPIO hardware has two additional registers PADCFG2 and PADCFG3. The latter is marked as reserved but the former includes configuration for per-pad hardware debouncer. This patch adds support for that in the Intel pinctrl core driver. Since these are additional features on top of the current generation hardware, we use revision number and feature flags to enable this if detected. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Kalyan Kinthada 提交于
This pinctrl driver supports the 98DX3236, 98DX3336 and 98DX4251 SoCs from Marvell. Signed-off-by: NKalyan Kinthada <kalyan.kinthada@alliedtelesis.co.nz> Signed-off-by: NChris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: NRob Herring <robh@kernel.org> Acked-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Andy Shevchenko 提交于
There is no need to take pointer of a pointer to an array of SoC data in platform driver. Do it in the same way as it's done for ACPI. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Andy Shevchenko 提交于
Not every pin can be configured. Add missed check to prevent access violation. Fixes: 4e80c8f5 ("pinctrl: intel: Add Intel Merrifield pin controller support") Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Maxime Ripard 提交于
Commit 07fe64ba ("pinctrl: sunxi: Handle bias disable") actually enforced enforced the disabling of the pull up/down resistors instead of ignoring it like it was done before. This was part of a wider rework to switch to the generic pinconf bindings, and was meant to be merged together with DT patches that were switching to it, and removing what was considered default values by both the binding and the boards. This included no bias on a pin. However, those DT patches were delayed to 4.11, which would be fine only for a significant number boards having the bias setup wrong, which in turns break the MMC on those boards (and possibly other devices too). In order to avoid conflicts as much as possible, bring back the old behaviour for 4.10, and we'll revert that commit once all the DT bits will have landed. Tested-by: NPriit Laes <plaes@plaes.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Jisheng Zhang 提交于
This should be a typo. Signed-off-by: NJisheng Zhang <jszhang@marvell.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 26 1月, 2017 10 次提交
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由 Marek Szyprowski 提交于
Once the dependency on PMU driver (for pad retention control) has been removed, there is no reason to use syscore_ops based suspend/resume. This patch replaces it with standard platform device pm_ops based solution. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: NKrzysztof Kozlowski <krzk@kernel.org> Acked-by: NTomasz Figa <tomasz.figa@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Szyprowski 提交于
This patch moves pad retention control from S5PV210 machine code to Exynos pin controller driver. This helps to avoid possible ordering and logical dependencies between machine and pin control code. Till now it worked fine only because sys_ops for machine code and pin controller were called in registration order. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Acked-by: NTomasz Figa <tomasz.figa@gmail.com> For mach-s5pv210: Acked-by: NKrzysztof Kozlowski <krzk@kernel.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Szyprowski 提交于
This patch moves pad retention control from PMU driver to Exynos pin controller driver. This helps to avoid possible ordering and logical dependencies between machine, PMU and pin control code. Till now it worked fine only because sys_ops for PMU and pin controller were called in registration order. This is also a preparation for adding new features to Exynos pin controller driver, like runtime power management and suspending individual pin controllers, which might be a part of some power domain. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: NKrzysztof Kozlowski <krzk@kernel.org> Acked-by: NTomasz Figa <tomasz.figa@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Alexander Stein 提交于
Apparently each GPIO pad's register are 16 bytes, so multiply the pad_map by that. The same is done in byt_gpio_reg the only other place where pad_map is used. Signed-off-by: NAlexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Szyprowski 提交于
Pad retention control after suspend/resume cycle should be done from pin controller driver instead of PMU (power management unit) driver to avoid possible ordering and logical dependencies. Till now it worked fine only because PMU driver registered its sys_ops after pin controller. This patch adds infrastructure to handle pad retention during pin control driver resume. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: NKrzysztof Kozlowski <krzk@kernel.org> Acked-by: NTomasz Figa <tomasz.figa@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Szyprowski 提交于
'enable' parameter has been removed a while ago, so all code for handling it can be simply removed. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: NKrzysztof Kozlowski <krzk@kernel.org> Acked-by: NTomasz Figa <tomasz.figa@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Szyprowski 提交于
Replace custom code with generic helper. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: NKrzysztof Kozlowski <krzk@kernel.org> Acked-by: NTomasz Figa <tomasz.figa@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Szyprowski 提交于
Exynos5433 support has been added in parallel to adding initconst annotation to most of the init data structures, so add those annotations also to Exynos5433 structures. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Acked-by: NTomasz Figa <tomasz.figa@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Jean Delvare 提交于
Do not hide pinctrl drivers for Mediatek platforms using conditionals. Doing so actually leaves the symbols present (but always disabled) on all other platforms, which is confusing and inefficient. Better use real dependencies so that the symbols do not exist at all on platforms where they are not relevant. Signed-off-by: NJean Delvare <jdelvare@suse.de> Reported-by: NAndreas Färber <afaerber@suse.de> Reviewed-by: NMatthias Brugger <matthias.bgg@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Martin Blumenstingl 提交于
This adds support for the pwm_ao_b pin. Unfortunately the registers for the pwm_ao pins are not documented at all. The source for the pwm_ao_b pin from this patch is the Khadas VIM GPL kernel source, which sets bit 3 and unsets bits 4 and 31 to enable the PWM LEDs. Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: NKevin Hilman <khilman@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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