1. 21 3月, 2017 4 次提交
  2. 15 3月, 2017 2 次提交
  3. 19 2月, 2017 2 次提交
    • J
      i40e: mark the value passed to csum_replace_by_diff as __wsum · b9c015d4
      Jacob Keller 提交于
      Fix, or rather, avoid a sparse warning caused by the fact that
      csum_replace_by_diff expects to receive a __wsum value. Since the
      calculation appears to work, simply typecast the passed paylen value to
      __wsum to avoid the warning.
      
      This seems pretty fishy since __wsum was obviously annotated as
      a separate type on purpose, so this throws the entire calculation into
      question. Since it currently appears to behave as expected, the typecast
      is probably safe.
      
      Change-ID: I4fdc5cddd589abc16098176e8a61127e761488f4
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: NAndrew Bowers <andrewx.bowers@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      b9c015d4
    • C
      i40e: Fix Adaptive ITR enabling · 3c234c47
      Carolyn Wyborny 提交于
      This patch fixes a bug introduced with the addition of the per queue
      ITR feature support in ethtool.  With that addition, there were
      functions added which converted the ITR settings to binary values.
      The IS_ENABLED macros that run on those values check whether a bit
      is set or not and with the value being binary, the bit check always
      returned ITR disabled which prevents any updating of the ITR rate.
      This patch fixes the problem by changing the functions to return the
      current ITR value instead and renaming it to better reflect
      its function.  These functions now provide a value which will be
      accurately asessed and update the ITR as intended.
      
      Change-ID: I14f1d088d052e27f652aaa3113e186415ddea1fc
      Signed-off-by: NCarolyn Wyborny <carolyn.wyborny@intel.com>
      Tested-by: NAndrew Bowers <andrewx.bowers@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      3c234c47
  4. 12 2月, 2017 4 次提交
  5. 03 2月, 2017 1 次提交
  6. 07 12月, 2016 1 次提交
  7. 01 11月, 2016 4 次提交
    • A
      i40e: Reorder logic for coalescing RS bits · 1dc8b538
      Alexander Duyck 提交于
      This patch reorders the logic at the end of i40e_tx_map to address the
      fact that the logic was rather convoluted and much larger than it needed
      to be.
      
      In order to try and coalesce the code paths I have updated some of the
      comments and repurposed some of the variables in order to reduce
      unnecessary overhead.
      
      This patch does the following:
      1.  Quit tracking skb->xmit_more with a flag, just max out packet_stride
      2.  Drop tail_bump and do_rs and instead just use desc_count and td_cmd
      3.  Pull comments from ixgbe that make need for wmb() more explicit.
      
      Change-ID: Ic7da85ec75043c634e87fef958109789bcc6317c
      Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com>
      Tested-by: NAndrew Bowers <andrewx.bowers@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      1dc8b538
    • A
      i40e: Add common function for finding VSI by type · 4b816446
      Alexander Duyck 提交于
      This patch adds a common method for finding a VSI by type.  The main
      motivation for doing this is that the Flow Director path actually had two
      ways of handling this, one stopped on first match and one did not.  This
      patch makes it so that all callers of this function will get the same
      approach for finding a VSI.
      
      Change-ID: Ibf25de8acd8466582520694424aa87da66965fbd
      Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com>
      Signed-off-by: NBimmy Pujari <bimmy.pujari@intel.com>
      Tested-by: NAndrew Bowers <andrewx.bowers@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      4b816446
    • J
      i40e: replace PTP Rx timestamp hang logic · 12490501
      Jacob Keller 提交于
      The current Rx timestamp hang logic is not very robust because it does
      not notice a register is hung until all four timestamps have been
      latched and we wait a full 5 seconds. Replace this logic with a newer Rx
      hang detection based on storing the jiffies when we first notice
      a receive timestamp event. We store each register's time separately,
      along with a flag indicating if it is currently latched. Upon first
      transitioning to latch, we will update the latch_events[i] jiffies
      value. This indicates the time we first noticed this event. The watchdog
      routine will simply check that the either the flag has been cleared, or
      we have passed at least one second. In this case, it is able to clear
      the Rx timestamp register under the assumption that it was for a dropped
      frame. The benefit if this strategy is that we should be able to
      detect and clear out stalled RXTIME_H registers before we exhaust the
      supply of 4, and avoid complete stall of Rx timestamp events.
      
      Change-ID: Id55458c0cd7a5dd0c951ff2b8ac0b2509364131f
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: NAndrew Bowers <andrewx.bowers@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      12490501
    • J
      i40e: correct check for reading TSYNINDX from the receive descriptor · 144ed176
      Jacob Keller 提交于
      When hardware has taken a timestamp for a received packet, it indicates
      which RXTIME register the timestamp was placed in by some bits in the
      receive descriptor. It uses 3 bits, one to indicate if the descriptor
      index is valid (ie: there was a timestamp) and 2 bits to indicate which
      of the 4 registers to read. However, the driver currently does not check
      the TSYNVALID bit and only checks the index. It assumes a zero index
      means no timestamp, and a non zero index means a timestamp occurred.
      While this appears to be true, it prevents ever reading a timestamp in
      RXTIME[0], and causes the first timestamp the device captures to be
      ignored.
      
      Fix this by using the TSYNVALID bit correctly as the true indicator of
      whether the packet has an associated timestamp.
      
      Also rename the variable rsyn to tsyn as this is more descriptive and
      matches the register names.
      
      Change-ID: I4437e8f3a3df2c2ddb458b0fb61420f3dafc4c12
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: NAndrew Bowers <andrewx.bowers@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      144ed176
  8. 29 10月, 2016 4 次提交
    • A
      i40e: Drop redundant Rx descriptor processing code · 99dad8b3
      Alexander Duyck 提交于
      This patch cleans up several pieces of redundant code in the Rx clean-up
      paths.
      
      The first bit is that hdr_addr and the status_err_len portions of the Rx
      descriptor represent the same value.  As such there is no point in setting
      them to 0 before setting them to 0.  I'm dropping the second spot where we
      are updating the value to 0 so that we only have 1 write for this value
      instead of 2.
      
      The second piece is the checking for the DD bit in the packet.  We only
      need to check for a non-zero value for the status_err_len because if the
      device is done with the descriptor it will have written something back and
      the DD is just one piece of it.  In addition I have moved the reading of
      the Rx descriptor bits related to rx_ptype down so that they are actually
      below the dma_rmb() call so that we are guaranteed that we don't have any
      funky 64b on 32b calls causing any ordering issues.
      
      Change-ID: I256e44a025d3c64a7224aaaec37c852bfcb1871b
      Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com>
      Tested-by: NAndrew Bowers <andrewx.bowers@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      99dad8b3
    • A
      i40e/i40evf: fix interrupt affinity bug · 96db776a
      Alan Brady 提交于
      There exists a bug in which a 'perfect storm' can occur and cause
      interrupts to fail to be correctly affinitized. This causes unexpected
      behavior and has a substantial impact on performance when it happens.
      
      The bug occurs if there is heavy traffic, any number of CPUs that have
      an i40e interrupt are pegged at 100%, and the interrupt afffinity for
      those CPUs is changed.  Instead of moving to the new CPU, the interrupt
      continues to be polled while there is heavy traffic.
      
      The bug is most readily realized as the driver is first brought up and
      all interrupts start on CPU0. If there is heavy traffic and the
      interrupt starts polling before the interrupt is affinitized, the
      interrupt will be stuck on CPU0 until traffic stops. The bug, however,
      can also be wrought out more simply by affinitizing all the interrupts
      to a single CPU and then attempting to move any of those interrupts off
      while there is heavy traffic.
      
      This patch fixes the bug by registering for update notifications from
      the kernel when the interrupt affinity changes. When that fires, we
      cache the intended affinity mask. Then, while polling, if the cpu is
      pegged at 100% and we failed to clean the rings, we check to make sure
      we have the correct affinity and stop polling if we're firing on the
      wrong CPU.  When the kernel successfully moves the interrupt, it will
      start polling on the correct CPU. The performance impact is minimal
      since the only time this section gets executed is when performance is
      already compromised by the CPU.
      
      Change-ID: I4410a880159b9dba1f8297aa72bef36dca34e830
      Signed-off-by: NAlan Brady <alan.brady@intel.com>
      Tested-by: NAndrew Bowers <andrewx.bowers@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      96db776a
    • A
      i40e: Drop code for unsupported flow types · e1da71ca
      Alexander Duyck 提交于
      We cannot currently support SCTP in the hardware, and IPV4_FLOW is not used
      anywhere by the software so we can go through and drop the functionality
      related to these two flow types.
      
      In addition we cannot support masking based on the protocol value so if the
      user is expecting a value other than TCP or UDP we should simply return an
      error rather then trying to allocate a filter for a rule that will only
      partially match what the user requested.
      
      Change-ID: I10d52bb97d8104d76255fe244551814ff9531a63
      Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com>
      Tested-by: NAndrew Bowers <andrewx.bowers@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      e1da71ca
    • A
      i40e: Rewrite Flow Director busy wait loop · ed245406
      Alexander Duyck 提交于
      We can reorder the busy wait loop at the start of the Flow Director
      transmit function to reduce the overall code size while still retaining the
      same functionality.  As such I am taking advantage of the opportunity to do
      so.
      
      Change-ID: I34c403ca001953c6ac9816e65d5305e73d869026
      Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com>
      Tested-by: NAndrew Bowers <andrewx.bowers@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      ed245406
  9. 25 9月, 2016 6 次提交
  10. 23 9月, 2016 1 次提交
  11. 20 8月, 2016 1 次提交
  12. 22 7月, 2016 1 次提交
  13. 15 7月, 2016 1 次提交
    • A
      i40e/i40evf: Fix i40e_rx_checksum · 858296c8
      Alexander Duyck 提交于
      There are a couple of issues I found in i40e_rx_checksum while doing some
      recent testing.  As a result I have found the Rx checksum logic is pretty
      much broken and returning that the checksum is valid for tunnels in cases
      where it is not.
      
      First the inner types are not the correct values to use to test for if a
      tunnel is present or not.  In addition the inner protocol types are not a
      bitmask as such performing an OR of the values doesn't make sense.  I have
      instead changed the code so that the inner protocol types are used to
      determine if we report CHECKSUM_UNNECESSARY or not.  For anything that does
      not end in UDP, TCP, or SCTP it doesn't make much sense to report a
      checksum offload since it won't contain a checksum anyway.
      
      This leaves us with the need to set the csum_level based on some value.
      For that purpose I am using the tunnel_type field.  If the tunnel type is
      GRENAT or greater then this means we have a GRE or UDP tunnel with an inner
      header.  In the case of GRE or UDP we will have a possible checksum present
      so for this reason it should be safe to set the csum_level to 1 to indicate
      that we are reporting the state of the inner header.
      Signed-off-by: NAlexander Duyck <aduyck@mirantis.com>
      Tested-by: NAndrew Bowers <andrewx.bowers@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      858296c8
  14. 21 5月, 2016 2 次提交
  15. 14 5月, 2016 1 次提交
  16. 06 5月, 2016 3 次提交
  17. 02 5月, 2016 1 次提交
  18. 28 4月, 2016 1 次提交