1. 10 11月, 2013 2 次提交
  2. 28 8月, 2013 2 次提交
  3. 26 8月, 2013 6 次提交
  4. 20 8月, 2013 1 次提交
    • J
      clk: add CLK_SET_RATE_NO_REPARENT flag · 819c1de3
      James Hogan 提交于
      Add a CLK_SET_RATE_NO_REPARENT clock flag, which will prevent muxes
      being reparented during clk_set_rate.
      
      To avoid breaking existing platforms, all callers of clk_register_mux()
      are adjusted to pass the new flag. Platform maintainers are encouraged
      to remove the flag if they wish to allow mux reparenting on set_rate.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
      Cc: Mike Turquette <mturquette@linaro.org>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Sascha Hauer <kernel@pengutronix.de>
      Cc: Stephen Warren <swarren@wwwdotorg.org>
      Cc: Viresh Kumar <viresh.linux@gmail.com>
      Cc: Kukjin Kim <kgene.kim@samsung.com>
      Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
      Cc: Chao Xie <xiechao.mail@gmail.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: "Emilio López" <emilio@elopez.com.ar>
      Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
      Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
      Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
      Cc: Thierry Reding <thierry.reding@gmail.com>
      Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
      Cc: Pawel Moll <pawel.moll@arm.com>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Andrew Chew <achew@nvidia.com>
      Cc: Doug Anderson <dianders@chromium.org>
      Cc: Heiko Stuebner <heiko@sntech.de>
      Cc: Paul Walmsley <pwalmsley@nvidia.com>
      Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
      Cc: Thomas Abraham <thomas.abraham@linaro.org>
      Cc: Tomasz Figa <t.figa@samsung.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: linux-samsung-soc@vger.kernel.org
      Cc: spear-devel@list.st.com
      Cc: linux-tegra@vger.kernel.org
      Tested-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
      Acked-by: Stephen Warren <swarren@nvidia.com> [tegra]
      Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> [sunxi]
      Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> [Zynq]
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      819c1de3
  5. 09 8月, 2013 1 次提交
  6. 30 5月, 2013 1 次提交
  7. 29 5月, 2013 1 次提交
  8. 13 4月, 2013 1 次提交
  9. 05 4月, 2013 3 次提交
  10. 27 3月, 2013 2 次提交
    • E
      clk: sunxi: rename compatible strings · e3276998
      Emilio López 提交于
      During the introduction of the Allwinner SoC platforms, sunxi was
      initially meant as a generic name for all the variants of the Allwinner
      SoC.
      
      It was ok at the time of the support of only the A10 and A13 that
      look pretty much the same; but it's beginning to be troublesome with
      the future addition of the Allwinner A31 (sun6i) that is quite
      different, and would introduce some weird logic, where sunxi would
      actually mean in some case sun4i and sun5i but without sun6i...
      
      Moreover, it makes the compatible strings naming scheme not consistent
      with other architectures, where usually for this kind of compability, we
      just use the oldest SoC name that has this IP, so let's do just this.
      Signed-off-by: NEmilio López <emilio@elopez.com.ar>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      e3276998
    • E
      clk: arm: sunxi: Add a new clock driver for sunxi SOCs · e874a669
      Emilio López 提交于
      This commit implements the base CPU clocks for sunxi devices. It has
      been tested using a slightly modified cpufreq driver from the
      linux-sunxi 3.0 tree.
      
      Additionally, document the new bindings introduced by this patch.
      
      Idling:
          / # cat /sys/kernel/debug/clk/clk_summary
             clock                        enable_cnt  prepare_cnt  rate
          ---------------------------------------------------------------------
           osc32k                         0           0            32768
           osc24M_fixed                   0           0            24000000
              osc24M                      0           0            24000000
                 apb1_mux                 0           0            24000000
                    apb1                  0           0            24000000
                 pll1                     0           0            60000000
                    cpu                   0           0            60000000
                       axi                0           0            60000000
                          ahb             0           0            60000000
                             apb0         0           0            30000000
           dummy                          0           0            0
      
      After "yes >/dev/null &":
          / # cat /sys/kernel/debug/clk/clk_summary
             clock                        enable_cnt  prepare_cnt  rate
          ---------------------------------------------------------------------
           osc32k                         0           0            32768
           osc24M_fixed                   0           0            24000000
              osc24M                      0           0            24000000
                 apb1_mux                 0           0            24000000
                    apb1                  0           0            24000000
                 pll1                     0           0            1008000000
                    cpu                   0           0            1008000000
                       axi                0           0            336000000
                          ahb             0           0            168000000
                             apb0         0           0            84000000
           dummy                          0           0            0
      Signed-off-by: NEmilio López <emilio@elopez.com.ar>
      Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      e874a669