- 24 2月, 2015 6 次提交
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由 Geert Uytterhoeven 提交于
Add a device node for the System Controller, with subnodes that represent the hardware power area hierarchy. Hook up all devices to their respective PM domains. Note that unlike on R-Mobile A1 (r8a7740), PM domain D4 can be powered down without ill effects on s2ram behavior, just like on SH-Mobile AP4 (sh7372). Hence we can postpone adding a (minimal) device node for the Coresight-ETM hardware block. The System Controller is also used by the R-Mobile Reset driver, which can now restart the system. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Add a node for the Private Timer and Watchdog, as found in the Cortex-A9 MPCore. Without this, there's no clocksource available during early kernel initialization, before cmt1 is initialized, leading to a lock-up if CONFIG_CPU_IDLE=y. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Add a node for the Bus State Controller (BSC) on sh73a0, to which multiple external devices can be connected. The BSC is driven by the ZB clock, and located in PM domain A4S. A reference to the latter will be added later. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Ulrich Hecht 提交于
Specifies clock sources and register bits. Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> [geert: Drop renesas,src-shift/renesas,src-width, pad to 4 or 8 parents] Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
This clock drives the irqpin controller modules. Before, it was assumed enabled by the bootloader or reset state. By making it available to the driver, we make sure it gets enabled when needed, and allow it to be managed by system or runtime PM. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
The sh73a0 INTC can't mask interrupts properly most likely due to a hardware bug. Set the control-parent property to delegate masking to the parent interrupt controller. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 15 1月, 2015 1 次提交
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由 Geert Uytterhoeven 提交于
Add device nodes for the two SDRAM Bus State Controllers. The SBSCs are located in the A4BC0 resp. A4BC1 PM domains, which must not be powered down, else the system will crash. References to the A4BC0 and A4BC1 PM domains will be added later. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 08 1月, 2015 1 次提交
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由 Geert Uytterhoeven 提交于
The FSI2 sound node used the generic compatible property only. Add the SoC-specific one, to make it future proof. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 21 12月, 2014 2 次提交
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由 Ulrich Hecht 提交于
Assigns clocks to cmt1, i2c*, mmcif, sdhi*, and scif*. Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Ulrich Hecht 提交于
Declares all sh73a0 clocks supported by the legacy clock framework. Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 19 11月, 2014 1 次提交
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由 Geert Uytterhoeven 提交于
The IIC nodes used the generic compatible properties only. This causes the driver to fail when using Standard Speed, as the operational clock is driven by the 104 MHz HP clock: i2c-sh_mobile e6820000.i2c: timing values out of range: L/H=0x208/0x1bf i2c-sh_mobile: probe of e6820000.i2c failed with error -22 Add the SoC-specific compatible property to fix this. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 09 9月, 2014 1 次提交
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由 Ulrich Hecht 提交于
Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: NMagnus Damm <damm+renesas@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 22 8月, 2014 2 次提交
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由 Geert Uytterhoeven 提交于
Add an "interrupt-parent = <&gic>;" at the top, which is inherited by all child nodes, so the "interrupt-parent" properties can be removed from the individual child nodes. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NMagnus Damm <damm+renesas@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Add CPU Frequency information to the sh73a0 DTS file. This will allow us to use the shared C code on sh73a0 and KZM9G which reads out the clock frequency from DT and calculates the delay settings from there. Signed-off-by: NMagnus Damm <damm+renesas@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 12 7月, 2014 1 次提交
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由 Simon Horman 提交于
This describes all of the SCIF hardware of the sh73a0. Each node is disabled and may be enabled as necessary by board DTS files. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 15 4月, 2014 1 次提交
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由 Lucas Stach 提交于
This is likely a copy-and-paste error from the ARM GIC documentation, that has already been fixed. address-cells should have been set to 0, as with the size cells. As having those properties set to 0 is the same thing as not specifying them, drop them completely. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 19 12月, 2013 1 次提交
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由 Laurent Pinchart 提交于
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 12 12月, 2013 1 次提交
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 10 12月, 2013 4 次提交
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由 Magnus Damm 提交于
Add "renesas,intc-irqpin-sh73a0" to the compatible string for the IRQ pins in case of sh73a0 INTC. This makes the INTC irqpin follow the same style as the other devices and also makes it more future proof. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
sh73a0 != r8a7740 Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
According to ePAPR spec, this patch tidies up DT node name and related clock. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 08 10月, 2013 1 次提交
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由 Guennadi Liakhovetski 提交于
Currently all I2C interfaces in all *.dtsi files for various Renesas SoCs are enabled by default. Switch them all off and only enable populated I2C interfaces in board-specific *.dts files. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 22 9月, 2013 1 次提交
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由 Guennadi Liakhovetski 提交于
Currently DT compatibility strings of both types can be found in the kernel sources: <unit>-<soc> and <soc>-<unit>, whereas a unique format should be followed and the former one is preferred. This patch converts the SDHI MMC driver and its users to the common standard. This is safe for now, since ATM no real products are using this driver with DT. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: NChris Ball <cjb@laptop.org> [Removed r8a7740.dtsi portion as it is not applicable] Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 31 7月, 2013 1 次提交
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由 Magnus Damm 提交于
Add PMU information to sh73a0.dtsi. With this included KZM9G DT reference may use the PMU. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 22 7月, 2013 1 次提交
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由 Laurent Pinchart 提交于
Add a pfc node to the sh73a0 device tree and remove manual pinmux initialization from the corresponding board files. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 18 6月, 2013 1 次提交
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由 Guennadi Liakhovetski 提交于
The convention for Device Tree node names is <device>@<hex-address>, where the part after '@' shouldn't contain the "0x" prefix. Fix the sh73a0.dtsi DT names. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 02 4月, 2013 1 次提交
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由 Guennadi Liakhovetski 提交于
Add DT nodes for the 4 irqpin interrupt controllers on sh73a0. We add them to sh73a0.dtsi, which is also used by configurations, doing all their device instantiation from board the .c code. We rely on the fact, that such configurations don't instantiate devices from the device-tree. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 21 3月, 2013 2 次提交
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由 Guennadi Liakhovetski 提交于
Fix several device-tree bindings, that haven't been updated for newest versions of respective drivers, and device names and pin numbers, left over from non-DT and old pinctrl versions. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
To avoid having to repeat common DT node properties in all .dts files move them to SoC's .dtsi file, setting their status to "disabled." Individual boards will pick up devices, that they want to use and change their DT node status to enabled. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 29 1月, 2013 1 次提交
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由 Simon Horman 提交于
Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 25 1月, 2013 2 次提交
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由 Simon Horman 提交于
Allow a minimal setup of the sh73a0 SoC using a flattened device tree. In particular, Configure the i2c controllers using a flattened device tree. SCI serial controller and CMT clock source, whose drivers do not yet support configuration using a flattened device tree, are still configured using C code in order to allow booting of a board with this SoC. *** Please note that the clock initialisation scheme used in this patch does not currently work with SMP as there is a yet to be resolved lock-up in workqueue initialisation. CONFIG_SMP must be disabled when using this code. *** Includes update from Thierry Reding to no longer use gic_handle_irq() Cc: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> fix
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由 Simon Horman 提交于
This allows the GIC interrupt controller of the sh73a0 SoC to be initialised using a flattened device tree blob. It does not allow the INTC interrupt controller which is also present on the sh73a0 SoC to be enabled via device tree. Nor does it handle sharing of interrupts between the GIC and INTC interrupt controllers. This limits the usefulness of this code to applications which only wish to access devices which use interrupts that can be handled by the GIC interrupt controller. Other applications should, for now, continue using non-device tree initialisation of the sh72a0 interrupt controllers. Includes update to use irqchip_init() by Thierry Reding Cc: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 07 7月, 2012 1 次提交
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由 Magnus Damm 提交于
Add generic DT board support for the r8a7740 SoC. SCIF serial ports and timers are kept as regular platform devices. Other on-chip and on-board devices should be configured via the device tree. At this point there is no interrupt controller support in place but such code will be added over time when proper IRQ domain support has been added to INTC. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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- 11 4月, 2012 1 次提交
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由 Magnus Damm 提交于
Add generic DT board support for the sh7372 SoC V2. SCIF serial ports and timers are kept as regular platform devices. Other on-chip and on-board devices should be configured via the device tree. Tested on the mackerel board via kexec using a zImage kernel with an appended dtb. At this point there is no interrupt controller support in place but such code will be added over time when proper IRQ domain support has been added to INTC. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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