1. 10 10月, 2015 1 次提交
    • M
      genirq: Allow migration of chained interrupts by installing default action · e509bd7d
      Mika Westerberg 提交于
      When a CPU is offlined all interrupts that have an action are migrated to
      other still online CPUs. However, if the interrupt has chained handler
      installed this is not done. Chained handlers are used by GPIO drivers which
      support interrupts, for instance.
      
      When the affinity is not corrected properly we end up in situation where
      most interrupts are not arriving to the online CPUs anymore. For example on
      Intel Braswell system which has SD-card card detection signal connected to
      a GPIO the IO-APIC routing entries look like below after CPU1 is offlined:
      
        pin30, enabled , level, low , V(52), IRR(0), S(0), logical , D(03), M(1)
        pin31, enabled , level, low , V(42), IRR(0), S(0), logical , D(03), M(1)
        pin32, enabled , level, low , V(62), IRR(0), S(0), logical , D(03), M(1)
        pin5b, enabled , level, low , V(72), IRR(0), S(0), logical , D(03), M(1)
      
      The problem here is that the destination mask still contains both CPUs even
      if CPU1 is already offline. This means that the IO-APIC still routes
      interrupts to the other CPU as well.
      
      We solve the problem by providing a default action for chained interrupts.
      This action allows the migration code to correct affinity (as it finds
      desc->action != NULL).
      
      Also make the default action handler to emit a warning if for some reason a
      chained handler ends up calling it.
      Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
      Cc: Jiang Liu <jiang.liu@linux.intel.com>
      Link: http://lkml.kernel.org/r/1444039935-30475-1-git-send-email-mika.westerberg@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      e509bd7d
  2. 16 9月, 2015 1 次提交
  3. 12 6月, 2015 1 次提交
  4. 14 2月, 2015 1 次提交
  5. 13 12月, 2014 1 次提交
    • T
      genirq: Prevent proc race against freeing of irq descriptors · c291ee62
      Thomas Gleixner 提交于
      Since the rework of the sparse interrupt code to actually free the
      unused interrupt descriptors there exists a race between the /proc
      interfaces to the irq subsystem and the code which frees the interrupt
      descriptor.
      
      CPU0				CPU1
      				show_interrupts()
      				  desc = irq_to_desc(X);
      free_desc(desc)
        remove_from_radix_tree();
        kfree(desc);
      				  raw_spinlock_irq(&desc->lock);
      
      /proc/interrupts is the only interface which can actively corrupt
      kernel memory via the lock access. /proc/stat can only read from freed
      memory. Extremly hard to trigger, but possible.
      
      The interfaces in /proc/irq/N/ are not affected by this because the
      removal of the proc file is serialized in procfs against concurrent
      readers/writers. The removal happens before the descriptor is freed.
      
      For architectures which have CONFIG_SPARSE_IRQ=n this is a non issue
      as the descriptor is never freed. It's merely cleared out with the irq
      descriptor lock held. So any concurrent proc access will either see
      the old correct value or the cleared out ones.
      
      Protect the lookup and access to the irq descriptor in
      show_interrupts() with the sparse_irq_lock.
      
      Provide kstat_irqs_usr() which is protecting the lookup and access
      with sparse_irq_lock and switch /proc/stat to use it.
      
      Document the existing kstat_irqs interfaces so it's clear that the
      caller needs to take care about protection. The users of these
      interfaces are either not affected due to SPARSE_IRQ=n or already
      protected against removal.
      
      Fixes: 1f5a5b87 "genirq: Implement a sane sparse_irq allocator"
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: stable@vger.kernel.org
      c291ee62
  6. 19 3月, 2014 1 次提交
  7. 24 6月, 2013 1 次提交
    • G
      irqdomain: Include hwirq number in /proc/interrupts · c12d2f42
      Grant Likely 提交于
      Add the hardware interrupt number to the output of /proc/interrupts.
      It is often important to have access to the hardware interrupt number because
      it identifies exactly how an interrupt signal is wired up to the interrupt
      controller.  This is especially important when using irq_domains since irq
      numbers get dynamically allocated in that case, and have no relation to the
      actual hardware number.
      
      Note: This output is currently conditional on whether or not the irq_domain
      pointer is set; however hwirq could still be used without irq_domain.  It
      may be worthwhile to always output the hwirq number regardless of the
      domain pointer.
      Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      Tested-by: NOlof Johansson <olof@lixom.net>
      Cc: Ben Herrenschmidt <benh@kernel.crashing.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      c12d2f42
  8. 02 5月, 2013 1 次提交
  9. 10 4月, 2013 1 次提交
    • A
      procfs: new helper - PDE_DATA(inode) · d9dda78b
      Al Viro 提交于
      The only part of proc_dir_entry the code outside of fs/proc
      really cares about is PDE(inode)->data.  Provide a helper
      for that; static inline for now, eventually will be moved
      to fs/proc, along with the knowledge of struct proc_dir_entry
      layout.
      Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
      d9dda78b
  10. 23 2月, 2013 1 次提交
  11. 26 5月, 2011 1 次提交
  12. 25 5月, 2011 1 次提交
    • M
      bitmap, irq: add smp_affinity_list interface to /proc/irq · 4b060420
      Mike Travis 提交于
      Manually adjusting the smp_affinity for IRQ's becomes unwieldy when the
      cpu count is large.
      
      Setting smp affinity to cpus 256 to 263 would be:
      
      	echo 000000ff,00000000,00000000,00000000,00000000,00000000,00000000,00000000 > smp_affinity
      
      instead of:
      
      	echo 256-263 > smp_affinity_list
      
      Think about what it looks like for cpus around say, 4088 to 4095.
      
      We already have many alternate "list" interfaces:
      
      /sys/devices/system/cpu/cpuX/indexY/shared_cpu_list
      /sys/devices/system/cpu/cpuX/topology/thread_siblings_list
      /sys/devices/system/cpu/cpuX/topology/core_siblings_list
      /sys/devices/system/node/nodeX/cpulist
      /sys/devices/pci***/***/local_cpulist
      
      Add a companion interface, smp_affinity_list to use cpu lists instead of
      cpu maps.  This conforms to other companion interfaces where both a map
      and a list interface exists.
      
      This required adding a bitmap_parselist_user() function in a manner
      similar to the bitmap_parse_user() function.
      
      [akpm@linux-foundation.org: make __bitmap_parselist() static]
      Signed-off-by: NMike Travis <travis@sgi.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Jack Steiner <steiner@sgi.com>
      Cc: Lee Schermerhorn <lee.schermerhorn@hp.com>
      Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      4b060420
  13. 03 5月, 2011 1 次提交
  14. 29 3月, 2011 1 次提交
  15. 26 3月, 2011 1 次提交
  16. 17 3月, 2011 1 次提交
  17. 19 2月, 2011 4 次提交
  18. 01 12月, 2010 1 次提交
  19. 12 10月, 2010 1 次提交
  20. 04 10月, 2010 2 次提交
  21. 12 5月, 2010 1 次提交
  22. 03 5月, 2010 1 次提交
    • P
      genirq: Add CPU mask affinity hint · e7a297b0
      Peter P Waskiewicz Jr 提交于
      This patch adds a cpumask affinity hint to the irq_desc structure,
      along with a registration function and a read-only proc entry for each
      interrupt.
      
      This affinity_hint handle for each interrupt can be used by underlying
      drivers that need a better mechanism to control interrupt affinity.
      The underlying driver can register a cpumask for the interrupt, which
      will allow the driver to provide the CPU mask for the interrupt to
      anything that requests it.  The intent is to extend the userspace
      daemon, irqbalance, to help hint to it a preferred CPU mask to balance
      the interrupt into.
      
      [ tglx: Fixed compile warnings, added WARN_ON, made SMP only ]
      Signed-off-by: NPeter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
      Cc: davem@davemloft.net
      Cc: arjan@linux.jf.intel.com
      Cc: bhutchings@solarflare.com
      LKML-Reference: <20100430214445.3992.41647.stgit@ppwaskie-hc2.jf.intel.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      e7a297b0
  23. 30 3月, 2010 1 次提交
    • T
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking... · 5a0e3ad6
      Tejun Heo 提交于
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
      
      percpu.h is included by sched.h and module.h and thus ends up being
      included when building most .c files.  percpu.h includes slab.h which
      in turn includes gfp.h making everything defined by the two files
      universally available and complicating inclusion dependencies.
      
      percpu.h -> slab.h dependency is about to be removed.  Prepare for
      this change by updating users of gfp and slab facilities include those
      headers directly instead of assuming availability.  As this conversion
      needs to touch large number of source files, the following script is
      used as the basis of conversion.
      
        http://userweb.kernel.org/~tj/misc/slabh-sweep.py
      
      The script does the followings.
      
      * Scan files for gfp and slab usages and update includes such that
        only the necessary includes are there.  ie. if only gfp is used,
        gfp.h, if slab is used, slab.h.
      
      * When the script inserts a new include, it looks at the include
        blocks and try to put the new include such that its order conforms
        to its surrounding.  It's put in the include block which contains
        core kernel includes, in the same order that the rest are ordered -
        alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
        doesn't seem to be any matching order.
      
      * If the script can't find a place to put a new include (mostly
        because the file doesn't have fitting include block), it prints out
        an error message indicating which .h file needs to be added to the
        file.
      
      The conversion was done in the following steps.
      
      1. The initial automatic conversion of all .c files updated slightly
         over 4000 files, deleting around 700 includes and adding ~480 gfp.h
         and ~3000 slab.h inclusions.  The script emitted errors for ~400
         files.
      
      2. Each error was manually checked.  Some didn't need the inclusion,
         some needed manual addition while adding it to implementation .h or
         embedding .c file was more appropriate for others.  This step added
         inclusions to around 150 files.
      
      3. The script was run again and the output was compared to the edits
         from #2 to make sure no file was left behind.
      
      4. Several build tests were done and a couple of problems were fixed.
         e.g. lib/decompress_*.c used malloc/free() wrappers around slab
         APIs requiring slab.h to be added manually.
      
      5. The script was run on all .h files but without automatically
         editing them as sprinkling gfp.h and slab.h inclusions around .h
         files could easily lead to inclusion dependency hell.  Most gfp.h
         inclusion directives were ignored as stuff from gfp.h was usually
         wildly available and often used in preprocessor macros.  Each
         slab.h inclusion directive was examined and added manually as
         necessary.
      
      6. percpu.h was updated not to include slab.h.
      
      7. Build test were done on the following configurations and failures
         were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
         distributed build env didn't work with gcov compiles) and a few
         more options had to be turned off depending on archs to make things
         build (like ipr on powerpc/64 which failed due to missing writeq).
      
         * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
         * powerpc and powerpc64 SMP allmodconfig
         * sparc and sparc64 SMP allmodconfig
         * ia64 SMP allmodconfig
         * s390 SMP allmodconfig
         * alpha SMP allmodconfig
         * um on x86_64 SMP allmodconfig
      
      8. percpu.h modifications were reverted so that it could be applied as
         a separate patch and serve as bisection point.
      
      Given the fact that I had only a couple of failures from tests on step
      6, I'm fairly confident about the coverage of this conversion patch.
      If there is a breakage, it's likely to be something in one of the arch
      headers which should be easily discoverable easily on most builds of
      the specific arch.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
      5a0e3ad6
  24. 24 3月, 2010 1 次提交
  25. 15 12月, 2009 1 次提交
  26. 20 11月, 2009 1 次提交
  27. 18 11月, 2009 1 次提交
  28. 08 11月, 2009 1 次提交
  29. 12 1月, 2009 1 次提交
    • M
      cpumask: update irq_desc to use cpumask_var_t · 7f7ace0c
      Mike Travis 提交于
      Impact: reduce memory usage, use new cpumask API.
      
      Replace the affinity and pending_masks with cpumask_var_t's.  This adds
      to the significant size reduction done with the SPARSE_IRQS changes.
      
      The added functions (init_alloc_desc_masks & init_copy_desc_masks) are
      in the include file so they can be inlined (and optimized out for the
      !CONFIG_CPUMASKS_OFFSTACK case.)  [Naming chosen to be consistent with
      the other init*irq functions, as well as the backwards arg declaration
      of "from, to" instead of the more common "to, from" standard.]
      
      Includes a slight change to the declaration of struct irq_desc to embed
      the pending_mask within ifdef(CONFIG_SMP) to be consistent with other
      references, and some small changes to Xen.
      
      Tested: sparse/non-sparse/cpumask_offstack/non-cpumask_offstack/nonuma/nosmp on x86_64
      Signed-off-by: NMike Travis <travis@sgi.com>
      Cc: Chris Wright <chrisw@sous-sol.org>
      Cc: Jeremy Fitzhardinge <jeremy@xensource.com>
      Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
      Cc: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
      Cc: virtualization@lists.osdl.org
      Cc: xen-devel@lists.xensource.com
      Cc: Yinghai Lu <yhlu.kernel@gmail.com>
      7f7ace0c
  30. 04 1月, 2009 1 次提交
    • I
      ia64: cpumask fix for is_affinity_mask_valid() · 6bdf197b
      Ingo Molnar 提交于
      Impact: build fix on ia64
      
      ia64's default_affinity_write() still had old cpumask_t usage:
      
       /home/mingo/tip/kernel/irq/proc.c: In function `default_affinity_write':
       /home/mingo/tip/kernel/irq/proc.c:114: error: incompatible type for argument 1 of `is_affinity_mask_valid'
       make[3]: *** [kernel/irq/proc.o] Error 1
       make[3]: *** Waiting for unfinished jobs....
      
      update it to cpumask_var_t.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      6bdf197b
  31. 01 1月, 2009 1 次提交
  32. 13 12月, 2008 2 次提交
  33. 08 12月, 2008 1 次提交
    • Y
      sparse irq_desc[] array: core kernel and x86 changes · 0b8f1efa
      Yinghai Lu 提交于
      Impact: new feature
      
      Problem on distro kernels: irq_desc[NR_IRQS] takes megabytes of RAM with
      NR_CPUS set to large values. The goal is to be able to scale up to much
      larger NR_IRQS value without impacting the (important) common case.
      
      To solve this, we generalize irq_desc[NR_IRQS] to an (optional) array of
      irq_desc pointers.
      
      When CONFIG_SPARSE_IRQ=y is used, we use kzalloc_node to get irq_desc,
      this also makes the IRQ descriptors NUMA-local (to the site that calls
      request_irq()).
      
      This gets rid of the irq_cfg[] static array on x86 as well: irq_cfg now
      uses desc->chip_data for x86 to store irq_cfg.
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      0b8f1efa
  34. 10 11月, 2008 1 次提交
  35. 22 10月, 2008 1 次提交