1. 13 7月, 2016 1 次提交
    • D
      x86/mm: Disallow running with 32-bit PTEs to work around erratum · e4a84be6
      Dave Hansen 提交于
      The Intel(R) Xeon Phi(TM) Processor x200 Family (codename: Knights
      Landing) has an erratum where a processor thread setting the Accessed
      or Dirty bits may not do so atomically against its checks for the
      Present bit.  This may cause a thread (which is about to page fault)
      to set A and/or D, even though the Present bit had already been
      atomically cleared.
      
      These bits are truly "stray".  In the case of the Dirty bit, the
      thread associated with the stray set was *not* allowed to write to
      the page.  This means that we do not have to launder the bit(s); we
      can simply ignore them.
      
      If the PTE is used for storing a swap index or a NUMA migration index,
      the A bit could be misinterpreted as part of the swap type.  The stray
      bits being set cause a software-cleared PTE to be interpreted as a
      swap entry.  In some cases (like when the swap index ends up being
      for a non-existent swapfile), the kernel detects the stray value
      and WARN()s about it, but there is no guarantee that the kernel can
      always detect it.
      
      When we have 64-bit PTEs (64-bit mode or 32-bit PAE), we were able
      to move the swap PTE format around to avoid these troublesome bits.
      But, 32-bit non-PAE is tight on bits.  So, disallow it from running
      on this hardware.  I can't imagine anyone wanting to run 32-bit
      non-highmem kernels on this hardware, but disallowing them from
      running entirely is surely the safe thing to do.
      Signed-off-by: NDave Hansen <dave.hansen@linux.intel.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Andy Lutomirski <luto@kernel.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Brian Gerst <brgerst@gmail.com>
      Cc: Dave Hansen <dave@sr71.net>
      Cc: Denys Vlasenko <dvlasenk@redhat.com>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: Josh Poimboeuf <jpoimboe@redhat.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Luis R. Rodriguez <mcgrof@suse.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Toshi Kani <toshi.kani@hp.com>
      Cc: dave.hansen@intel.com
      Cc: linux-mm@kvack.org
      Cc: mhocko@suse.com
      Link: http://lkml.kernel.org/r/20160708001914.D0B50110@viggo.jf.intel.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      e4a84be6
  2. 04 12月, 2015 1 次提交
    • K
      x86/mm: Fix regression with huge pages on PAE · 70f15287
      Kirill A. Shutemov 提交于
      Recent PAT patchset has caused issue on 32-bit PAE machines:
      
        page:eea45000 count:0 mapcount:-128 mapping:  (null) index:0x0 flags: 0x40000000()
        page dumped because: VM_BUG_ON_PAGE(page_mapcount(page) < 0)
        ------------[ cut here ]------------
        kernel BUG at /home/build/linux-boris/mm/huge_memory.c:1485!
        invalid opcode: 0000 [#1] SMP
        [...]
        Call Trace:
         unmap_single_vma
         ? __wake_up
         unmap_vmas
         unmap_region
         do_munmap
         vm_munmap
         SyS_munmap
         do_fast_syscall_32
         ? __do_page_fault
         sysenter_past_esp
        Code: ...
        EIP: [<c11bde80>] zap_huge_pmd+0x240/0x260 SS:ESP 0068:f6459d98
      
      The problem is in pmd_pfn_mask() and pmd_flags_mask(). These
      helpers use PMD_PAGE_MASK to calculate resulting mask.
      PMD_PAGE_MASK is 'unsigned long', not 'unsigned long long' as
      phys_addr_t is on 32-bit PAE (ARCH_PHYS_ADDR_T_64BIT). As a
      result, the upper bits of resulting mask get truncated.
      
      pud_pfn_mask() and pud_flags_mask() aren't problematic since we
      don't have PUD page table level on 32-bit systems, but it's
      reasonable to keep them consistent with PMD counterpart.
      
      Introduce PHYSICAL_PMD_PAGE_MASK and PHYSICAL_PUD_PAGE_MASK in
      addition to existing PHYSICAL_PAGE_MASK and reworks helpers to
      use them.
      Reported-and-Tested-by: NBoris Ostrovsky <boris.ostrovsky@oracle.com>
      Signed-off-by: NKirill A. Shutemov <kirill.shutemov@linux.intel.com>
      [ Fix -Woverflow warnings from the realmode code. ]
      Signed-off-by: NBorislav Petkov <bp@suse.de>
      Reviewed-by: NToshi Kani <toshi.kani@hpe.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Andy Lutomirski <luto@amacapital.net>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Brian Gerst <brgerst@gmail.com>
      Cc: Denys Vlasenko <dvlasenk@redhat.com>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: Jürgen Gross <jgross@suse.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Mel Gorman <mgorman@suse.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: elliott@hpe.com
      Cc: konrad.wilk@oracle.com
      Cc: linux-mm <linux-mm@kvack.org>
      Fixes: f70abb0f ("x86/asm: Fix pud/pmd interfaces to handle large PAT bit")
      Link: http://lkml.kernel.org/r/1448878233-11390-2-git-send-email-bp@alien8.deSigned-off-by: NIngo Molnar <mingo@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@kernel.org>
      70f15287
  3. 21 7月, 2015 1 次提交
  4. 20 3月, 2014 2 次提交
  5. 13 10月, 2013 1 次提交
  6. 14 8月, 2013 1 次提交
  7. 30 1月, 2013 2 次提交
  8. 01 2月, 2012 1 次提交
  9. 03 8月, 2010 2 次提交
  10. 13 7月, 2010 1 次提交
  11. 10 4月, 2009 1 次提交
    • H
      x86, setup: "glove box" BIOS calls -- infrastructure · 7a734e7d
      H. Peter Anvin 提交于
      Impact: new interfaces (not yet used)
      
      For all the platforms out there, there is an infinite number of buggy
      BIOSes.  This adds infrastructure to treat BIOS interrupts more like
      toxic waste and "glove box" them -- we switch out the register set,
      perform the BIOS interrupt, and then restore the previous state.
      
      LKML-Reference: <49DE7F79.4030106@zytor.com>
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: Rafael J. Wysocki <rjw@sisk.pl>
      7a734e7d
  12. 23 2月, 2009 1 次提交
    • I
      x86: remove the Voyager 32-bit subarch · 965c7eca
      Ingo Molnar 提交于
      Impact: remove unused/broken code
      
      The Voyager subarch last built successfully on the v2.6.26 kernel
      and has been stale since then and does not build on the v2.6.27,
      v2.6.28 and v2.6.29-rc5 kernels.
      
      No actual users beyond the maintainer reported this breakage.
      Patches were sent and most of the fixes were accepted but the
      discussion around how to do a few remaining issues cleanly
      fizzled out with no resolution and the code remained broken.
      
      In the v2.6.30 x86 tree development cycle 32-bit subarch support
      has been reworked and removed - and the Voyager code, beyond the
      build problems already known, needs serious and significant
      changes and probably a rewrite to support it.
      
      CONFIG_X86_VOYAGER has been marked BROKEN then. The maintainer has
      been notified but no patches have been sent so far to fix it.
      
      While all other subarchs have been converted to the new scheme,
      voyager is still broken. We'd prefer to receive patches which
      clean up the current situation in a constructive way, but even in
      case of removal there is no obstacle to add that support back
      after the issues have been sorted out in a mutually acceptable
      fashion.
      
      So remove this inactive code for now.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      965c7eca
  13. 18 8月, 2008 1 次提交
    • A
      x86: fix build warnings in real mode code · 1b72691c
      Andi Kleen 提交于
      This recent patch
      
      commit c3965bd1
      Author: Paul Jackson <pj@sgi.com>
      Date:   Wed May 14 08:15:34 2008 -0700
      
          x86 boot: proper use of ARRAY_SIZE instead of repeated E820MAX constant
      
      caused these new warnings during a normal build:
      
      In file included from linux-2.6/arch/x86/boot/memory.c:17:
      linux-2.6/include/linux/log2.h: In function '__ilog2_u32':
      linux-2.6/include/linux/log2.h:34: warning: implicit declaration of function 'fls'
      linux-2.6/include/linux/log2.h: In function '__ilog2_u64':
      linux-2.6/include/linux/log2.h:42: warning: implicit declaration of function 'fls64'
      linux-2.6/include/linux/log2.h: In function '__roundup_pow_of_two ':
      linux-2.6/include/linux/log2.h:63: warning: implicit declaration of function 'fls_long'
      
      I tried to fix them in log2.h, but it's difficult because the real mode
      environment is completely different from a normal kernel environment. Instead
      define an own ARRAY_SIZE macro in boot.h, similar to the other private
      macros there.
      Signed-off-by: NAndi Kleen <ak@linux.intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      1b72691c
  14. 14 8月, 2008 1 次提交
  15. 13 8月, 2008 1 次提交
    • J
      x86: fix setup code crashes on my old 486 box · 7b27718b
      Joerg Roedel 提交于
      yesterday I tried to reactivate my old 486 box and wanted to install a
      current Linux with latest kernel on it. But it turned out that the
      latest kernel does not boot because the machine crashes early in the
      setup code.
      
      After some debugging it turned out that the problem is the query_ist()
      function. If this interrupt with that function is called the machine
      simply locks up. It looks like a BIOS bug. Looking for a workaround for
      this problem I wrote the attached patch. It checks for the CPUID
      instruction and if it is not implemented it does not call the speedstep
      BIOS function. As far as I know speedstep should be available since some
      Pentium earliest.
      
      Alan Cox observed that it's available since the Pentium II, so cpuid
      levels 4 and 5 can be excluded altogether.
      
      H. Peter Anvin cleaned up the code some more:
      
      > Right in concept, but I dislike the implementation (duplication of the
      > CPU detect code we already have).  Could you try this patch and see if
      > it works for you?
      
      which, with a small modification to fix a build error with it the
      resulting kernel boots on my machine.
      Signed-off-by: NJoerg Roedel <joro@8bytes.org>
      Signed-off-by: N"H. Peter Anvin" <hpa@zytor.com>
      Cc: <stable@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      7b27718b
  16. 20 4月, 2008 1 次提交
  17. 17 4月, 2008 1 次提交
    • P
      x86: move suspend wakeup code to C · e44b7b75
      Pavel Machek 提交于
      Move wakeup code to .c, so that video mode setting code can be shared
      between boot and wakeup. Remove nasty assembly code in 64-bit case by
      re-using trampoline code. Stack setup was fixed to clear high 16bits
      of %esp, maybe that fixes some machines.
      
      .c code sharing and morse code was done H. Peter Anvin, Sam Ravnborg
      reviewed kbuild related stuff, and it seems okay to him. Rafael did
      some cleanups.
      
      [rjw:
      * Made the patch stop breaking compilation on x86-32
      * Added arch/x86/kernel/acpi/sleep.h
      * Got rid of compiler warnings in arch/x86/kernel/acpi/sleep.c
      * Fixed 32-bit compilation on x86-64 systems
      * Added include/asm-x86/trampoline.h and fixed the non-SMP
        compilation on 64-bit x86
      * Removed arch/x86/kernel/acpi/sleep_32.c which was not used
      * Fixed some breakage caused by the integration of smpboot.c done
        under us in the meantime]
      Signed-off-by: NPavel Machek <pavel@suse.cz>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      Reviewed-by: NSam Ravnborg <sam@ravnborg.org>
      Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      e44b7b75
  18. 30 1月, 2008 2 次提交
  19. 26 10月, 2007 2 次提交
  20. 24 10月, 2007 1 次提交
  21. 11 10月, 2007 1 次提交
  22. 24 8月, 2007 1 次提交
    • H
      [x86 setup] Volatilize asm() statements · b015124e
      H. Peter Anvin 提交于
      asm() statements need to be volatile when:
      
      a. They have side effects (other than value returned).
      b. When the value returned can vary over time.
      c. When they have ordering constraints that cannot be expressed to gcc.
      
      In particular, the keyboard and timer reads were violating constraint (b),
      which resulted in the keyboard/timeout poll getting
      loop-invariant-removed when compiling with gcc 4.2.0.
      
      Thanks to an anonymous bug reporter for pointing this out.
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      b015124e
  23. 19 7月, 2007 1 次提交
    • H
      [x86 setup] Fix assembly constraints · 5593eaa8
      H. Peter Anvin 提交于
      Fix incorrect assembly constraints.  In particular, fix memory
      constraints used inside push..pop, which can cause invalid operation
      since gcc may generate %esp-relative references.
      
      Additionally:
      
      outl() should have "dN" not "dn".
      
      query_mca() shouldn't listen 16/32-bit registers in an 8-bit only
      context.
      
      has_eflag(): the "mask" is only used well after both the stack pointer
      and the output registers have been touched; this requires the output
      registers to be earlyclobbers (=&) and the input to exclude memory (so
      "ri", not "g").
      
      Thanks to Etienne Lorrain and Chuck Ebbert for prompting this review.
      
      Cc: Etienne Lorrain <etienne_lorrain@yahoo.fr>
      Cc: Chuck Ebbert <cebbert@redhat.com>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      5593eaa8
  24. 13 7月, 2007 1 次提交