- 27 10月, 2015 1 次提交
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由 Peter Ujfalusi 提交于
Switch to use the ti,edma3-tpcc and ti,edma3-tptc binding for the eDMA3 and enable the DMA even crossbar with ti,am335x-edma-crossbar. With the new bindings boards can customize and tweak the DMA channel priority to match their needs. With the new binding the memcpy is safe to be used since with the old binding it was not possible for a driver to know which channel is allowed to be used as non HW triggered channel. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 06 9月, 2015 1 次提交
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由 Keerthy 提交于
rtc can either be supplied from internal 32k clock or external crystal generated 32k clock. Internal clock is SOC specific and the external clock is board dependent. Adding the corresponding nodes. Signed-off-by: NKeerthy <j-keerthy@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
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- 06 8月, 2015 1 次提交
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由 Dave Gerlach 提交于
DCDC5 and DCDC6 supply rtc and need to be on for accessing the module. On A1 revision of the TPS65218, FSEAL bit would be undefined without coin-cell present which in many cases led to it being set, causing DCDC5 and DCDC6 to stay active, but also leading to unexplained failures when it was not. On B1 revision, FSEAL is always 0 when no coin-cell is present so this patch is required on boards with B1 revision to ever work. This implementation works on boards with either A1 or B1 revision and makes sure that DCDC5 and DCDC6 always stay active. Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 05 8月, 2015 2 次提交
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由 Roger Quadros 提交于
Add eMMC pinmux and mmc2 related bits. We keep the mmc2 controller disabled as it conflits with gpmc/NAND. To enable emmc, simply set mmc2 controller node to "okay" and set the gpmc node to "disabled" and change the SelEMMCorNAND gpio-hog to output-high. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
On this board either eMMC or NAND can work based on the level of spi2_cs0.gpio0_23. Add a gpio-hog to enable configuration of this pin in the device tree. Move pinmux for spi2_cs0 (SEL_eMMCorNANDn) out of NAND node into gpio0 so it is initialized with gpio0. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 21 7月, 2015 1 次提交
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由 Sekhar Nori 提交于
Add serialN aliases for all 6 UART instances on the AM437x SoC so each board's .dts file does not have to define its own aliases. Remove the alias added for am437x-gp-evm.dts now that we have the aliases defined in am4372.dtsi file. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 14 7月, 2015 5 次提交
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由 Peter Ujfalusi 提交于
The board uses McASP1 <-> tlv320aic3106 for analog audio and has Headphone out and Line in connectors. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Peter Ujfalusi 提交于
Add node for McASP1 along with the needed pinctrl entries. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Peter Ujfalusi 提交于
Analog audio is using this codec on the board. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Peter Ujfalusi 提交于
The same regulator is used by other chips on the board. The power path is: VBAT -> TPS63031 - Enable signal is V1_8D regulator -> V3_3D. V3_3D is used by SD slot and tlv320aic3106 codec as well. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Peter Ujfalusi 提交于
GPIO5_8 is used as a mux switch between LCD and HDMI displays. This mux affects audio routing as well since in LCD mode HDMI audio is not possible and when HDMI is selected analog audio is not working. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 21 5月, 2015 2 次提交
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由 Lad, Prabhakar 提交于
this patch does the following: 1: adds DT node for fixed oscillator. 2: adds DT node entries for ov2659 sensor 3: adds remote-endpoint entry for VPFE. Signed-off-by: NLad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Eyal Reizer 提交于
enable mmc3 used for wlan and uart3 used for bluetooth configure the gpios used for wlan and bluetooth controls add fixed voltage regulator used for wlan power control Signed-off-by: NEyal Reizer <eyalr@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 3月, 2015 1 次提交
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由 Marc Zyngier 提交于
OMAP4/5 has been (ab)using the gic_arch_extn to provide wakeup from suspend, and it makes a lot of sense to convert this code to use stacked domains instead. This patch does just this, updating the DT files to actually reflect what the HW provides. BIG FAT WARNING: because the DTs were so far lying by not exposing the WUGEN HW block, kernels with this patch applied won't have any suspend-resume facility when booted with old DTs, and old kernels with updated DTs won't even boot. On a platform with this patch applied, the system looks like this: root@bacon-fat:~# cat /proc/interrupts CPU0 CPU1 16: 0 0 WUGEN 37 gp_timer 19: 233799 155916 GIC 27 arch_timer 23: 0 0 WUGEN 9 l3-dbg-irq 24: 1 0 WUGEN 10 l3-app-irq 27: 282 0 WUGEN 13 omap-dma-engine 44: 0 0 4ae10000.gpio 13 DMA 294: 0 0 WUGEN 20 gpmc 297: 506 0 WUGEN 56 48070000.i2c 298: 0 0 WUGEN 57 48072000.i2c 299: 0 0 WUGEN 61 48060000.i2c 300: 0 0 WUGEN 62 4807a000.i2c 301: 8 0 WUGEN 60 4807c000.i2c 308: 2439 0 WUGEN 74 OMAP UART2 312: 362 0 WUGEN 83 mmc2 313: 502 0 WUGEN 86 mmc0 314: 13 0 WUGEN 94 mmc1 350: 0 0 PRCM pinctrl, pinctrl 406: 35155709 0 GIC 109 ehci_hcd:usb1 407: 0 0 WUGEN 7 palmas 409: 0 0 WUGEN 119 twl6040 410: 0 0 twl6040 5 twl6040_irq_ready 411: 0 0 twl6040 0 twl6040_irq_th IPI0: 0 1 CPU wakeup interrupts IPI1: 0 0 Timer broadcast interrupts IPI2: 95334 902334 Rescheduling interrupts IPI3: 0 0 Function call interrupts IPI4: 479 648 Single function call interrupts IPI5: 0 0 CPU stop interrupts IPI6: 0 0 IRQ work interrupts IPI7: 0 0 completion interrupts Err: 0 Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088629-15377-8-git-send-email-marc.zyngier@arm.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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- 08 1月, 2015 1 次提交
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由 Benoit Parrot 提交于
Add device tree nodes and pinmux entries for Video Processing Front End (VPFE) on am437x gp evm. Signed-off-by: NBenoit Parrot <bparrot@ti.com> Signed-off-by: NLad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 24 11月, 2014 1 次提交
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由 Mugunthan V N 提交于
Add DCAN support for AM437x GP EVM with both DCAN instances. [Roger Q] Updated output pin to not use pull up. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NGeorge Cherian <george.cherian@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 22 11月, 2014 1 次提交
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由 Vignesh R 提交于
This patch adds tscadc DT entries for am437x-gp-evm and am43x-epos-evm. Signed-off-by: NVignesh R <vigneshr@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 11 11月, 2014 1 次提交
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由 Keerthy 提交于
DCDC3 supplies voltage to DDR. Fix DCDC3 volatge to 1.5V which is the reset value. Programming to a non-reset value while executing from DDR will result in random hangs. Signed-off-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 05 9月, 2014 2 次提交
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由 Roger Quadros 提交于
NAND uses wait pin only to indicate device readiness after a block/page operation. It is not use to extend individual read/write cycle and so read/write wait pin monitoring must be disabled for NAND. This patch also gets rid of the below warning when NAND is accessed for the first time. omap_l3_noc 44000000.ocp: L3 application error: target 13 mod:1 (unclearable) Signed-off-by: NRoger Quadros <rogerq@ti.com> Reviewed-by: NPekon Gupta <pekon@pek-sem.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
am437x-gp-evm uses a NAND chip with page size 4096 bytes and spare area of 225 bytes per page. For such a setup it is preferrable to use BCH16 ECC scheme over BCH8. This also makes it compatible with ROM code ECC scheme so we can boot with NAND after flashing from kernel. Signed-off-by: NRoger Quadros <rogerq@ti.com> Reviewed-by: NPekon Gupta <pekon@pek-sem.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 04 9月, 2014 1 次提交
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由 Nishanth Menon 提交于
On the GP EVM, the ambient light sensor is limited to 100KHz on the I2C bus. So use 100kHz for I2C on the GP EVM due to this limitation on the ambient light sensor. Reported-by: NAparna Balasubramanian <aparnab@ti.com> Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 29 7月, 2014 1 次提交
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由 Roger Quadros 提交于
Update the bindings for touchscreen size. Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
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- 09 7月, 2014 2 次提交
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由 Keerthy 提交于
Add TPS65218 device tree nodes. i2c clock frequency setting also added as part of tps65218 nodes addition. As i2c clock enabling is required. Signed-off-by: NKeerthy <j-keerthy@ti.com> Reviewed-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Keerthy 提交于
Fix i2c nodes indentation. Signed-off-by: NKeerthy <j-keerthy@ti.com> Reviewed-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 03 6月, 2014 1 次提交
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由 Sathya Prakash M R 提交于
Add DT data for am437x-gp-evm's LCD panel. Signed-off-by: NSathya Prakash M R <sathyap@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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- 28 5月, 2014 1 次提交
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由 Pekon Gupta 提交于
Adds pinmux and DT node for Micron (MT29F4G08AB) x8 NAND device present on am437x-gp-evm board. (1) As NAND Flash data lines are muxed with eMMC, Thus at a given time either eMMC or NAND can be enabled. Selection between eMMC and NAND is controlled: (a) By dynamically driving following GPIO pin from software SPI2_CS0(GPIO) == 0 NAND is selected (default) SPI2_CS0(GPIO) == 1 eMMC is selected (b) By statically using Jumper (J89) on the board (2) As NAND device connnected to this board has page-size=4K and oob-size=224, So ROM code expects boot-loaders to be flashed in BCH16 ECC scheme for NAND boot. Signed-off-by: NPekon Gupta <pekon@ti.com> Reviewed-by: NJavier Martinez Canillas <javier@dowhile0.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 20 5月, 2014 1 次提交
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由 Mugunthan V N 提交于
Add CPSW ethernet support for AM437x GP EVM which has one slave pinned out Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 07 5月, 2014 3 次提交
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由 Dave Gerlach 提交于
The VTT regulator for DDR3 termination on the am437x-gp-evm is controlled by a gpio. It is configured by the bootloader so here we define an always-on, fixed voltage regulator to hold the gpio. Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sekhar Nori 提交于
Add touchscreen support for AM437x GP EVM using pixcir touchscreen controller. CC: Benoit Cousson <bcousson@baylibre.com> CC: Tony Lindgren <tony@atomide.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 George Cherian 提交于
Enable - USB PHY - USB for am437x-gp-evm Signed-off-by: NGeorge Cherian <george.cherian@ti.com> Acked-by: NRoger Quadros <rogerq@ti.com> Acked-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 26 4月, 2014 1 次提交
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由 Dave Gerlach 提交于
Do not reset GPIO5 at boot-up because GPIO5_7 is used on AM437x GP-EVM to control VTT regulators on DDR3. Without this some GP-EVM boards will fail to boot because of DDR3 corruption. Reported-by: NNishanth Menon <nm@ti.com> Tested-by: NNishanth Menon <nm@ti.com> Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 06 3月, 2014 1 次提交
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由 Balaji T K 提交于
enable sd card slot on am437x-gp-evm Signed-off-by: NBalaji T K <balajitk@ti.com> Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 03 3月, 2014 4 次提交
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由 Sourav Poddar 提交于
Add gpio keys node for am43x gp evm. Signed-off-by: NSourav Poddar <sourav.poddar@ti.com> Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>
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由 Sourav Poddar 提交于
Enable gpio3, gpio4, it will be used by gpio matrix keys. Also, can be used by othe peripherals. Signed-off-by: NSourav Poddar <sourav.poddar@ti.com> Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>
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由 Sourav Poddar 提交于
Add pwm backlight support for gp evm. Signed-off-by: NSourav Poddar <sourav.poddar@ti.com> Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>
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由 Lokesh Vutla 提交于
AM437x GP EVM DTS with pinmux information to make I2C on EVM usable. Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NSourav Poddar <sourav.poddar@ti.com> Signed-off-by: NAfzal Mohammed <afzal@ti.com> Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>
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