1. 15 4月, 2015 1 次提交
  2. 11 2月, 2015 1 次提交
    • L
      sata_dwc_460ex: disable COMPILE_TEST again · 06cc01a0
      Linus Torvalds 提交于
      Commit 84683a7e ("sata_dwc_460ex: enable COMPILE_TEST for the
      driver") enabled this driver for non-ppc460-ex platforms, but it was
      then disabled for ARM and ARM64 by commit 2de5a9c0 ("sata_dwc_460ex:
      disable compilation on ARM and ARM64") because it's too noisy and
      broken.
      
      This disabled is entirely, because it's too noisy on x86-64 too, and
      there's no point in disabling architectures one by one.  At a minimum,
      the code isn't 64-bit clean, and even on 32-bit it is questionable
      whether it makes sense.
      
      Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
      Cc: Tejun Heo <tj@kernel.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      06cc01a0
  3. 14 1月, 2015 1 次提交
  4. 12 1月, 2015 1 次提交
  5. 08 1月, 2015 1 次提交
  6. 13 12月, 2014 1 次提交
  7. 09 9月, 2014 1 次提交
  8. 07 8月, 2014 1 次提交
  9. 19 7月, 2014 1 次提交
  10. 08 5月, 2014 1 次提交
    • A
      ata: pata_at91 only works on sam9 · 2af89a3c
      Arnd Bergmann 提交于
      The smc driver used by pata_at91 is at91sam9 specific, so building
      this driver on another at91 platform results in this error:
      
      ERROR: "sam9_smc_configure" [drivers/ata/pata_at91.ko] undefined!
      ERROR: "sam9_smc_write_mode" [drivers/ata/pata_at91.ko] undefined!
      ERROR: "sam9_smc_read_mode" [drivers/ata/pata_at91.ko] undefined!
      
      This patch changes the Kconfig dependency to ensure it always works.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Cc: linux-ide@vger.kernel.org
      Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
      Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
      2af89a3c
  11. 05 5月, 2014 1 次提交
  12. 08 4月, 2014 1 次提交
  13. 03 4月, 2014 1 次提交
    • T
      libata: make AHCI_XGENE depend on PHY_XGENE · 74c03eb6
      Tejun Heo 提交于
      AHCI_XGENE is only applicable on ARM64 but it can also be enabled for
      compile testing; however, AHCI_XGENE selects PHY_XGENE which has other
      arch specific dependencies.  This leads to the following warning when
      enabling it on other archs for compile testing.
      
        warning: (AHCI_XGENE) selects PHY_XGENE which has unmet direct
        dependencies (HAS_IOMEM && OF && (ARM64 || COMPILE_TEST))
      
      Selecting a config option which itself has dependencies can easily
      lead to broken configurations.  For now, let's just make AHCI_XGENE
      depend on PHY_XGENE which has all the necessary dependencies already.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Reported-by: NLinus Torvalds <torvalds@linux-foundation.org>
      Cc: Loc Ho <lho@apm.com>
      Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
      Cc: Kishon Vijay Abraham I <kishon@ti.com>
      74c03eb6
  14. 27 3月, 2014 2 次提交
    • B
      ata: fix Marvell SATA driver dependencies · 03803ef6
      Bartlomiej Zolnierkiewicz 提交于
      Make sata_mv host driver depend on PCI || ARCH_DOVE || ARCH_KIRKWOOD ||
      ARCH_MV78XX0 || ARCH_MVEBU || ARCH_ORION5X config options as Marvell
      SATA support covers both Marvell PCI devices and Marvell Dove, Kirkwood,
      MV78xx0, Armada 370/XP and Orion5x SoCs (for non-PCI devices the driver
      to work requires suitable device tree node or platform device to be
      defined).  Additionally allow the driver build if COMPILE_TEST config
      option is set.
      
      Cc: Jason Cooper <jason@lakedaemon.net>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Gregory Clement <gregory.clement@free-electrons.com>
      Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
      Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      03803ef6
    • B
      ata: fix ARASAN CompactFlash PATA driver dependencies · e638433b
      Bartlomiej Zolnierkiewicz 提交于
      Make pata_arasan_cf host driver depend on ARCH_SPEAR13XX config
      option as ARASAN CompactFlash PATA support is specific to ST
      SPEAr13xx SoCs and the driver to work requires suitable device
      tree node (or platform device) to be defined.  Additionally
      allow the driver build if COMPILE_TEST config option is set.
      
      Cc: Viresh Kumar <viresh.linux@gmail.com>
      Cc: Shiraz Hashim <shiraz.hashim@st.com>
      Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      e638433b
  15. 26 3月, 2014 4 次提交
  16. 18 3月, 2014 1 次提交
  17. 14 3月, 2014 6 次提交
  18. 11 3月, 2014 1 次提交
    • J
      ata: Fix CS55xx dependencies · 9236a76d
      Jean Delvare 提交于
      As far as I know, the CS5520 and CS5530 chipsets were only used with
      32-bit x86 Geode processors, so I think their drivers are only needed
      on this architecture, except for build testing purpose.
      
      While we're here, simplify the dependencies for the CS5535 driver.
      
      The CS5536 was used with the Geode processors, but also on MIPS
      Loongson/Lemote 2 systems, so let its driver be built for these two
      architectures only, except for build testing purpose.
      Signed-off-by: NJean Delvare <jdelvare@suse.de>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      9236a76d
  19. 23 2月, 2014 1 次提交
  20. 19 2月, 2014 1 次提交
  21. 30 1月, 2014 1 次提交
  22. 26 7月, 2013 1 次提交
  23. 25 7月, 2013 1 次提交
    • R
      ahci_imx: add ahci sata support on imx platforms · 9e54eae2
      Richard Zhu 提交于
      imx6q contains one Synopsys AHCI SATA controller, But it can't share
      ahci_platform driver with other controllers because there are some
      misalignments of the generic AHCI controller - the bits definitions of
      the HBA registers, the Vendor Specific registers, the AHCI PHY clock
      and the AHCI signals adjustment window(GPR13 register).
      
       - CAP_SSS(bit20) of the HOST_CAP is writable, default value is '0',
         should be configured to be '1'
      
       - bit0 (only one AHCI SATA port on imx6q) of the HOST_PORTS_IMPL
         should be set to be '1'.(default 0)
      
       - One Vendor Specific register HOST_TIMER1MS(offset:0xe0) should be
         configured regarding to the frequency of AHB bus clock.
      
       - Configurations of the AHCI PHY clock, and the signal parameters of
         the GPR13
      
      Setup its own ahci sata driver, contained the imx6q specific
      initialized codes, re-use the generic ahci_platform driver, and keep
      the generic ahci_platform driver clean as much as possible.
      
      tj: patch description reformatted
      Signed-off-by: NRichard Zhu <r65037@freescale.com>
      Reviewed-by: NShawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      9e54eae2
  24. 23 7月, 2013 1 次提交
  25. 11 6月, 2013 1 次提交
  26. 24 5月, 2013 1 次提交
  27. 05 3月, 2013 1 次提交
  28. 21 2月, 2013 1 次提交
  29. 14 2月, 2013 1 次提交
  30. 22 1月, 2013 2 次提交