- 30 9月, 2014 3 次提交
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由 Maarten Lankhorst 提交于
Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@canonical.com>
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由 Maarten Lankhorst 提交于
Allows userspace to detect shared fences are supported. Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@canonical.com>
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由 Maarten Lankhorst 提交于
This fixes a regression introduced by "drm/nouveau: rework to new fence interface" (commit 29ba89b2). The fence sequence should not be reset after creation, the old value is used instead. On destruction the final value is written, to prevent another source of accidental wraparound in case of a channel being destroyed after a hang, and unblocking any other channel that may wait on the about-to-be-deleted channel to signal. I'm nothing if not optimistic about any hope of recovery from that. ;-) Reported-by: NTed Percival <ted@tedp.id.au> Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@canonical.com> Tested-by: NTed Percival <ted@tedp.id.au> Acked-by: NBen Skeggs <bskeggs@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 24 9月, 2014 2 次提交
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由 Daniel Vetter 提交于
v2: Don't forget git add, noticed by David. Cc: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Acked-by: NDavid Herrmann <dh.herrmann@gmail.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Daniel Vetter 提交于
Really, the legacy buffer api should be dead, especially for all these newfangled drivers. I suspect this is copypasta from the transitioning days, which probably originated in radeon. Cc: "Christian König" <christian.koenig@amd.com> Cc: David Herrmann <dh.herrmann@gmail.com> Cc: Rashika <rashika.kheria@gmail.com> Cc: Josh Triplett <josh@joshtriplett.org> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Fabian Frederick <fabf@skynet.be> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Alexandre Courbot <acourbot@nvidia.com> Cc: Maarten Lankhorst <maarten.lankhorst@canonical.com> Cc: Christian Engelmayer <cengelma@gmx.at> Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Reviewed-by: NDavid Herrmann <dh.herrmann@gmail.com> Acked-by: NBen Skeggs <bskeggs@redhat.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 15 9月, 2014 35 次提交
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
NVIDIA appear to have tweaked the algorithm from GF110, this implements the previous algorithm for them still. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Thanks to Vincent Pelletier for pointing this out and providing a proof of concept patch on the list. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Done after discussion with Roy. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Roy Spliet 提交于
Signed-off-by: NRoy Spliet <rspliet@eclipso.eu> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Roy Spliet 提交于
Signed-off-by: NRoy Spliet <rspliet@eclipso.eu> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Roy Spliet 提交于
Signed-off-by: NRoy Spliet <rspliet@eclipso.eu> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Roy Spliet 提交于
Solves blinking on reclocking memory. The value set is an underestimate, but with non-reduced vblanking this should give us plenty of time Signed-off-by: NRoy Spliet <rspliet@eclipso.eu> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Roy Spliet 提交于
Signed-off-by: NRoy Spliet <rspliet@eclipso.eu> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
More accurate as to the function of the opcodes. Not only is FB disabled, but the host is prevented from touching the GPU. An upcoming patch for Kepler will also halt PFIFO (as NVIDIA does). Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Roy Spliet 提交于
V2: always call post correctly even if pre fails V3: move function prototype to nva3.h Signed-off-by: NRoy Spliet <rspliet@eclipso.eu>
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由 Emil Velikov 提交于
nv92 hardware has only 16 interrupt lines, while nv94 and later has 32. Accessing 0xe0c{0,4} registers on nv92 can lead to incorrect PDISP setup. This is a regression introduced with commit 9d0f5ec9ee0fd5dc5fc1cc2cf559286431e406e3 Author: Ben Skeggs <bskeggs@redhat.com> Date: Mon May 12 15:22:42 2014 +1000 gpio: split g92 class from nv50 Reported-by: estece on #nouveau Cc: stable@vger.kernel.org # 3.16+ Signed-off-by: NEmil Velikov <emil.l.velikov@gmail.com> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
*when* this is done is only a rough approximation of what the binary driver does.. need to investigate more to see if it matters Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Awful, awful. But, on the GK106 I have, some upcoming patches show that this is actually necessary after all. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
All the other chipsets should be moved over to this too. It's not needed yet for the upcoming commits, so left this step as it'll conflict badly with Roy's GT21x reclocking work. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Fixes type/mask calculation being based on uninitialised data for VGA outputs. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
NVIDIA binary driver appears to, not sure if it's for a good reason, but grasping at straws for some GDDR5 reclocking issues here. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Roy Spliet 提交于
V2: Always disable DLL reset Signed-off-by: NRoy Spliet <rspliet@eclipso.eu> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Roy Spliet 提交于
Signed-off-by: NRoy Spliet <rspliet@eclipso.eu> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Roy Spliet 提交于
Signed-off-by: NRoy Spliet <rspliet@eclipso.eu> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Roy Spliet 提交于
Time measured from disabling FB to re-enabling, PPWR_IN reveals status of heads at the end of script. Helps debug various issues (like flicker). Signed-off-by: NRoy Spliet <rspliet@eclipso.eu> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Roy Spliet 提交于
Needs to be done after wait-for-VBLANK, and NVA3 requires register writes in between. Rather than hard-coding register writes, just split out fb_disable and fb_enable. v2. Squashed "fb/ramnve0: disable fb before reclocking" Signed-off-by: NRoy Spliet <rspliet@eclipso.eu> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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