- 12 12月, 2008 1 次提交
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由 Ronen Shitrit 提交于
The 88f6192 and 88f6281 Kirkwood SoCs support two ethernet ports. Add the platform glue that will allow board support files to instantiate the second ethernet port. Signed-off-by: NRonen Shitrit <rshitrit@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 04 12月, 2008 1 次提交
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由 Ronen Shitrit 提交于
The Orion ehci driver serves the Orion, kirkwood and DD Soc families. Since each of those integrate a different USB phy we should have the ability to use few initialization sequences or to leave the boot loader phy settings as is. Signed-off-by: NRonen Shitrit <rshitrit@marvell.com>
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- 20 10月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
This adds DSA switch instantiation hooks to the orion5x and the kirkwood ARM SoC platform code, and instantiates the DSA switch driver on the 88F5181L FXO RD, the 88F5181L GE RD, the 6183 AP GE RD, the Linksys WRT350n v2, and the 88F6281 RD boards. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Tested-by: NNicolas Pitre <nico@marvell.com> Tested-by: NPeter van Valderen <linux@ddcrew.com> Tested-by: NDirk Teurlings <dirk@upexia.nl> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 26 9月, 2008 4 次提交
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由 Ronen Shitrit 提交于
Feroceon L2 cache can work in eighther write through or write back mode on Kirkwood. Add the option to configure this mode according to Kconfig. Signed-off-by: NRonen Shitrit <rshitrit@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Ronen Shitrit 提交于
Add support to the Kirkwood port for newer device models and silicon revisions. Instead of looking at the DEVICE_ID register, the device version is now determined by looking at the PCI-Express device ID and revision registers, as it is done for orion5x, and this information is used to determine the TCLK frequency, again, as it is done for orion5x. Signed-off-by: NRonen Shitrit <rshitrit@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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由 Ronen Shitrit 提交于
Currently, kirkwood uses a hardcoded timer tick rate of 166 MHz, but the actual timer tick rate varies between different members of the SoC family. This patch prepares for runtime determination of the timer tick rate. Signed-off-by: NRonen Shitrit <rshitrit@marvell.com>
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由 Lennert Buytenhek 提交于
Wire up the ethernet port's error interrupt so that the mv643xx_eth driver can sleep for SMI event completion instead of having to busy-wait for it. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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- 09 8月, 2008 3 次提交
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由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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由 Saeed Bishara 提交于
Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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由 Lennert Buytenhek 提交于
This patch performs the equivalent include directory shuffle for plat-orion, and fixes up all users. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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- 07 8月, 2008 1 次提交
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由 Russell King 提交于
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 01 7月, 2008 1 次提交
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由 Saeed Bishara 提交于
This patch allows booting Kirkwood with the L2 in writeback mode, by reading the WT override bit from the L2 config register and passing that into the Feroceon L2 init routine, instead of assuming that the WT override bit will always be set Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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- 23 6月, 2008 1 次提交
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由 Saeed Bishara 提交于
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface, a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS interface, and IDMA/XOR engines, and depending on the model, also features one or two Gigabit Ethernet interfaces, two SATA II interfaces, one or two TWSI interfaces, one or two UARTs, a TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and an SDIO interface. This patch adds supports for the Marvell DB-88F6281-BP Development Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs, enabling support for the PCIe interface, the USB interface, the ethernet interfaces, the SATA interfaces, the TWSI interfaces, the UARTs, and the NAND controller. Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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