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  1. 17 12月, 2009 1 次提交
  3. 13 12月, 2009 3 次提交
    • C
      Add OMAP spi100k driver · 35c9049b
      由 Cory Maccarrone 提交于 
      This change adds the OMAP SPI 100k driver created by
Fabrice Crohas <fcrohas@gmail.com>.  This SPI bus is found on
OMAP7xx-series smartphones, and for many, the touchscreen is
attached to this bus.

The lion's share of the work was done by Fabrice on this driver --
I am merely porting it from the Linwizard project on his behalf.
Signed-off-by: NCory Maccarrone <darkstar6262@gmail.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      35c9049b
    • W
      ARM: NUC900: Add spi driver support for nuc900 · 30eaed05
      由 Wan ZongShun 提交于 
      Signed-off-by: NWan ZongShun <mcuos.com@gmail.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      30eaed05
    • M
      spi: SuperH MSIOF SPI Master driver V2 · 8051effc
      由 Magnus Damm 提交于 
      This patch is V2 of SPI Master support for the SuperH MSIOF.
Full duplex, spi mode 0-3, active high cs, 3-wire and lsb
first should all be supported, but the driver has so far
only been tested with "mmc_spi".

The MSIOF hardware comes with 32-bit FIFOs for receive and
transmit, and this driver simply breaks the SPI messages
into FIFO-sized chunks. The MSIOF hardware manages the pins
for clock, receive and transmit (sck/miso/mosi), but the chip
select pin is managed by software and must be configured as
a regular GPIO pin by the board code.

Performance wise there is still room for improvement, but
on a Ecovec board with the built-in sh7724 MSIOF0 this driver
gets Mini-sd read speeds of about half a megabyte per second.

Future work include better clock setup and merging of 8-bit
transfers into 32-bit words to reduce interrupt load and
improve throughput.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      8051effc
  5. 09 12月, 2009 2 次提交
  7. 05 11月, 2009 1 次提交
  9. 02 10月, 2009 1 次提交
  11. 23 9月, 2009 4 次提交
  13. 20 6月, 2009 2 次提交
  15. 11 6月, 2009 1 次提交
  17. 27 1月, 2009 1 次提交
  19. 07 1月, 2009 1 次提交
    • D
      spi_gpio driver · d29389de
      由 David Brownell 提交于 
      Generalize the old at91rm9200 "bootstrap" bitbanging SPI master driver as
"spi_gpio", so it works with arbitrary GPIOs and can be configured through
platform_data.  Such SPI masters support:

 - any number of bus instances (bus_num is the platform_device.id)
 - any number of chipselects (one GPIO per spi_device)
 - all four SPI_MODE values, and SPI_CS_HIGH
 - i/o word sizes from 1 to 32 bits;
 - devices configured as with any other spi_master controller

When configured using platform_data, this provides relatively low clock
rates.  On platforms that support inlined GPIO calls, significantly
improved transfer speeds are also possible with a semi-custom driver.
(It's still painful when accessing flash memory, but less so.)

Sanity checked by using this version to replace both native controllers on
a board with six different SPI slaves, relying on three different
SPI_MODE_* values and both SPI_CS_HIGH settings for correct operation.

[akpm@linux-foundation.org: cleanups]
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Acked-by: NMagnus Damm <damm@igel.co.jp>
Tested-by: NMagnus Damm <damm@igel.co.jp>
Cc: Torgil Svensson <torgil.svensson@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      d29389de
  21. 06 8月, 2008 1 次提交
  23. 07 2月, 2008 1 次提交
  25. 18 7月, 2007 5 次提交
  27. 11 5月, 2007 1 次提交
  29. 09 5月, 2007 2 次提交
    • J
      au1550 SPI controller driver · 63bd2359
      由 Jan Nikitenko 提交于 
      Here is a driver for the Alchemy au1550 PSC (Programmable Serial
Controller) in SPI master mode.

It supports dma transfers using the Alchemy descriptor based dma controller
for 4-8 bits per word SPI transfers.  For 9-24 bits per word transfers, pio
irq based mode is used to avoid setup of dma channels from scratch on each
number of bits per word change.

Tested with au1550; this may also work on other MIPS Alchemy cpus, like
au1200/au1210/au1250.  Used extensively with SD card connected via SPI;
this handles 8.1MHz SPI clock transfers using dma without any problem (the
highest SPI clock freq possible with au1550 running on 324MHz).

The driver supports sharing of SPI bus by multiple devices.  All features
of Alchemy SPI mode are supported (all SPI modes, msb/lsb first, bits per
word in 4-24 range).

As the SPI clock of the controller depends on main input clock that shall
be configured externally, platform data structure for au1550 SPI controller
driver contains mainclk_hz attribute to define the input clock rate.  From
this value, dividers of the controller for SPI clock are set up for
required frequency.
Signed-off-by: NJan Nikitenko <jan.nikitenko@gmail.com>

Whitespace and section fixups.  Remove partial workaround for platform
setup bug in dma_mask setup; it couldn't work with multiple controllers.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      63bd2359
    • A
      /dev/spidevB.C interface · 814a8d50
      由 Andrea Paterniani 提交于 
      Add a filesystem API for <linux/spi/spi.h> stack.  The initial version of
this interface is purely synchronous.

dbrownell@users.sourceforge.net:

 Cleaned up, bugfixed; much simplified; added preliminary documentation.

 Works with mdev given CONFIG_SYSFS_DEPRECATED; and presumably udev.

 Updated SPI_IOC_MESSAGE ioctl to full spi_message semantics, supporting
 groups of one or more transfers (each of which may be full duplex if
 desired).

 This is marked as EXPERIMENTAL with an explicit disclaimer that the API
 (notably the ioctls) is subject to change.
Signed-off-by: NAndrea Paterniani <a.paterniani@swapp-eng.it>
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      814a8d50
  31. 08 5月, 2007 1 次提交
  33. 15 2月, 2007 1 次提交
  35. 13 2月, 2007 3 次提交
  37. 22 5月, 2006 3 次提交
  39. 17 5月, 2006 1 次提交
  41. 14 1月, 2006 3 次提交
    • D
      [PATCH] spi: misc fixes · 7111763d
      由 David Brownell 提交于 
      This collects some small SPI patches that seem to be missing from the MM tree:

  - spi_butterfly kbuild hooks got dropped somehow; this restores them
  - quick fix for a (theoretical?) m25p80_write() oops noted by Andrew
  - quick fix for a potential config-specific oops for mtd_dataflash()
  - minor doc tweaks
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      7111763d
    • D
      [PATCH] spi: add spi_bitbang driver · 9904f22a
      由 David Brownell 提交于 
      This adds a bitbanging spi master, hooking up to board/adapter-specific glue
code which knows how to set and read the signals (gpios etc).

This code kicks in after the glue code creates a platform_device with the
right platform_data.  That data includes I/O loops, which will usually
come from expanding an inline function (provided in the header).  One goal
is that the I/O loops should be easily optimized down to a few GPIO register
accesses, in common cases, for speed and minimized overhead.

This understands all the currently defined protocol tweaking options in the
SPI framework, and might eventually serve as as reference implementation.

  - different word sizes (1..32 bits)
  - differing clock rates
  - SPI modes differing by CPOL (affecting chip select and I/O loops)
  - SPI modes differing by CPHA (affecting I/O loops)
  - delays (usecs) after transfers
  - temporarily deselecting chips in mid-transfer

A lot of hardware could work with this framework, though common types of
controller can't reach peak performance without switching to a driver
structure that supports pipelining of transfers (e.g.  DMA queues) and maybe
controllers (e.g.  IRQ driven).
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      9904f22a
    • D
      [PATCH] spi: simple SPI framework · 8ae12a0d
      由 David Brownell 提交于 
      This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).

  - It's still less than 2KB of ".text" (ARM).  If there's got to be a
    mid-layer for something so simple, that's the right size budget.  :)

  - The guts use board-specific SPI device tables to build the driver
    model tree.  (Hardware probing is rarely an option.)

  - This version of Kconfig includes no drivers.  At this writing there
    are two known master controller drivers (PXA/SSP, OMAP MicroWire)
    and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
    mentions of other drivers in development.

  - No userspace API.  There are several implementations to compare.
    Implement them like any other driver, and bind them with sysfs.

The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:

  - One bugfix (removes a FIXME), with the visible effect of making device
    names be "spiB.C" where B is the bus number and C is the chipselect.

  - The "caller provides DMA mappings" mechanism now has kerneldoc, for
    DMA drivers that want to be fancy.

  - Hey, the framework init can be subsys_init.  Even though board init
    logic fires earlier, at arch_init ... since the framework init is
    for driver support, and the board init support uses static init.

  - Various additional spec/doc clarifications based on discussions
    with other folk.  It adds a brief "thank you" at the end, for folk
    who've helped nudge this framework into existence.

As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.

From: Mark Underwood <basicmark@yahoo.com>

  Update the SPI framework to remove a potential priority inversion case by
  reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      8ae12a0d