1. 18 7月, 2007 1 次提交
  2. 17 7月, 2007 1 次提交
  3. 17 6月, 2007 1 次提交
  4. 09 5月, 2007 1 次提交
  5. 26 9月, 2006 1 次提交
    • D
      [PATCH] Standardize pxx_page macros · 46a82b2d
      Dave McCracken 提交于
      One of the changes necessary for shared page tables is to standardize the
      pxx_page macros.  pte_page and pmd_page have always returned the struct
      page associated with their entry, while pte_page_kernel and pmd_page_kernel
      have returned the kernel virtual address.  pud_page and pgd_page, on the
      other hand, return the kernel virtual address.
      
      Shared page tables needs pud_page and pgd_page to return the actual page
      structures.  There are very few actual users of these functions, so it is
      simple to standardize their usage.
      
      Since this is basic cleanup, I am submitting these changes as a standalone
      patch.  Per Hugh Dickins' comments about it, I am also changing the
      pxx_page_kernel macros to pxx_page_vaddr to clarify their meaning.
      Signed-off-by: NDave McCracken <dmccr@us.ibm.com>
      Cc: Hugh Dickins <hugh@veritas.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      46a82b2d
  6. 11 6月, 2006 1 次提交
  7. 26 4月, 2006 1 次提交
  8. 29 3月, 2006 1 次提交
  9. 20 1月, 2006 1 次提交
  10. 07 11月, 2005 1 次提交
  11. 29 10月, 2005 1 次提交
    • R
      [PATCH] ppc: make phys_mem_access_prot() work with pfns instead of addresses · 8b150478
      Roland Dreier 提交于
      Change the phys_mem_access_prot() function to take a pfn instead of an
      address.  This allows mmap64() to work on /dev/mem for addresses above 4G
      on 32-bit architectures.  We start with a pfn in mmap_mem(), so there's no
      need to convert to an address; in fact, it's actively bad, since the
      conversion can overflow when the address is above 4G.
      
      Similarly fix the ppc32 page_is_ram() function to avoid a conversion to an
      address by directly comparing to max_pfn.  Working with max_pfn instead of
      high_memory fixes page_is_ram() to give the right answer for highmem pages.
      Signed-off-by: NRoland Dreier <rolandd@cisco.com>
      Cc: Anton Blanchard <anton@samba.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      8b150478
  12. 13 9月, 2005 1 次提交
  13. 07 8月, 2005 1 次提交
  14. 06 8月, 2005 1 次提交
  15. 22 6月, 2005 1 次提交
  16. 20 4月, 2005 1 次提交
  17. 17 4月, 2005 4 次提交
    • K
      [PATCH] ppc32: Support 36-bit physical addressing on e500 · f50b153b
      Kumar Gala 提交于
      To add support for 36-bit physical addressing on e500 the following changes
      have been made.  The changes are generalized to support any physical address
      size larger than 32-bits:
      
      * Allow FSL Book-E parts to use a 64-bit PTE, it is 44-bits of pfn, 20-bits
        of flags.
      
      * Introduced new CPU feature (CPU_FTR_BIG_PHYS) to allow runtime handling of
        updating hardware register (SPRN_MAS7) which holds the upper 32-bits of
        physical address that will be written into the TLB.  This is useful since
        not all e500 cores support 36-bit physical addressing.
      
      * Currently have a pass through implementation of fixup_bigphys_addr
      
      * Moved _PAGE_DIRTY in the 64-bit PTE case to free room for three additional
        storage attributes that may exist in future FSL Book-E cores and updated
        fault handler to copy these bits into the hardware TLBs.
      Signed-off-by: NKumar Gala <kumar.gala@freescale.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      f50b153b
    • K
      [PATCH] ppc32: Allow adjust of pfn offset in pte · b464fce5
      Kumar Gala 提交于
      Allow the pfn to be offset by more than just PAGE_SHIFT in the pte.  Today,
      PAGE_SHIFT tends to allow us to have 12-bits of flags in the pte.  In the
      future if we have a larger pte we can allocate more bits for flags by
      offsetting the pfn even further.
      Signed-off-by: NKumar Gala <kumar.gala@freescale.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      b464fce5
    • K
      [PATCH] ppc32: Fix pte_update for 64-bit PTEs · 7a1e3350
      Kumar Gala 提交于
      While the existing pte_update code handled atomically modifying a 64-bit PTE,
      it did not return all 64-bits of the PTE before it was modified.  This causes
      problems in some places that expect the full PTE to be returned, like
      ptep_get_and_clear().
      
      Created a new pte_update function that is conditional on CONFIG_PTE_64BIT.  It
      atomically reads the low PTE word which all PTE flags are required to be in
      and returns a premodified full 64-bit PTE.
      
      Since we now have an explicit 64-bit PTE version of pte_update we can also
      remove the hack that existed to get the low PTE word regardless of size.
      Signed-off-by: NKumar Gala <kumar.gala@freescale.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      7a1e3350
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4