1. 09 11月, 2013 3 次提交
  2. 07 11月, 2013 1 次提交
  3. 25 10月, 2013 2 次提交
  4. 14 10月, 2013 1 次提交
    • Y
      ARM: exynos: dts: Update 5250 arch timer node with clock frequency · 4d594dd3
      Yuvaraj Kumar C D 提交于
      Without the "clock-frequency" property in arch timer node, could able
      to see the below crash dump.
      
      [<c0014e28>] (unwind_backtrace+0x0/0xf4) from [<c0011808>] (show_stack+0x10/0x14)
      [<c0011808>] (show_stack+0x10/0x14) from [<c036ac1c>] (dump_stack+0x7c/0xb0)
      [<c036ac1c>] (dump_stack+0x7c/0xb0) from [<c01ab760>] (Ldiv0_64+0x8/0x18)
      [<c01ab760>] (Ldiv0_64+0x8/0x18) from [<c0062f60>] (clockevents_config.part.2+0x1c/0x74)
      [<c0062f60>] (clockevents_config.part.2+0x1c/0x74) from [<c0062fd8>] (clockevents_config_and_register+0x20/0x2c)
      [<c0062fd8>] (clockevents_config_and_register+0x20/0x2c) from [<c02b8e8c>] (arch_timer_setup+0xa8/0x134)
      [<c02b8e8c>] (arch_timer_setup+0xa8/0x134) from [<c04b47b4>] (arch_timer_init+0x1f4/0x24c)
      [<c04b47b4>] (arch_timer_init+0x1f4/0x24c) from [<c04b40d8>] (clocksource_of_init+0x34/0x58)
      [<c04b40d8>] (clocksource_of_init+0x34/0x58) from [<c049ed8c>] (time_init+0x20/0x2c)
      [<c049ed8c>] (time_init+0x20/0x2c) from [<c049b95c>] (start_kernel+0x1e0/0x39c)
      
      THis is because the Exynos u-boot, for example on the Chromebooks, doesn't set
      up the CNTFRQ register as expected by arch_timer. Instead, we have to specify
      the frequency in the device tree like this.
      Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
      [olof: Changed subject, added comment, elaborated on commit message]
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      4d594dd3
  5. 13 10月, 2013 7 次提交
  6. 12 10月, 2013 1 次提交
    • V
      ARC: Ignore ptrace SETREGSET request for synthetic register "stop_pc" · 5b242828
      Vineet Gupta 提交于
      ARCompact TRAP_S insn used for breakpoints, commits before exception is
      taken (updating architectural PC). So ptregs->ret contains next-PC and
      not the breakpoint PC itself. This is different from other restartable
      exceptions such as TLB Miss where ptregs->ret has exact faulting PC.
      gdb needs to know exact-PC hence ARC ptrace GETREGSET provides for
      @stop_pc which returns ptregs->ret vs. EFA depending on the
      situation.
      
      However, writing stop_pc (SETREGSET request), which updates ptregs->ret
      doesn't makes sense stop_pc doesn't always correspond to that reg as
      described above.
      
      This was not an issue so far since user_regs->ret / user_regs->stop_pc
      had same value and both writing to ptregs->ret was OK, needless, but NOT
      broken, hence not observed.
      
      With gdb "jump", they diverge, and user_regs->ret updating ptregs is
      overwritten immediately with stop_pc, which this patch fixes.
      Reported-by: NAnton Kolesov <akolesov@synopsys.com>
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      5b242828
  7. 11 10月, 2013 1 次提交
  8. 10 10月, 2013 5 次提交
    • S
      swiotlb-xen: use xen_alloc/free_coherent_pages · 1b65c4e5
      Stefano Stabellini 提交于
      Use xen_alloc_coherent_pages and xen_free_coherent_pages to allocate or
      free coherent pages.
      
      We need to be careful handling the pointer returned by
      xen_alloc_coherent_pages, because on ARM the pointer is not equal to
      phys_to_virt(*dma_handle). In fact virt_to_phys only works for kernel
      direct mapped RAM memory.
      In ARM case the pointer could be an ioremap address, therefore passing
      it to virt_to_phys would give you another physical address that doesn't
      correspond to it.
      
      Make xen_create_contiguous_region take a phys_addr_t as start parameter to
      avoid the virt_to_phys calls which would be incorrect.
      
      Changes in v6:
      - remove extra spaces.
      Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
      Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      1b65c4e5
    • B
      kvm: ppc: booke: check range page invalidation progress on page setup · 40fde70d
      Bharat Bhushan 提交于
      When the MM code is invalidating a range of pages, it calls the KVM
      kvm_mmu_notifier_invalidate_range_start() notifier function, which calls
      kvm_unmap_hva_range(), which arranges to flush all the TLBs for guest pages.
      However, the Linux PTEs for the range being flushed are still valid at
      that point.  We are not supposed to establish any new references to pages
      in the range until the ...range_end() notifier gets called.
      The PPC-specific KVM code doesn't get any explicit notification of that;
      instead, we are supposed to use mmu_notifier_retry() to test whether we
      are or have been inside a range flush notifier pair while we have been
      referencing a page.
      
      This patch calls the mmu_notifier_retry() while mapping the guest
      page to ensure we are not referencing a page when in range invalidation.
      
      This call is inside a region locked with kvm->mmu_lock, which is the
      same lock that is called by the KVM MMU notifier functions, thus
      ensuring that no new notification can proceed while we are in the
      locked region.
      Signed-off-by: NBharat Bhushan <bharat.bhushan@freescale.com>
      Acked-by: NAlexander Graf <agraf@suse.de>
      [Backported to 3.12 - Paolo]
      Reviewed-by: NBharat Bhushan <bharat.bhushan@freescale.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      40fde70d
    • P
      KVM: PPC: Book3S HV: Fix typo in saving DSCR · cfc86025
      Paul Mackerras 提交于
      This fixes a typo in the code that saves the guest DSCR (Data Stream
      Control Register) into the kvm_vcpu_arch struct on guest exit.  The
      effect of the typo was that the DSCR value was saved in the wrong place,
      so changes to the DSCR by the guest didn't persist across guest exit
      and entry, and some host kernel memory got corrupted.
      
      Cc: stable@vger.kernel.org [v3.1+]
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Acked-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      cfc86025
    • G
      KVM: nVMX: fix shadow on EPT · d0d538b9
      Gleb Natapov 提交于
      72f85795 broke shadow on EPT. This patch reverts it and fixes PAE
      on nEPT (which reverted commit fixed) in other way.
      
      Shadow on EPT is now broken because while L1 builds shadow page table
      for L2 (which is PAE while L2 is in real mode) it never loads L2's
      GUEST_PDPTR[0-3].  They do not need to be loaded because without nested
      virtualization HW does this during guest entry if EPT is disabled,
      but in our case L0 emulates L2's vmentry while EPT is enables, so we
      cannot rely on vmcs12->guest_pdptr[0-3] to contain up-to-date values
      and need to re-read PDPTEs from L2 memory. This is what kvm_set_cr3()
      is doing, but by clearing cache bits during L2 vmentry we drop values
      that kvm_set_cr3() read from memory.
      
      So why the same code does not work for PAE on nEPT? kvm_set_cr3()
      reads pdptes into vcpu->arch.walk_mmu->pdptrs[]. walk_mmu points to
      vcpu->arch.nested_mmu while nested guest is running, but ept_load_pdptrs()
      uses vcpu->arch.mmu which contain incorrect values. Fix that by using
      walk_mmu in ept_(load|save)_pdptrs.
      Signed-off-by: NGleb Natapov <gleb@redhat.com>
      Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com>
      Tested-by: NPaolo Bonzini <pbonzini@redhat.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      d0d538b9
    • S
      xen: introduce xen_alloc/free_coherent_pages · d6fe76c5
      Stefano Stabellini 提交于
      xen_swiotlb_alloc_coherent needs to allocate a coherent buffer for cpu
      and devices. On native x86 is sufficient to call __get_free_pages in
      order to get a coherent buffer, while on ARM (and potentially ARM64) we
      need to call the native dma_ops->alloc implementation.
      
      Introduce xen_alloc_coherent_pages to abstract the arch specific buffer
      allocation.
      
      Similarly introduce xen_free_coherent_pages to free a coherent buffer:
      on x86 is simply a call to free_pages while on ARM and ARM64 is
      arm_dma_ops.free.
      Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
      
      
      Changes in v7:
      - rename __get_dma_ops to __generic_dma_ops;
      - call __generic_dma_ops(hwdev)->alloc/free on arm64 too.
      
      Changes in v6:
      - call __get_dma_ops to get the native dma_ops pointer on arm.
      d6fe76c5
  9. 19 10月, 2013 2 次提交
  10. 10 10月, 2013 4 次提交
    • S
      swiotlb-xen: introduce xen_swiotlb_set_dma_mask · eb1ddc00
      Stefano Stabellini 提交于
      Implement xen_swiotlb_set_dma_mask, use it for set_dma_mask on arm.
      Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
      eb1ddc00
    • S
      xen/arm,arm64: enable SWIOTLB_XEN · 83862ccf
      Stefano Stabellini 提交于
      Xen on arm and arm64 needs SWIOTLB_XEN: when running on Xen we need to
      program the hardware with mfns rather than pfns for dma addresses.
      Remove SWIOTLB_XEN dependency on X86 and PCI and make XEN select
      SWIOTLB_XEN on arm and arm64.
      
      At the moment always rely on swiotlb-xen, but when Xen starts supporting
      hardware IOMMUs we'll be able to avoid it conditionally on the presence
      of an IOMMU on the platform.
      
      Implement xen_create_contiguous_region on arm and arm64: for the moment
      we assume that dom0 has been mapped 1:1 (physical addresses == machine
      addresses) therefore we don't need to call XENMEM_exchange. Simply
      return the physical address as dma address.
      
      Initialize the xen-swiotlb from xen_early_init (before the native
      dma_ops are initialized), set xen_dma_ops to &xen_swiotlb_dma_ops.
      Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
      
      
      Changes in v8:
      - assume dom0 is mapped 1:1, no need to call XENMEM_exchange.
      
      Changes in v7:
      - call __set_phys_to_machine_multi from xen_create_contiguous_region and
      xen_destroy_contiguous_region to update the P2M;
      - don't call XENMEM_unpin, it has been removed;
      - call XENMEM_exchange instead of XENMEM_exchange_and_pin;
      - set nr_exchanged to 0 before calling the hypercall.
      
      Changes in v6:
      - introduce and export xen_dma_ops;
      - call xen_mm_init from as arch_initcall.
      
      Changes in v4:
      - remove redefinition of DMA_ERROR_CODE;
      - update the code to use XENMEM_exchange_and_pin and XENMEM_unpin;
      - add a note about hardware IOMMU in the commit message.
      
      Changes in v3:
      - code style changes;
      - warn on XENMEM_put_dma_buf failures.
      83862ccf
    • S
      xen: make xen_create_contiguous_region return the dma address · 69908907
      Stefano Stabellini 提交于
      Modify xen_create_contiguous_region to return the dma address of the
      newly contiguous buffer.
      Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
      Acked-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Reviewed-by: NDavid Vrabel <david.vrabel@citrix.com>
      
      
      Changes in v4:
      - use virt_to_machine instead of virt_to_bus.
      69908907
    • S
      xen/x86: allow __set_phys_to_machine for autotranslate guests · 2f558d40
      Stefano Stabellini 提交于
      Allow __set_phys_to_machine to be called for autotranslate guests.
      It can be used to keep track of phys_to_machine changes, however we
      don't do anything with the information at the moment.
      Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
      2f558d40
  11. 18 10月, 2013 1 次提交
    • S
      arm/xen,arm64/xen: introduce p2m · 4a19138c
      Stefano Stabellini 提交于
      Introduce physical to machine and machine to physical tracking
      mechanisms based on rbtrees for arm/xen and arm64/xen.
      
      We need it because any guests on ARM are an autotranslate guests,
      therefore a physical address is potentially different from a machine
      address. When programming a device to do DMA, we need to be
      extra-careful to use machine addresses rather than physical addresses to
      program the device. Therefore we need to know the physical to machine
      mappings.
      
      For the moment we assume that dom0 starts with a 1:1 physical to machine
      mapping, in other words physical addresses correspond to machine
      addresses. However when mapping a foreign grant reference, obviously the
      1:1 model doesn't work anymore. So at the very least we need to be able
      to track grant mappings.
      
      We need locking to protect accesses to the two trees.
      Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
      
      Changes in v8:
      - move pfn_to_mfn and mfn_to_pfn to page.h as static inline functions;
      - no need to walk the tree if phys_to_mach.rb_node is NULL;
      - correctly handle multipage p2m entries;
      - substitute the spin_lock with a rwlock.
      4a19138c
  12. 15 10月, 2013 2 次提交
  13. 09 10月, 2013 4 次提交
    • P
      ARM: OMAP2: RX-51: Add missing max_current to rx51_lp5523_led_config · d1f1ca36
      Pali Rohár 提交于
      File drivers/leds/leds-lp55xx-common.c refuse to change led_current sysfs
      attribute if value is higher than max_current specified in board file. By default
      global C variables are zero, so changing always failed. This patch adding missing
      max_current and setting it to max safe value 100 (10 mA).
      
      It is unclear which commit exactly caused this regression as the lp5523
      driver was broken and was hiding the platform data breakage. Now
      the driver is fixed so this should be fixed as well.
      Signed-off-by: NPali Rohár <pali.rohar@gmail.com>
      Signed-off-by: NJoerg Reisenweber <joerg@openmoko.org>
      [tony@atomide.com: updated comments to describe regression]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      d1f1ca36
    • S
      ARM: mach-omap2: board-generic: fix undefined symbol · 0b8214fe
      Simon Barth 提交于
      Since dra7 reuses the  function 'omap5_realtime_timer_init' in
      arch/arm/mach-omap2/board-generic.c as timer init function, it has to be
      built for this SoC as well.
      Signed-off-by: NSimon Barth <Simon.Pe.Barth@gmail.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      0b8214fe
    • T
      ARM: dts: Fix pinctrl mask for omap3 · d623a0e1
      Tony Lindgren 提交于
      The wake-up interrupt bit is available on omap3/4/5 processors
      unlike what we claim. Without fixing it we cannot use it on
      omap3 and the system configured for wake-up events will just
      hang on wake-up.
      
      Cc: Grygorii Strashko <grygorii.strashko@ti.com>
      Cc: Benoît Cousson <bcousson@baylibre.com>
      Cc: devicetree@vger.kernel.org
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      d623a0e1
    • N
      ARM: OMAP3: Fix hardware detection for omap3630 when booted with device tree · 016c12d2
      Nishanth Menon 提交于
      SoC family definitions at the moment are reactive to board needs
      as a result, beagle-xm would matchup with ti,omap3 which invokes
      omap3430_init_early instead of omap3630_init_early. Obviously, this is
      the wrong behavior.
      
      With clock node dts conversion, we get the following warnings before
      system hangs as a result and 3630 based platforms fails to boot
      (uart4 clocks are only present in OMAP3630 and not present in
      OMAP3430):
      
      ...
      omap_hwmod: uart4: cannot clk_get main_clk uart4_fck
      omap_hwmod: uart4: cannot _init_clocks
      
      WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2434
      _init+0x6c/0x80()
      omap_hwmod: uart4: couldn't init clocks
      ...
      
      WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2126
      _enable+0x254/0x280()
      omap_hwmod: timer12: enabled state can only be entered from
      initialized, idle, or disabled state
      ...
      
      WARNING: CPU: 0 PID: 46 at arch/arm/mach-omap2/omap_hwmod.c:2224
      _idle+0xd4/0xf8()
      omap_hwmod: timer12: idle state can only be entered from enabled state
      
      WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2126
      _enable+0x254/0x280()
      omap_hwmod: uart4: enabled state can only be entered from
      initialized, idle, or disabled state
      
      So, add specific compatiblity for 3630 to allow match for Beagle-XM
      platform.
      Signed-off-by: NNishanth Menon <nm@ti.com>
      [tony@atomide.com: left out ti,omap343x, updated comments]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      016c12d2
  14. 08 10月, 2013 1 次提交
  15. 07 10月, 2013 1 次提交
    • J
      MIPS: stack protector: Fix per-task canary switch · 8b3c569a
      James Hogan 提交于
      Commit 1400eb65 (MIPS: r4k,octeon,r2300: stack protector: change canary
      per task) was merged in v3.11 and introduced assembly in the MIPS resume
      functions to update the value of the current canary in
      __stack_chk_guard. However it used PTR_L resulting in a load of the
      canary value, instead of PTR_LA to construct its address. The value is
      intended to be random but is then treated as an address in the
      subsequent LONG_S (store).
      
      This was observed to cause a fault and panic:
      
      CPU 0 Unable to handle kernel paging request at virtual address 139fea20, epc == 8000cc0c, ra == 8034f2a4
      Oops[#1]:
      ...
      $24   : 139fea20 1e1f7cb6
      ...
      Call Trace:
      [<8000cc0c>] resume+0xac/0x118
      [<8034f2a4>] __schedule+0x5f8/0x78c
      [<8034f4e0>] schedule_preempt_disabled+0x20/0x2c
      [<80348eec>] rest_init+0x74/0x84
      [<804dc990>] start_kernel+0x43c/0x454
      Code: 3c18804b  8f184030  8cb901f8 <af190000> 00c0e021  8cb002f0 8cb102f4  8cb202f8  8cb302fc
      
      This can also be forced by modifying
      arch/mips/include/asm/stackprotector.h so that the default
      __stack_chk_guard value is more likely to be a bad (or unaligned)
      pointer.
      
      Fix it to use PTR_LA instead, to load the address of the canary value,
      which the LONG_S can then use to write into it.
      
      Reported-by: bobjones (via #mipslinux on IRC)
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Gregory Fong <gregory.0xf0@gmail.com>
      Cc: linux-mips@linux-mips.org
      Cc: stable@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/6026/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      8b3c569a
  16. 06 10月, 2013 1 次提交
  17. 05 10月, 2013 2 次提交
  18. 04 10月, 2013 1 次提交