- 27 9月, 2018 1 次提交
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由 Alexandre Belloni 提交于
The smatch utility reports a possible leak: smatch warnings: drivers/clocksource/timer-atmel-pit.c:183 at91sam926x_pit_dt_init() warn: possible memory leak of 'data' Ensure data is freed before exiting with an error. Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NAlexandre Belloni <alexandre.belloni@bootlin.com> Cc: stable@vger.kernel.org Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 24 9月, 2018 1 次提交
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由 Tao Ren 提交于
Currently, the aspeed MATCH1 register is updated to <current_count - cycles> in set_next_event handler, with the assumption that COUNT register value is preserved when the timer is disabled and it continues decrementing after the timer is enabled. But the assumption is wrong: RELOAD register is loaded into COUNT register when the aspeed timer is enabled, which means the next event may be delayed because timer interrupt won't be generated until <0xFFFFFFFF - current_count + cycles>. The problem can be fixed by updating RELOAD register to <cycles>, and COUNT register will be re-loaded when the timer is enabled and interrupt is generated when COUNT register overflows. The test result on Facebook Backpack-CMM BMC hardware (AST2500) shows the issue is fixed: without the patch, usleep(100) suspends the process for several milliseconds (and sometimes even over 40 milliseconds); after applying the fix, usleep(100) takes averagely 240 microseconds to return under the same workload level. Signed-off-by: NTao Ren <taoren@fb.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Tested-by: NLei YU <mine260309@gmail.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 13 9月, 2018 1 次提交
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由 Keerthy 提交于
The 32k clocksource is NONSTOP for non-am43 SoCs. Hence add the flag for all the other SoCs. Reported-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NKeerthy <j-keerthy@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 13 8月, 2018 1 次提交
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由 Palmer Dabbelt 提交于
The RISC-V ISA defines a per-hart real-time clock and timer, which is present on all systems. The clock is accessed via the 'rdtime' pseudo-instruction (which reads a CSR), and the timer is set via an SBI call. Contains various improvements from Atish Patra <atish.patra@wdc.com>. Signed-off-by: NDmitriy Cherkasov <dmitriy@oss-tech.org> Signed-off-by: NPalmer Dabbelt <palmer@dabbelt.com> [hch: remove dead code, add SPDX tags, used riscv_of_processor_hart(), minor cleanups, merged hotplug cpu support and other improvements from Atish] Signed-off-by: NChristoph Hellwig <hch@lst.de> Acked-by: NThomas Gleixner <tglx@linutronix.de> Reviewed-by: NAtish Patra <atish.patra@wdc.com> Signed-off-by: NPalmer Dabbelt <palmer@sifive.com>
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- 02 8月, 2018 2 次提交
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由 Thomas Gleixner 提交于
Using cpu_all_mask as target mask for clockevents is wrong as it never can actually target not possible CPUs. Use cpu_possible_mask instead Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
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由 Keerthy 提交于
Since commit 39232ed5 ("time: Introduce one suspend clocksource to compensate the suspend time") suspend/resume fails on AM437x platforms as the clocksource actually stops in suspend. Hence remove the CLOCK_SOURCE_SUSPEND_NONSTOP flag. Suggested-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: <daniel.lezcano@linaro.org> Cc: <linux-omap@vger.kernel.org> Cc: <baolin.wang@linaro.org> Cc: <d-gerlach@ti.com> Cc: <tony@atomide.com> Cc: <t-kristo@ti.com> Link: https://lkml.kernel.org/r/1533191716-20476-1-git-send-email-j-keerthy@ti.com
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- 26 7月, 2018 6 次提交
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由 Baolin Wang 提交于
Since the clocksource framework has introduced one suspend clocksource to compensate the suspend time, this patch registers one always-on timer as the suspend clocksource. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Stanley Chu 提交于
This patch adds a new "System Timer" on the Mediatek SoCs. The System Timer is introduced as an always-on timer being clockevent device for tick-broadcasting. For clock, it is driven by 13 MHz system clock. The implementation uses the system clock with no clock source divider. For interrupt, the clock event timer can be used by all cores. Signed-off-by: NStanley Chu <stanley.chu@mediatek.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Stanley Chu 提交于
Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: NStanley Chu <stanley.chu@mediatek.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Stanley Chu 提交于
Use specific prefix to specify the name of supported timer hardware: "General Purpose Timer (GPT)". Signed-off-by: NStanley Chu <stanley.chu@mediatek.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Stanley Chu 提交于
Rename mtk_timer to timer-mediatek to apply new naming convention in clocksource folder. Signed-off-by: NStanley Chu <stanley.chu@mediatek.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Sudeep Holla 提交于
Currently, quite a few clockevent devices have cpumask set to cpu_all_mask which should be fine. However, cpu_possible_mask is more accurate and if there are any other clockevent devices in the system which have cpumask set to cpu_possible_mask, then having cpu_all_mask may result in issues (mostly boot hang with forever loops in clockevents_notify_released). So, lets replace all the clockevent device cpu_all_mask to cpu_possible_mask in order to prevent above mentioned possible issue. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 20 7月, 2018 1 次提交
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由 Pavel Tatashin 提交于
read_boot_clock64() is deleted, and replaced with read_persistent_wall_and_boot_offset(). The default implementation of read_persistent_wall_and_boot_offset() provides a better fallback than the current stubs for read_boot_clock64() that arm has with no users, so remove the old code. Signed-off-by: NPavel Tatashin <pasha.tatashin@oracle.com> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: steven.sistare@oracle.com Cc: daniel.m.jordan@oracle.com Cc: linux@armlinux.org.uk Cc: schwidefsky@de.ibm.com Cc: heiko.carstens@de.ibm.com Cc: john.stultz@linaro.org Cc: sboyd@codeaurora.org Cc: hpa@zytor.com Cc: douly.fnst@cn.fujitsu.com Cc: peterz@infradead.org Cc: prarit@redhat.com Cc: feng.tang@intel.com Cc: pmladek@suse.com Cc: gnomes@lxorguk.ukuu.org.uk Cc: linux-s390@vger.kernel.org Cc: boris.ostrovsky@oracle.com Cc: jgross@suse.com Cc: pbonzini@redhat.com Link: https://lkml.kernel.org/r/20180719205545.16512-19-pasha.tatashin@oracle.com
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- 11 7月, 2018 1 次提交
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由 Sudeep Holla 提交于
Currently, arch_mem_timer cpumask is set to cpu_all_mask which should be fine. However, cpu_possible_mask is more accurate and if there are other clockevent source in the system which are set to cpu_possible_mask, then having cpu_all_mask may result in issue. E.g. on a platform with arm,sp804 timer with rating 300 and cpu_possible_mask and this arch_mem_timer timer with rating 400 and cpu_all_mask, tick_check_preferred may choose both preferred as the cpumasks are not equal though they must be. This issue was root caused incorrectly initially and a fix was merged as commit 1332a905 ("tick: Prefer a lower rating device only if it's CPU local device"). Signed-off-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Tested-by: NKevin Hilman <khilman@baylibre.com> Tested-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Link: https://lkml.kernel.org/r/1531151136-18297-2-git-send-email-sudeep.holla@arm.com
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- 13 6月, 2018 2 次提交
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由 Kees Cook 提交于
The kzalloc() function has a 2-factor argument form, kcalloc(). This patch replaces cases of: kzalloc(a * b, gfp) with: kcalloc(a * b, gfp) as well as handling cases of: kzalloc(a * b * c, gfp) with: kzalloc(array3_size(a, b, c), gfp) as it's slightly less ugly than: kzalloc_array(array_size(a, b), c, gfp) This does, however, attempt to ignore constant size factors like: kzalloc(4 * 1024, gfp) though any constants defined via macros get caught up in the conversion. Any factors with a sizeof() of "unsigned char", "char", and "u8" were dropped, since they're redundant. The Coccinelle script used for this was: // Fix redundant parens around sizeof(). @@ type TYPE; expression THING, E; @@ ( kzalloc( - (sizeof(TYPE)) * E + sizeof(TYPE) * E , ...) | kzalloc( - (sizeof(THING)) * E + sizeof(THING) * E , ...) ) // Drop single-byte sizes and redundant parens. @@ expression COUNT; typedef u8; typedef __u8; @@ ( kzalloc( - sizeof(u8) * (COUNT) + COUNT , ...) | kzalloc( - sizeof(__u8) * (COUNT) + COUNT , ...) | kzalloc( - sizeof(char) * (COUNT) + COUNT , ...) | kzalloc( - sizeof(unsigned char) * (COUNT) + COUNT , ...) | kzalloc( - sizeof(u8) * COUNT + COUNT , ...) | kzalloc( - sizeof(__u8) * COUNT + COUNT , ...) | kzalloc( - sizeof(char) * COUNT + COUNT , ...) | kzalloc( - sizeof(unsigned char) * COUNT + COUNT , ...) ) // 2-factor product with sizeof(type/expression) and identifier or constant. @@ type TYPE; expression THING; identifier COUNT_ID; constant COUNT_CONST; @@ ( - kzalloc + kcalloc ( - sizeof(TYPE) * (COUNT_ID) + COUNT_ID, sizeof(TYPE) , ...) | - kzalloc + kcalloc ( - sizeof(TYPE) * COUNT_ID + COUNT_ID, sizeof(TYPE) , ...) | - kzalloc + kcalloc ( - sizeof(TYPE) * (COUNT_CONST) + COUNT_CONST, sizeof(TYPE) , ...) | - kzalloc + kcalloc ( - sizeof(TYPE) * COUNT_CONST + COUNT_CONST, sizeof(TYPE) , ...) | - kzalloc + kcalloc ( - sizeof(THING) * (COUNT_ID) + COUNT_ID, sizeof(THING) , ...) | - kzalloc + kcalloc ( - sizeof(THING) * COUNT_ID + COUNT_ID, sizeof(THING) , ...) | - kzalloc + kcalloc ( - sizeof(THING) * (COUNT_CONST) + COUNT_CONST, sizeof(THING) , ...) | - kzalloc + kcalloc ( - sizeof(THING) * COUNT_CONST + COUNT_CONST, sizeof(THING) , ...) ) // 2-factor product, only identifiers. @@ identifier SIZE, COUNT; @@ - kzalloc + kcalloc ( - SIZE * COUNT + COUNT, SIZE , ...) // 3-factor product with 1 sizeof(type) or sizeof(expression), with // redundant parens removed. @@ expression THING; identifier STRIDE, COUNT; type TYPE; @@ ( kzalloc( - sizeof(TYPE) * (COUNT) * (STRIDE) + array3_size(COUNT, STRIDE, sizeof(TYPE)) , ...) | kzalloc( - sizeof(TYPE) * (COUNT) * STRIDE + array3_size(COUNT, STRIDE, sizeof(TYPE)) , ...) | kzalloc( - sizeof(TYPE) * COUNT * (STRIDE) + array3_size(COUNT, STRIDE, sizeof(TYPE)) , ...) | kzalloc( - sizeof(TYPE) * COUNT * STRIDE + array3_size(COUNT, STRIDE, sizeof(TYPE)) , ...) | kzalloc( - sizeof(THING) * (COUNT) * (STRIDE) + array3_size(COUNT, STRIDE, sizeof(THING)) , ...) | kzalloc( - sizeof(THING) * (COUNT) * STRIDE + array3_size(COUNT, STRIDE, sizeof(THING)) , ...) | kzalloc( - sizeof(THING) * COUNT * (STRIDE) + array3_size(COUNT, STRIDE, sizeof(THING)) , ...) | kzalloc( - sizeof(THING) * COUNT * STRIDE + array3_size(COUNT, STRIDE, sizeof(THING)) , ...) ) // 3-factor product with 2 sizeof(variable), with redundant parens removed. @@ expression THING1, THING2; identifier COUNT; type TYPE1, TYPE2; @@ ( kzalloc( - sizeof(TYPE1) * sizeof(TYPE2) * COUNT + array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2)) , ...) | kzalloc( - sizeof(TYPE1) * sizeof(THING2) * (COUNT) + array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2)) , ...) | kzalloc( - sizeof(THING1) * sizeof(THING2) * COUNT + array3_size(COUNT, sizeof(THING1), sizeof(THING2)) , ...) | kzalloc( - sizeof(THING1) * sizeof(THING2) * (COUNT) + array3_size(COUNT, sizeof(THING1), sizeof(THING2)) , ...) | kzalloc( - sizeof(TYPE1) * sizeof(THING2) * COUNT + array3_size(COUNT, sizeof(TYPE1), sizeof(THING2)) , ...) | kzalloc( - sizeof(TYPE1) * sizeof(THING2) * (COUNT) + array3_size(COUNT, sizeof(TYPE1), sizeof(THING2)) , ...) ) // 3-factor product, only identifiers, with redundant parens removed. @@ identifier STRIDE, SIZE, COUNT; @@ ( kzalloc( - (COUNT) * STRIDE * SIZE + array3_size(COUNT, STRIDE, SIZE) , ...) | kzalloc( - COUNT * (STRIDE) * SIZE + array3_size(COUNT, STRIDE, SIZE) , ...) | kzalloc( - COUNT * STRIDE * (SIZE) + array3_size(COUNT, STRIDE, SIZE) , ...) | kzalloc( - (COUNT) * (STRIDE) * SIZE + array3_size(COUNT, STRIDE, SIZE) , ...) | kzalloc( - COUNT * (STRIDE) * (SIZE) + array3_size(COUNT, STRIDE, SIZE) , ...) | kzalloc( - (COUNT) * STRIDE * (SIZE) + array3_size(COUNT, STRIDE, SIZE) , ...) | kzalloc( - (COUNT) * (STRIDE) * (SIZE) + array3_size(COUNT, STRIDE, SIZE) , ...) | kzalloc( - COUNT * STRIDE * SIZE + array3_size(COUNT, STRIDE, SIZE) , ...) ) // Any remaining multi-factor products, first at least 3-factor products, // when they're not all constants... @@ expression E1, E2, E3; constant C1, C2, C3; @@ ( kzalloc(C1 * C2 * C3, ...) | kzalloc( - (E1) * E2 * E3 + array3_size(E1, E2, E3) , ...) | kzalloc( - (E1) * (E2) * E3 + array3_size(E1, E2, E3) , ...) | kzalloc( - (E1) * (E2) * (E3) + array3_size(E1, E2, E3) , ...) | kzalloc( - E1 * E2 * E3 + array3_size(E1, E2, E3) , ...) ) // And then all remaining 2 factors products when they're not all constants, // keeping sizeof() as the second factor argument. @@ expression THING, E1, E2; type TYPE; constant C1, C2, C3; @@ ( kzalloc(sizeof(THING) * C2, ...) | kzalloc(sizeof(TYPE) * C2, ...) | kzalloc(C1 * C2 * C3, ...) | kzalloc(C1 * C2, ...) | - kzalloc + kcalloc ( - sizeof(TYPE) * (E2) + E2, sizeof(TYPE) , ...) | - kzalloc + kcalloc ( - sizeof(TYPE) * E2 + E2, sizeof(TYPE) , ...) | - kzalloc + kcalloc ( - sizeof(THING) * (E2) + E2, sizeof(THING) , ...) | - kzalloc + kcalloc ( - sizeof(THING) * E2 + E2, sizeof(THING) , ...) | - kzalloc + kcalloc ( - (E1) * E2 + E1, E2 , ...) | - kzalloc + kcalloc ( - (E1) * (E2) + E1, E2 , ...) | - kzalloc + kcalloc ( - E1 * E2 + E1, E2 , ...) ) Signed-off-by: NKees Cook <keescook@chromium.org>
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由 Julia Lawall 提交于
Return an error code on failure. Problem found using Coccinelle. Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: kernel-janitors@vger.kernel.org Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: linux-arm-kernel@lists.infradead.org Link: https://lkml.kernel.org/r1528640655-18948-3-git-send-email-Julia.Lawall@lip6.fr
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- 23 5月, 2018 4 次提交
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由 Fabio Estevam 提交于
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Fabio Estevam 提交于
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Fabio Estevam 提交于
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Fabio Estevam 提交于
imx gpt timer driver has been moved from arch/arm/mach-imx to drivers/clocksource/ a long time ago, so remove the reference to the old file path. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 19 5月, 2018 3 次提交
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由 Eugeniy Paltsev 提交于
This came to light in some internal discussions and it is nice to have this documented rather than digging up the PRM (Prog Ref Manual) again. Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Acked-by: NVineet Gupta <vgupta@synopsys.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Matt Redfearn 提交于
Several messages from the MIPS GIC driver include the text "GIC", "GIC timer", etc, but the format is not standard. Add a pr_fmt of "mips-gic-timer: " and reword the messages now that they will be prefixed with the driver name. Signed-off-by: NMatt Redfearn <matt.redfearn@mips.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Chunyan Zhang 提交于
SPRD arch doesn't select SPRD_TIMER, so this config would not appear even if ARCH_SPRD is set but COMPILE_TEST not. Fix the dependency of this config with SPRD arch, and set a default value for it, also leave other choices for EXPERT. Signed-off-by: NChunyan Zhang <chunyan.zhang@spreadtrum.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 02 5月, 2018 1 次提交
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 19 4月, 2018 1 次提交
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由 Anson Huang 提交于
The additional brakects added to tpm_set_next_event's return value computation causes (int) forced type conversion NOT taking effect, and the incorrect value return will cause various system timer issue, like RCU stall etc.. Remove the additional brackets to make sure tpm_set_next_event always returns correct value. Fixes: 059ab7b8 ("clocksource/drivers/imx-tpm: Add imx tpm timer support") Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NDong Aisheng <Aisheng.dong@nxp.com> Cc: stable@vger.kernel.org Cc: daniel.lezcano@linaro.org Cc: Linux-imx@nxp.com Link: https://lkml.kernel.org/r/1524117883-2484-1-git-send-email-Anson.Huang@nxp.com
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- 31 3月, 2018 4 次提交
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由 Anson Huang 提交于
Different TPM modules have different width counters which is 16-bit or 32-bit, the counter width can be read from TPM_PARAM register bit[23:16], this patch adds dynamic check for counter width to support both 16-bit and 32-bit TPM modules. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Anson Huang 提交于
According to i.MX7ULP reference manual, TPM_SC_CPWMS can ONLY be written when counter is disabled, TPM_SC_TOF is write-1-clear, TPM_C0SC_CHF is also write-1-clear, correct these registers initialization flow; Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Anson Huang 提交于
The clock name should be ipg instead of igp. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Tomer Maimon 提交于
Add Nuvoton BMC NPCM7xx timer driver. The clocksource Enable 24-bit TIMER0 and TIMER1 counters, while TIMER0 serve as clockevent and TIMER1 serve as clocksource. Signed-off-by: NTomer Maimon <tmaimon77@gmail.com> Reviewed-by: NBrendan Higgins <brendanhiggins@xxxxxxxxxx> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 09 3月, 2018 1 次提交
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由 Masahiro Yamada 提交于
The ATMEL_ST config selects MFD_SYSCON, but does not depend on HAS_IOMEM. Compile testing on architecture without HAS_IOMEM causes "unmet direct dependencies" in Kconfig phase. Detected by "make ARCH=score allyesconfig". Add the proper dependency to the ATMEL_ST config. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1520335233-11277-1-git-send-email-yamada.masahiro@socionext.com
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- 01 3月, 2018 3 次提交
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由 Ladislav Michl 提交于
Invalid value silently disables use of the prescaler. Use -1 explicitely for that purpose and error out on invalid value. Signed-off-by: NLadislav Michl <ladis@linux-mips.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Ladislav Michl 提交于
Reorder omap_dm_timer_set_source internals to get source verification more straightforward. Signed-off-by: NLadislav Michl <ladis@linux-mips.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Ladislav Michl 提交于
As dmtimer no longer exports functions, make those previously exported static (this requires few functions to be moved around as their prototypes were deleted). Signed-off-by: NLadislav Michl <ladis@linux-mips.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 28 2月, 2018 2 次提交
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由 Vineet Gupta 提交于
TIMER0 interrupt ACK is different for ARC700 and HS3x cores. This came to light in some internal discussions and it is nice to have this documented rather than digging up the PRM (Programmers Reference Manual). Signed-off-by: NVineet Gupta <vgupta@synopsys.com> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Vineet Gupta <Vineet.Gupta1@synopsys.com> Cc: linux-snps-arc@lists.infradead.org Link: https://lkml.kernel.org/r/1519241491-12570-1-git-send-email-vgupta@synopsys.com
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由 Felix Fietkau 提交于
__gic_clocksource_init() extracts the GIC_CONFIG_COUNTBITS field from read_gic_config() by right shifting the register value. The shift count is determined by the most significant bit (__fls) of the bitmask which is wrong as it shifts out the complete bitfield. Use the least significant bit (__ffs) instead to shift the bitfield down to bit 0. Fixes: e07127a0 ("clocksource: mips-gic-timer: Use new GIC accessor functions") Signed-off-by: NFelix Fietkau <nbd@nbd.name> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: daniel.lezcano@linaro.org Cc: paul.burton@imgtec.com Link: https://lkml.kernel.org/r/20180228095610.50341-1-nbd@nbd.name
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- 26 2月, 2018 1 次提交
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由 Colin Ian King 提交于
The error checks on freq for a negative error return always fails because freq is unsigned and can never be negative. Fix this by making freq a signed long. Detected with Coccinelle: drivers/clocksource/fsl_ftm_timer.c:287:5-9: WARNING: Unsigned expression compared with zero: freq <= 0 drivers/clocksource/fsl_ftm_timer.c:291:5-9: WARNING: Unsigned expression compared with zero: freq <= 0 Fixes: 2529c3a3 ("clocksource: Add Freescale FlexTimer Module (FTM) timer support") Signed-off-by: NColin Ian King <colin.king@canonical.com> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: kernel-janitors@vger.kernel.org Link: https://lkml.kernel.org/r/20180226113614.3092-1-colin.king@canonical.com
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- 23 2月, 2018 4 次提交
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由 James Hogan 提交于
Now that arch/metag/ has been removed, remove the metag generic per-thread timer driver. It is of no value without the architecture code. Signed-off-by: NJames Hogan <jhogan@kernel.org> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-metag@vger.kernel.org
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由 Ladislav Michl 提交于
In the case of device tree boot the device platform data is usually NULL so hook the platform data obtained from the match. As part of un-constify the platform_data pointer. Signed-off-by: NLadislav Michl <ladis@linux-mips.org> Signed-off-by: NKeerthy <j-keerthy@ti.com> Reviewed-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Keerthy 提交于
Add the timer ops to the platform data Signed-off-by: NKeerthy <j-keerthy@ti.com> Reviewed-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk> Tested-by: NLadislav Michl <ladis@linux-mips.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Keerthy 提交于
Move the dmtimer driver out of plat-omap to clocksource. So that non-omap devices also could use this. No Code changes done to the driver file only renamed to timer-ti-dm.c. Also removed the config dependencies for OMAP_DM_TIMER. Signed-off-by: NKeerthy <j-keerthy@ti.com> Reviewed-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk> Tested-by: NLadislav Michl <ladis@linux-mips.org> [tony@atomide.com: add select omap_dm_timer for omap16xx] Signed-off-by: NTony Lindgren <tony@atomide.com>
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