- 29 11月, 2017 2 次提交
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由 Palmer Dabbelt 提交于
This is another memory model FIXME. Signed-off-by: NPalmer Dabbelt <palmer@sifive.com>
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由 Palmer Dabbelt 提交于
Our atomics are generated from a complicated series of preprocessor macros, each of which is slightly different from the last. When writing the macros I'd accidentally left some unused arguments floating around. This patch removes the unused macro arguments. Signed-off-by: NPalmer Dabbelt <palmer@dabbelt.com>
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- 27 9月, 2017 1 次提交
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由 Palmer Dabbelt 提交于
This contains all the code that directly interfaces with the RISC-V memory model. While this code corforms to the current RISC-V ISA specifications (user 2.2 and priv 1.10), the memory model is somewhat underspecified in those documents. There is a working group that hopes to produce a formal memory model by the end of the year, but my understanding is that the basic definitions we're relying on here won't change significantly. Reviewed-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NPalmer Dabbelt <palmer@dabbelt.com>
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