This adds the PUM bits for USB and SDIO devices
Signed-off-by: NHauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11387/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

When the SoC starts up most of the devices should be deactivated by the
PMU, they should be activated when they get used by their drivers. Some
devices should not get deactivate at startup like the serial, register
them in a special way.
Signed-off-by: NHauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11386/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This adds support for setting the PMU register on the AR10 and GRX390.
Signed-off-by: NHauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11382/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The PMU register are accessed in a non atomic way and they could be
accessed by different threads simultaneously, which could cause
problems this patch adds locking around the PMU registers. In
addition we now also wait till the PMU is actually deactivated.

[ralf@linux-mips.org: Fix spelling mistake in commit message as noticed
by Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>.]
Signed-off-by: NHauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11381/
Patchwork: https://patchwork.linux-mips.org/patch/11396/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This patch fix spelling typo in printk.
Signed-off-by: NMasanari Iida <standby24x7@gmail.com>
Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Acked-by: NRandy Dunlap <rdunlap@infradead.org>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

Panic() is going to add a \n itself and it's annoying if a panic message rolls
of the screen on a device with no scrollback.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Explicitly enable the clock gate of the internal GPHYs found on xrx200.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4816/

The Lantiq DSL SoCs have an internal networking processor. Add code to read
the static clock rate.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4815/

"nodes" is written with a single "s"
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4814/

Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4521

The xrx200 SoC family has the same PCI clock register layout as the AR9.
Enable the same quirk as for AR9
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4235/

Previously we relied on the bootloader to have enabled this bit. However some
bootloaders seem to not enable this for us.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4120/

The XRX200 based SoC have a different register offset for the interface
clock and PCI control registers. This patch detects the SoC and sets the
register offset at runtime. This make PCI work on the VR9 SoC.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4113/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Now that all drivers are converted to OF we are able to remove some remaining
pieces of orphaned code.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3841/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This patch unifies all clock generation and gating code into one file.
All drivers will now be able to request their clocks via their device.
This patch also adds support for the clockout feature, which allows
clock generation on external pins.

Support for COMMON_CLK will be provided in the next series.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3804/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>