- 29 11月, 2016 40 次提交
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由 Ulf Hansson 提交于
According to the JEDEC specification, during bus timing change operations for mmc, sending a CMD13 could trigger CRC errors. As switching to HS DDR mode indeed causes a bus timing change, polling with CMD13 to detect card busy, may thus potentially trigger CRC errors. Currently these errors are treated as the switch to HS DDR mode failed. To improve this behaviour, let's instead tell __mmc_switch() to retry when it encounters CRC errors during polling. Moreover, when switching to HS DDR mode, let's make sure the CMD13 polling is done by having the mmc host and the mmc card, being configured to operate at the same selected bus speed timing. Fix this by providing MMC_TIMING_MMC_DDR52 as the timing parameter to __mmc_switch(). Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
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由 Ulf Hansson 提交于
In cases when the mmc host doesn't support HW busy detection, polling for a card being busy by using CMD13 is beneficial. That is because, instead of waiting a fixed amount of time, 500ms or the generic CMD6 time from EXT_CSD, we find out a lot sooner when the card stops signaling busy. This leads to a significant decreased total initialization time for the mmc card. However, to allow polling with CMD13 during a bus timing change operation, such as switching to HS mode, we first need to update the mmc host's bus timing before starting to poll. Deal with that, simply by providing MMC_TIMING_MMC_HS as the timing parameter to __mmc_switch() from mmc_select_hs(). By telling __mmc_switch() to allow polling with CMD13, also makes it validate the CMD6 status, thus we can remove the corresponding checks. When switching to HS400ES, the mmc_select_hs() function is called in one of the intermediate steps. To still prevent CMD13 polling for HS400ES, let's call the __mmc_switch() function in this path as it enables us to keep using the existing method. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
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由 Ulf Hansson 提交于
In cases when a speed mode change is requested for mmc cards, a CMD6 is sent by calling __mmc_switch() during the card initialization. The CMD6 leads to the card entering a busy period. When that is completed, the host must parse the CMD6 status to find out whether the change of the speed mode succeeded. To enable the mmc core to poll the card by using CMD13 to find out when the busy period is completed, it's reasonable to make sure polling is done by having the mmc host and the mmc card, being configured to operate at the same selected bus speed timing. Therefore, let's extend __mmc_switch() to take yet another parameter, which allow its callers to update the bus speed timing of the mmc host. In this way, __mmc_switch() also becomes capable of reading and validating the CMD6 status by sending a CMD13, in cases when that's desired. If __mmc_switch() encounters a failure, we make sure to restores the old bus speed timing for the mmc host, before propagating the error code. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
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由 Ulf Hansson 提交于
According to the JEDEC specification, the SWITCH_ERROR bit in the device status from a R1 response, is an error bit which may be cleared as soon as the response that reports the error is sent. When polling with CMD13 to find out when the card stops signaling busy after a CMD6 has been sent, we currently parse only the last CMD13 response for the SWITCH_ERROR bit. Consequentially we could loose important information about the card. In worst case if the card stops signaling busy within the allowed timeout, we could end up believing that the CMD6 command completed successfully, when in fact it didn't. To improve the behaviour, let's parse each CMD13 response to see if the SWITCH_ERROR bit is set in the device status. In such case, we abort the polling loop and report the error. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
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由 Ulf Hansson 提交于
The ignore_crc parameter/variable name is used at a couple of places in the mmc core. Let's rename it to retry_crc_err to reflect its new purpose. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
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由 Ulf Hansson 提交于
There are only one users left which calls __mmc_send_status(). Moreover, the ignore_crc parameter isn't being used, so let's just remove these redundant parts. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
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由 Ulf Hansson 提交于
After a CMD6 command has been sent, the __mmc_switch() function might be advised to poll the card for busy by using CMD13 and also by ignoring CRC errors. In the case of ignoring CRC errors, the mmc core tells the mmc host to also ignore these errors via masking the MMC_RSP_CRC response flag. This seems wrong, as it leads to that the mmc host could propagate an unreliable response, instead of a proper error code. What we really want, is not to ignore CRC errors but instead retry the polling attempt. So, let's change this by treating a CRC error as the card is still being busy and thus continue to run the polling loop. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
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由 David E. Box 提交于
With commit f35bbf61 ("gpio / ACPI: Return -EPROBE_DEFER if the gpiochip was not found"), a gpio descriptor request can now be deferred if the providing gpio host controller driver hasn't been loaded yet. Allow use in mmc slot probe in order to prevent card detect gpio setup from failing in this case. Signed-off-by: NDavid E. Box <david.e.box@linux.intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Adrian Hunter 提交于
Add support for eMMC/SD/SDIO Intel GLK host controllers. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ritesh Harjani 提交于
The newer msm sdhci's cores use a different DLL hardware for HS400. Update the configuration and calibration of the newer DLL block. The HS400 DLL block used previously is CDC LP 533 and requires programming multiple registers and waiting for configuration to complete and then enable it. It has about 18 register writes and two register reads. The newer HS400 DLL block is SDC4 DLL and requires two register writes for configuration and one register read to confirm that it is initialized. There is an additional register write to enable the power save mode for SDC4 DLL block. Signed-off-by: NRitesh Harjani <riteshh@codeaurora.org> Signed-off-by: NKrishna Konda <kkonda@codeaurora.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ritesh Harjani 提交于
In HS400 mode a new RCLK is introduced on the interface for read data transfers. The eMMC5.0 device transmits the read data to the host with respect to rising and falling edges of RCLK. In order to ensure correct operation of read data transfers in HS400 mode, the incoming RX data needs to be sampled by delayed version of RCLK. The CDCLP533 delay circuit shifts the RCLK by T/4. It needs to be initialized, configured and enabled once during HS400 mode switch and when operational voltage/clock is changed. Signed-off-by: NVenkat Gopalakrishnan <venkatg@codeaurora.org> Signed-off-by: NRitesh Harjani <riteshh@codeaurora.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ritesh Harjani 提交于
Save the tuning phase once the tuning is performed. This phase value will be used while calibrating DLL for HS400 mode. Signed-off-by: NRitesh Harjani <riteshh@codeaurora.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Venkat Gopalakrishnan 提交于
The following msm platform specific changes are added to support HS400. - Allow tuning for HS400 mode. - Configure HS400 timing mode using the VENDOR_SPECIFIC_FUNC register. Signed-off-by: NVenkat Gopalakrishnan <venkatg@codeaurora.org> Signed-off-by: NRitesh Harjani <riteshh@codeaurora.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ritesh Harjani 提交于
SDHC MSM controller need 2x clock for MCLK at GCC. Hence make required changes to have 2x clock for DDR timing modes. Signed-off-by: NRitesh Harjani <riteshh@codeaurora.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ritesh Harjani 提交于
sdhci-msm controller may have different clk-rates for each bus speed mode. Thus implement set_clock callback for sdhci-msm driver. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NRitesh Harjani <riteshh@codeaurora.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ritesh Harjani 提交于
Factor out sdhci_enable_clk from sdhci_set_clock and make it EXPORT_SYMBOL so that it can be called. Signed-off-by: NRitesh Harjani <riteshh@codeaurora.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ritesh Harjani 提交于
sdhc-msm controller needs this SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN & SDHCI_QUIRK2_PRESET_VALUE_BROKEN to be set. Hence setting it. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NRitesh Harjani <riteshh@codeaurora.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ritesh Harjani 提交于
This add get_min_clock() and get_max_clock() callback for sdhci-msm. sdhci-msm min/max clocks may be different hence implement these callbacks. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NRitesh Harjani <riteshh@codeaurora.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Venkat Gopalakrishnan 提交于
SDCC core with minor version >= 0x42 introduced new 14lpp DLL. This has additional requirements in the reset sequence for DLL tuning. Make necessary changes as needed. Without this patch we see below errors on such SDHC controllers sdhci_msm 7464900.sdhci: mmc0: DLL failed to LOCK mmc0: tuning execution failed: -110 Signed-off-by: NVenkat Gopalakrishnan <venkatg@codeaurora.org> Signed-off-by: NRitesh Harjani <riteshh@codeaurora.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ritesh Harjani 提交于
This patch changes the poor style of writel/readl registers into more readable format. This avoid mixed style format of readl/writel in sdhci-msm driver. This patch also removes the one line comments which were present for above writel/readl, since they were of no help. Signed-off-by: NRitesh Harjani <riteshh@codeaurora.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Jaehoon Chung 提交于
The "clock-freq-min-max" property was deprecated. There is "max-frequency" property in drivers/mmc/core/host.c "max-frequency" can be replaced with "clock-freq-min-max". Minimum clock value might be set to 100K by default. Then MMC core should try to find the correct value from 400K to 100K. So it just needs to set Maximum clock value. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Reviewed-by: NShawn Lin <shawn.lin@rock-chips.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Jaehoon Chung 提交于
Remove the unnecessary mmc_data structure. Instead, cmd->data can be used. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Tested-by: NHeiko Stuebner <heiko@sntech.de> Reviewed-by: NShawn Lin <shawn.lin@rock-chips.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Jaehoon Chung 提交于
This patch removed the meaningless value. Instead, use the cookie's enum values for executing correctly. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Tested-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Jaehoon Chung 提交于
stop_cmdr should be set to values relevant to stop command. It migth be assigned to values whatever there is mrq->stop or not. Then it doesn't need to use dw_mci_prepare_command(). It's enough to use the prep_stop_abort for preparing stop command. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Tested-by: NHeiko Stuebner <heiko@sntech.de> Reviewed-by: NShawn Lin <shawn.lin@rock-chips.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Jaehoon Chung 提交于
If DW_MMC_CARD_NO_USE_HOLD isn't set, it's usesd by default. Enve if SDMMC_CMD_USB_HOLD_REG is set in prepare_command(), but it doesn't set in pre_stop_abort(). To maintain the consistency, add the checking condition for this. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Tested-by: NHeiko Stuebner <heiko@sntech.de> Reviewed-by: NShawn Lin <shawn.lin@rock-chips.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Jaehoon Chung 提交于
If there is no property "clock-freq-min-max", mmc->f_min should be set to 400K by default. But Some SoC can be used 100K. When 100K is used, MMC core will try to check from 400K to 100K. Reported-by: NShawn Lin <shawn.lin@rock-chips.com> Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Tested-by: NHeiko Stuebner <heiko@sntech.de> Reviewed-by: NShawn Lin <shawn.lin@rock-chips.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Jaehoon Chung 提交于
If display the debug message, this message should be spamming. If flags is maintained the previous value, didn't display the debug message. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Tested-by: NHeiko Stuebner <heiko@sntech.de> Reviewed-by: NShawn Lin <shawn.lin@rock-chips.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Jaehoon Chung 提交于
Developer wants to see the real register value, not register offset. This patch fixed to display the real value of register. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Tested-by: NHeiko Stuebner <heiko@sntech.de> Reviewed-by: NShawn Lin <shawn.lin@rock-chips.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Colin Ian King 提交于
Trivial fix to spelling mistake "desciptor" to "descriptor" in dev_dbg message. Signed-off-by: NColin Ian King <colin.king@canonical.com> Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Linus Walleij 提交于
By moving the mmc_packed_init() and mmc_packed_clean() into the only file in the kernel where they are used, we save two exported functions and can staticize those to the block.c file. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Linus Walleij 提交于
The struct mmc_blk_request contains an opaque void *data that is actually only used to store a pointer to a per-request struct mmc_blk_data. This is confusing, so rename the member to blkdata and forward-declare the block.c local struct. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Linus Walleij 提交于
Instead of open coding the check for the same thing that the helper checks: use the helper. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 ahaslam@baylibre.com 提交于
Request card detect and write protect gpios using the provided API by mmc core. If a gpio is provided for card detect, we don't need to poll. So only use polling when a gpio is not provided. Once all pdata users register the gpios using gpio descriptors, we could remove the platform callbacks. Signed-off-by: NAxel Haslam <ahaslam@baylibre.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NDavid Lechner <david@lechnology.com>
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由 ahaslam@baylibre.com 提交于
Card detect and write protect are currently not working on a DT boot, and the driver relies on polling to get the state of the card. The current code depends on platform data callbacks to register and get the state of the gpios. mmc core provides a generic way to parse device tree configuration, which will take care of registering the gpios for us, lets use it so that we don't need to poll, and parse the same properties. Signed-off-by: NAxel Haslam <ahaslam@baylibre.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NDavid Lechner <david@lechnology.com>
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由 Wolfram Sang 提交于
We surely have SDIO support by now :) Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Wolfram Sang 提交于
Commit 7729c7a2 ("mmc: tmio: Provide separate interrupt handlers") refactored the sdio irq handler and wrongly used the mask for SD irqs, not for SDIO irqs. This doesn't really matter in practice because both values keep the only interrupt we are interested in. But still, this is wrong and wants to be fixed. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Alexey Khoroshilov 提交于
wbsd_request_dma() does not check for dma mapping errors. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: NAlexey Khoroshilov <khoroshilov@ispras.ru> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Dan Carpenter 提交于
We never set "ret" to RESULT_OK. Fixes: 9f9c4180 ("mmc: mmc_test: add test for non-blocking transfers") Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Masahiro Yamada 提交于
The type of host->private is (unsigned long *). No cast is needed to return an opaque pointer. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Scott Branden 提交于
Add bytewise register accesses support for newer versions of IPROC SDHCI controllers. Previous sdhci-iproc versions of SDIO controllers (such as Raspberry Pi and Cygnus) only allowed for 32-bit register accesses. Signed-off-by: NSrinath Mannam <srinath.mannam@broadcom.com> Signed-off-by: NScott Branden <scott.branden@broadcom.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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