- 08 5月, 2014 1 次提交
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由 Jingoo Han 提交于
Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 16 2月, 2014 1 次提交
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由 Axel Lin 提交于
The purpose of commit 1e8a52e1 "spi: By default setup spi_masters with 1 chipselect and dynamics bus number" is to avoid setting default value for bus_num and num_chipselect in spi master drivers. So let's remove the duplicate code. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-By: NDavid Daney <david.daney@cavium.com> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 13 2月, 2014 1 次提交
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由 Axel Lin 提交于
In spi_add_device(), we have the code to validate spi->chip_select. So remove the duplicate code in various drivers. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 11 2月, 2014 1 次提交
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由 Axel Lin 提交于
Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will handle checking transfer speed. In additional, since commit 052eb2d4 'spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controller', spi core will also set default spi->max_speed_hz if it is not set. So remove the duplicate code in tegra_slink_setup. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 03 2月, 2014 1 次提交
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由 Paul Gortmaker 提交于
None of these files are actually using any __init type directives and hence don't need to include <linux/init.h>. Most are just a left over from __devinit and __cpuinit removal, or simply due to code getting copied from one driver to the next. Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 17 12月, 2013 1 次提交
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由 Dan Carpenter 提交于
dma_request_slave_channel() returns NULL on error and not ERR_PTRs. I've fixed this by using dma_request_slave_channel_reason() which does return ERR_PTRs. Fixes: a915d150 ('spi: tegra: convert to standard DMA DT bindings') Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 12 12月, 2013 2 次提交
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由 Stephen Warren 提交于
By using dma_request_slave_channel_or_err(), the DMA slave ID can be looked up from standard DT properties, and squirrelled away during channel allocation. Hence, there's no need to use a custom DT property to store the slave ID. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NMark Brown <broonie@linaro.org>
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由 Stephen Warren 提交于
Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NMark Brown <broonie@linaro.org> Reviewed-by: NThierry Reding <treding@nvidia.com>
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- 10 12月, 2013 1 次提交
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由 Michal Nazarewicz 提交于
Previously used “unsigned long” may lead to confusion should the code be compiled for 64-bit machine. Signed-off-by: NMichal Nazarewicz <mina86@mina86.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 15 11月, 2013 1 次提交
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由 Wolfram Sang 提交于
Use this new function to make code more comprehensible, since we are reinitialzing the completion, not initializing. [akpm@linux-foundation.org: linux-next resyncs] Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> (personally at LCE13) Cc: Ingo Molnar <mingo@kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 17 10月, 2013 2 次提交
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由 Mark Brown 提交于
This is more idiomatic for the factored out message processing and gives a small simplification of the code since we always set the per-transfer parameters in the same fashion. Signed-off-by: NMark Brown <broonie@linaro.org> Tested-by: NStephen Warren <swarren@nvidia.com>
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由 Mark Brown 提交于
This is a half done conversion with minimal code reorganisation provided for bisection purposes. A further patch will move the first transfer preparation into tegra_slink_prepare_message(). The cs_change and udelay handling is removed, these should be implemented by the framework and in any case are buggy - the two fields should not be related and the cs_change handling appears to at best only work the first time it's used in a message. Signed-off-by: NMark Brown <broonie@linaro.org> Tested-by: NStephen Warren <swarren@nvidia.com>
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- 15 10月, 2013 1 次提交
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由 Jingoo Han 提交于
Fix the following checkpatch warning. WARNING: space prohibited before semicolon Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 08 10月, 2013 1 次提交
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由 Mark Brown 提交于
Currently transfer_one_message() checks to see if the message consists of a single spi_transfer and tells _start_transfer_one() but it just ignores this. Don't bother. Signed-off-by: NMark Brown <broonie@linaro.org> Acked-by: NLaxman Dewangan <ldewangan@nvidia.com>
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- 26 9月, 2013 1 次提交
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由 Jingoo Han 提交于
Use devm_spi_register_master() to make cleanup paths simpler. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 17 9月, 2013 1 次提交
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由 Axel Lin 提交于
This also makes the intention more clear. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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- 30 7月, 2013 2 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@linaro.org> Reviewed-by: NStephen Warren <swarren@nvidia.com>
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由 Mark Brown 提交于
Currently the tegra slink driver acquires a runtime PM reference for the duration of each transfer. This may result in the IP being powered down between transfers which would be at best wasteful. Instead it is better to do this in the callbacks that are generated before and after starting a series of transfers, keeping the IP powered throughout. Signed-off-by: NMark Brown <broonie@linaro.org> Acked-by: NLaxman Dewangan <ldewangan@nvidia.com>
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- 23 5月, 2013 1 次提交
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由 Jingoo Han 提交于
Use the wrapper functions for getting and setting the driver data using platform_device instead of using dev_{get,set}_drvdata() with &pdev->dev, so we can directly pass a struct platform_device. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 08 4月, 2013 1 次提交
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由 Wei Yongjun 提交于
Neither tegra20_spi_cdata nor tegra30_spi_cdata are used outside this file so they can, and should, be static. Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 07 4月, 2013 2 次提交
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由 Stephen Warren 提交于
Tegra only supports, and always enables, device tree. Remove all ifdefs and runtime checks for DT support from the driver. Platform data is therefore no longer required. Rework the driver to parse the device tree directly into struct tegra_slink_data. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Stephen Warren 提交于
There is no code to set spi->controller_data, and hence the HW CS logic can never trigger. Remove the unused code. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 04 4月, 2013 1 次提交
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由 Mark Brown 提交于
This reverts commit faa98f7e which was applied in error due to discussion ending up in the wrong thread.
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- 01 4月, 2013 2 次提交
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由 Laxman Dewangan 提交于
Spi starts transfer using dma with DMA_CTRL_ACK which is not require becasue spi driver does not use completed dma_desc after transfer done and so it does not ack the dma descriptor. Removing the DMA_CTRL_ACK flag to avoid memory leak in dma driver. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Wei Yongjun 提交于
The variable bits_per_word is initialized but never used otherwise, so remove the unused variable. Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-By: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 13 3月, 2013 1 次提交
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由 Laxman Dewangan 提交于
The prepare_transfer_hardware() is called in atomic context and calling synchronous runtime pm calls can create scheduling deadlock. Therefore, in place of calling runtime PM calls from prepare/unprepare message transfer, calling this in transfer_one_message(). Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 05 2月, 2013 2 次提交
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由 Laxman Dewangan 提交于
SPI core make sure that all transfer has proper speed set before calling low level spi transfer. Hence, it is not require to have check in spi driver. Remove the check for speed validity from transfer and use it directly. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Laxman Dewangan 提交于
The spi core make sure that each transfer structure have the proper setting for bits_per_word before calling low level transfer APIs. Hence it is no more require to check again in low level driver for this field whether this is set correct or not. Removing such code from low level driver. The txx9 change also removes a test for bits_per_word set to 0, and forcing it to 8 in that case. This can also be removed now since spi_setup() ensures spi->bits_per_word is not zero. if (!spi->bits_per_word) spi->bits_per_word = 8; Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 29 1月, 2013 2 次提交
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由 Prashant Gaikwad 提交于
Since Tegra spi devices do not have multiple clocks, no need to use clock name to get the clock. Signed-off-by: NPrashant Gaikwad <pgaikwad@nvidia.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Prashant Gaikwad 提交于
Migrate Tegra clock support to drivers/clk/tegra, this involves moving: 1. definition of tegra_cpu_car_ops to clk.c 2. definition of reset functions to clk-peripheral.c 3. change parent of cpu clock. 4. Remove legacy clock initialization. 5. Initialize clocks using DT. 6. Remove all instance of mach/clk.h Signed-off-by: NPrashant Gaikwad <pgaikwad@nvidia.com> [swarren: use to_clk_periph_gate().] Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 26 1月, 2013 1 次提交
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由 Thierry Reding 提交于
Convert all uses of devm_request_and_ioremap() to the newly introduced devm_ioremap_resource() which provides more consistent error handling. devm_ioremap_resource() provides its own error messages so all explicit error messages can be removed from the failure code paths. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 08 12月, 2012 1 次提交
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由 Grant Likely 提交于
CONFIG_HOTPLUG is going away as an option. As result the __dev* markings will be going away. Remove use of __devinit, __devexit_p, __devinitdata, __devinitconst, and __devexit. Bill Pemberton has done most of the legwork on this series. I've used his script to purge the attributes from the drivers/gpio tree. Reported-by: NBill Pemberton <wfp5p@virginia.edu> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 10 11月, 2012 2 次提交
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由 Laxman Dewangan 提交于
Sequence compatible list for tegra20-slink driver to first look for Tegra30 and then Tegra20. Tegra30 have additional feature in HW which need to be utilize if it is provided from DT. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Laxman Dewangan 提交于
When spi client does the spi transfer and does not sets the bits_per_word for each transfer then set it as default of spi device in spi core before calling low level transfer. Removing the similar code from spi-tegra20-slink driver as it is not required. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 31 10月, 2012 1 次提交
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由 Laxman Dewangan 提交于
Tegra20/Tegra30 supports the spi interface through its SLINK controller. Add spi driver for SLINK controller. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Reviewed-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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