- 11 2月, 2017 2 次提交
-
-
由 Jonathan Cameron 提交于
There are a few more little cleanups that could be done on this driver, but I don't think any are sufficient to justify not moving it out of staging. It's a very simple driver (presumably for a simple part) so not much that can go wrong. I think it was only ever in staging because that's where IIO was as a whole at the time and then we forgot about it! Signed-off-by: NJonathan Cameron <jic23@kernel.org> Cc: Roland Stigge <stigge@antcom.de> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
由 Jonathan Cameron 提交于
There are some unanswered questions due to disagreements between the code and various datasheets (including between different datasheets for the same part). I don't think that is necessarily a reason to keep it in staging however. I'm partly posting this patch inorder to reignite debate and with a bit of luck find someone who has one of these to test! Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 29 1月, 2017 3 次提交
-
-
由 Fabrice Gasnier 提交于
Add DMA optional support to STM32 ADC, as there is a limited number DMA channels (request lines) that can be assigned to ADC. This way, driver may fall back using interrupts when all DMA channels are in use for other IPs. Use dma cyclic mode with two periods. Allow to tune period length by using watermark. Coherent memory is used for dma (max buffer size is fixed to PAGE_SIZE). Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
由 Fabrice Gasnier 提交于
STM32 ADC has external timer trigger sources. Use stm32 timer triggers API (e.g. is_stm32_timer_trigger()) with local ADC lookup table to validate a trigger can be used. This also provides correct trigger selection value (e.g. extsel). Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
由 Fabrice Gasnier 提交于
STM32 ADC conversions can be launched using hardware triggers. It can be used to start conversion sequences (group of channels). Selected channels are select via sequence registers. Trigger source is selected via 'extsel' (external trigger mux). Trigger polarity is set to rising edge by default. Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 28 1月, 2017 2 次提交
-
-
由 Martin Blumenstingl 提交于
This adds support for the SAR (Successive Approximation Register) ADC on the Amlogic Meson SoCs. The code is based on the public S805 (Meson8b) and S905 (GXBB) datasheets (see [0] and [1]), as well as by reading (various versions of) the vendor driver and by inspecting the registers on the vendor kernels of my testing-hardware. Currently the GXBB, GXL and GXM SoCs are supported. GXBB hardware has 10-bit ADC resolution, while GXL and GXM have 12-bit ADC resolution. The code was written to support older SoCs (Meson8 and Meson8b) as well, but due to lack of actual testing-hardware no of_device_id was added for these. Two "features" from the vendor driver are currently missing: - the vendor driver uses channel #7 for calibration (this improves the accuracy of the results - in my tests the results were less than 3% off without calibration compared to the vendor driver). Adding support for this should be easy, but is not required for most applications. - channel #6 is connected to the SoCs internal temperature sensor. Adding support for this is probably not so easy since (based on the u-boot sources) most SoC versions are using different registers and algorithms for the conversion from "ADC value" to temperature. Supported by the hardware but currently not supported by the driver: - reading multiple channels at the same time (the hardware has a FIFO buffer which stores multiple results) - continuous sampling (this would require a way to enable this individually because otherwise the ADC would be drawing power constantly) - interrupt support (similar to the vendor driver this new driver is polling the results. It is unclear if the IRQ-mode is supported on older (Meson6 or Meson8) hardware as well or if there are any errata) [0] http://dn.odroid.com/S805/Datasheet/S805_Datasheet%20V0.8%2020150126.pdf [1] http://dn.odroid.com/S905/DataSheet/S905_Public_Datasheet_V1.1.4.pdfSigned-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
由 Marek Vasut 提交于
Add IIO driver for the Renesas RCar GyroADC block. This block is a simple 4/8-channel ADC which samples 12/15/24 bits of data every cycle from all channels. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Simon Horman <horms+renesas@verge.net.au> Cc: Jonathan Cameron <jic23@kernel.org> Cc: linux-renesas-soc@vger.kernel.org Cc: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 22 1月, 2017 1 次提交
-
-
由 Phil Reid 提交于
This adds TI's tlc4541 16-bit ADC driver. Which is a single channel ADC. Supports raw and trigger buffer access. Also supports the tlc3541 14-bit device, which has not been tested. Implementation of the tlc3541 is fairly straight forward thou. Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NPhil Reid <preid@electromag.com.au> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 21 1月, 2017 1 次提交
-
-
由 Jacopo Mondi 提交于
Add iio driver for Maxim MAX11100 single-channel ADC. Signed-off-by: NJacopo Mondi <jacopo+renesas@jmondi.org> Tested-by: NMarek Vasut <marek.vasut@gmail.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 11 1月, 2017 1 次提交
-
-
由 Andreas Klinger 提交于
This is the IIO driver for AVIA HX711 ADC which is mostly used in weighting cells. The protocol is quite simple and using GPIOs: One GPIO is used as clock (SCK) while another GPIO is read (DOUT) The raw value read from the chip is delivered. To get a weight one needs to subtract the zero offset and scale it. Signed-off-by: NAndreas Klinger <ak@it-klinger.de> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 31 12月, 2016 1 次提交
-
-
由 Geert Uytterhoeven 提交于
If NO_DMA=y: ERROR: "bad_dma_ops" [drivers/iio/adc/ti_am335x_adc.ko] undefined! Add a dependency on HAS_DMA to fix this. Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Fixes: f438b9da (" drivers: iio: ti_am335x_adc: add dma support") Cc: <stable@vger.kernel.org> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 03 12月, 2016 1 次提交
-
-
由 David Lechner 提交于
This adds a new driver for the TI ADS7950 family of ADC chips. These communicate using SPI and come in 8/10/12-bit and 4/8/12/16 channel varieties. Signed-off-by: NDavid Lechner <david@lechnology.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 19 11月, 2016 2 次提交
-
-
由 Fabrice Gasnier 提交于
This patch adds support for STMicroelectronics STM32 MCU's analog to digital converter. Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
由 Fabrice Gasnier 提交于
Add core driver for STMicroelectronics STM32 ADC (Analog to Digital Converter). STM32 ADC can be composed of up to 3 ADCs with shared resources like clock prescaler, common interrupt line and analog reference voltage. This core driver basically manages shared resources. Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 13 11月, 2016 1 次提交
-
-
由 Peter Rosin 提交于
The DAC is used to find the peak level of an alternating voltage input signal by a binary search using the output of a comparator wired to an interrupt pin. Like so: _ | \ input +------>-------|+ \ | \ .-------. | }---. | | | / | | dac|-->--|- / | | | |_/ | | | | | | | | irq|------<-------' | | '-------' Signed-off-by: NPeter Rosin <peda@axentia.se> Acked-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 24 10月, 2016 1 次提交
-
-
由 Akinobu Mita 提交于
This adds triggered buffer support for the ti-adc0832 driver. Tested with ADC0831 and ADC0832 by using SYSFS trigger. Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Cc: Jonathan Cameron <jic23@kernel.org> Cc: Hartmut Knaack <knaack.h@gmx.de> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Peter Meerwald-Stadler <pmeerw@pmeerw.net> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 09 10月, 2016 1 次提交
-
-
由 Mika Westerberg 提交于
Commit 08e05d1f ("ti-adc081c: Initial triggered buffer support") added triggered buffer support but that also requires CONFIG_IIO_TRIGGERED_BUFFER, otherwise we get errors from linker such as: drivers/built-in.o: In function `adc081c_remove': drivers/iio/adc/ti-adc081c.c:225: undefined reference to `iio_triggered_buffer_cleanup' Fix these by explicitly selecting both CONFIG_IIO_TRIGGERED_BUFFER and CONFIG_IIO_BUFFER in Kconfig for the driver. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 28 9月, 2016 1 次提交
-
-
由 Lars-Peter Clausen 提交于
Add support for the AD7766, AD7766-1, AD7766-2, AD7767, AD7767-1, AD7767-2 Analog to Digital converters. It's a family of single channel 24-bit SAR ADCs. They are all digital interface compatible and the main difference is the internal decimation rate and analog performance. For communication with the host processor a SPI interface is used. In addition the part has a data ready pin that is pulsed for one MCLK cycle when a conversion has completed and can be used as a IIO trigger. Datasheets: http://www.analog.com/media/en/technical-documentation/data-sheets/AD7766.pdf http://www.analog.com/media/en/technical-documentation/data-sheets/AD7767.pdfSigned-off-by: NLars-Peter Clausen <lars@metafoo.de> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 04 9月, 2016 1 次提交
-
-
由 William Breathitt Gray 提交于
The Apex Embedded Systems STX104 features 16 channels of single-ended (8 channels of true differential) 16-bit analog input. Differential input configuration may be selected via a physical jumper on the device. Similarly, input polarity (unipolar/bipolar) is configured via a physical jumper on the device. Input gain selection is available to the user via software, thus allowing eight possible input ranges: +-10V, +-5V, +-2.5V, +-1.25V, 0 to 10V, 0 to 5V, 0 to 2.5V, and 0 to 1.25V. Four input gain configurations are supported: x1, x2, x4, and x8. This ADC resolution is 16-bits (1/65536 of full scale). Analog input samples are taken on software trigger; neither FIFO sampling nor interrupt triggering is supported by this driver. The Apex Embedded Systems STX104 is primarily an analog-to-digital converter device. The STX104 IIO driver was initially placed in the DAC directory because only the DAC portion of the STX104 was supported at the time. Now that ADC support has been added to the STX104 IIO driver, the driver should be moved to the more appropriate ADC directory. Signed-off-by: NWilliam Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 01 9月, 2016 1 次提交
-
-
由 Akinobu Mita 提交于
This adds Texas Instruments' ADC12130/ADC12132/ADC12138 12-bit plus sign ADC driver. I have tested with the ADC12138. The ADC12130 and ADC12132 are not tested but these are similar to ADC12138 except that the mode programming instruction is a bit different. Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Acked-by: NRob Herring <robh@kernel.org> Cc: Jonathan Cameron <jic23@kernel.org> Cc: Hartmut Knaack <knaack.h@gmx.de> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 29 8月, 2016 1 次提交
-
-
由 Alison Schofield 提交于
Adds basic support for the LTC2485 ADC - a delta-sigma analog-to-digital converter with an I2C interface that operates in single shot conversion mode. The driver supports an on board 5V reference and the power-on default configuration which rejects both 50hz & 60hz line frequencies and operates in 1x speed mode. Signed-off-by: NAlison Schofield <amsfield22@gmail.com> Cc: Daniel Baluta <daniel.baluta@gmail.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 24 8月, 2016 1 次提交
-
-
由 Caesar Wang 提交于
SARADC controller needs to be reset before programming it, otherwise it will not function properly. Signed-off-by: NCaesar Wang <wxt@rock-chips.com> Cc: Jonathan Cameron <jic23@kernel.org> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-iio@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Tested-by: NGuenter Roeck <linux@roeck-us.net> Cc: <Stable@vger.kernel.org> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 22 8月, 2016 1 次提交
-
-
由 Zhiyong Tao 提交于
Add Mediatek auxadc driver based on iio. It will register a device in iio and support iio. So thermal can read auxadc channel to sample data by iio device. It is tested successfully on mt2701 platform. Mt8173 and mt6577 platforms are not tested. But the expectation is compatible. Signed-off-by: NZhiyong Tao <zhiyong.tao@mediatek.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 21 8月, 2016 1 次提交
-
-
由 Matt Ranostay 提交于
Add support for Texas Instruments ADC141S626, and ADC161S626 chips. Signed-off-by: NMatt Ranostay <mranostay@gmail.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 03 7月, 2016 1 次提交
-
-
由 Raveendra Padasalagi 提交于
This patch adds basic driver implementation for Broadcom's static adc controller used in iProc SoC's family. Signed-off-by: NRaveendra Padasalagi <raveendra.padasalagi@broadcom.com> Reviewed-by: NRay Jui <ray.jui@broadcom.com> Reviewed-by: NScott Branden <scott.branden@broadcom.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 17 4月, 2016 1 次提交
-
-
由 Crestez Dan Leonard 提交于
These chips have an almost identical interface but support a different number of value bits. Datasheet links for comparison: * http://www.ti.com/lit/ds/symlink/adc081c021.pdf * http://www.ti.com/lit/ds/symlink/adc101c021.pdf * http://www.ti.com/lit/ds/symlink/adc121c021.pdfSigned-off-by: NCrestez Dan Leonard <leonard.crestez@intel.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 28 3月, 2016 1 次提交
-
-
由 Krzysztof Kozlowski 提交于
The devres.o gets linked if HAS_IOMEM is present so on ARCH=um allyesconfig (COMPILE_TEST) failed with: drivers/built-in.o: In function `at91_adc_probe': at91-sama5d2_adc.c:(.text+0x48f548): undefined reference to `devm_ioremap_resource' Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 13 3月, 2016 1 次提交
-
-
由 Joachim Eastwood 提交于
Add base support for the 10-bit SAR ADC peripheral found on NXP LPC18xx/43xx SoCs. This is a minimal driver that does not support burst mode, interrupts, DMA or hardware triggers. User manual with register description can be found on: LPC18xx: www.nxp.com/documents/user_manual/UM10430.pdf LPC43xx: www.nxp.com/documents/user_manual/UM10503.pdf Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 06 3月, 2016 1 次提交
-
-
由 Krzysztof Kozlowski 提交于
The devres.o gets linked if HAS_IOMEM is present so on ARCH=um allyesconfig (COMPILE_TEST) failed with: drivers/built-in.o: In function `at91_adc_probe': at91-sama5d2_adc.c:(.text+0x48f548): undefined reference to `devm_ioremap_resource' Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 14 2月, 2016 1 次提交
-
-
由 Daniel Baluta 提交于
The driver has sysfs readings with runtime PM support for power saving. It also offers buffer support that can be used together with IIO software triggers. Datasheet can be found here: http://www.ti.com.cn/cn/lit/ds/symlink/ads1015.pdfSigned-off-by: NDaniel Baluta <daniel.baluta@intel.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 11 2月, 2016 2 次提交
-
-
由 Markus Pargmann 提交于
This is a conversion queue driver for the mx25 SoC. It uses the central ADC which is used by two seperate independent queues. This driver prepares different conversion configurations for each possible input. For a conversion it creates a conversionqueue of one item with the correct configuration for the chosen channel. It then executes the queue once and disables the conversion queue afterwards. The reference voltages are configurable through devicetree subnodes, depending on the connections of the ADC inputs. Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Signed-off-by: NDenis Carikli <denis@eukrea.com> Acked-by: NJonathan Cameron <jic23@kernel.org> Signed-off-by: NLee Jones <lee.jones@linaro.org>
-
由 Ksenija Stanojevic 提交于
Move mxs-lradc driver from drivers/staging/iio/adc to drivers/iio/adc. Signed-off-by: NKsenija Stanojevic <ksenija.stanojevic@gmail.com> Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 10 2月, 2016 1 次提交
-
-
由 Akinobu Mita 提交于
This adds ADC0831/ADC0832/ADC0834/ADC0838 8-bit ADC driver. I have tested with ADC0831 and ADC0832. The remaining ADC0834 and ADC0838 are very similar to ADC0832. Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Cc: Jonathan Cameron <jic23@kernel.org> Cc: Hartmut Knaack <knaack.h@gmx.de> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 30 1月, 2016 1 次提交
-
-
由 Richard Weinberger 提交于
Not every arch has io memory. So, unbreak the build by fixing the dependencies. Signed-off-by: NRichard Weinberger <richard@nod.at> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 16 1月, 2016 2 次提交
-
-
由 Ludovic Desroches 提交于
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
由 Ludovic Desroches 提交于
This driver supports the new version of the Atmel ADC device introduced with the SAMA5D2 SoC family. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 04 1月, 2016 1 次提交
-
-
由 Vegard Nossum 提交于
Ran into this on UML: drivers/built-in.o: In function `vf610_adc_probe': drivers/iio/adc/vf610_adc.c:744: undefined reference to `devm_ioremap_resource' devm_ioremap_resource() is defined only when HAS_IOMEM is selected. Signed-off-by: NVegard Nossum <vegard.nossum@oracle.com> Cc: <Stable@vger.kernel.org> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 03 1月, 2016 1 次提交
-
-
由 Akinobu Mita 提交于
The MCP3425 is a single channel up to 16-bit A/D converter which has features: - On-Board Programmable Gain Amplifier (PGA): - Gains of 1, 2, 4 or 8 - Programmable Data Rate Options: - 15 SPS (16 bits), 60 SPS (14 bits), 240 SPS (12 bits) The mcp3422 driver also supports the MCP3421 which is a single channel. So we can support MCP3425 with a little changes to mcp3422 driver. Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Angelo Compagnucci <angelo.compagnucci@gmail.com> Cc: Peter Meerwald <pmeerw@pmeerw.net> Cc: linux-iio@vger.kernel.org Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
- 13 12月, 2015 2 次提交
-
-
由 Haibo Chen 提交于
Freescale i.MX7D soc contains a new ADC IP. This patch add this ADC driver support, and the driver only support ADC software trigger. Signed-off-by: NHaibo Chen <haibo.chen@freescale.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-
由 Marc Titinger 提交于
in SOFTWARE buffer mode, a kthread will capture the active scan_elements into a kfifo, then compute the remaining time until the next capture tick and do an active wait (udelay). This will produce a stream of up to fours channels plus a 64bits timestamps (ns). Tested with ina226, on BeagleBoneBlack. Datasheet: http://www.ti.com/lit/gpn/ina226Signed-off-by: NMarc Titinger <mtitinger@baylibre.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
-