- 04 1月, 2014 30 次提交
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由 Huang Shijie 提交于
The local array feature[] is in the stack. We can see the warning when we enable the CONFIG_DMA_API_DEBUG: ---------------------------------------------------------- WARNING: at lib/dma-debug.c:950 check_for_stack+0xac/0xf8() gpmi-nand 112000.gpmi-nand: DMA-API: device driver maps memory fromstack [addr=dc05be34] Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.17-16851-g2414a73 #1324 [<80014cbc>] (unwind_backtrace+0x0/0x138) from [<8001251c>] (show_stack+0x10/0x14) [<8001251c>] (show_stack+0x10/0x14) from [<8002699c>] (warn_slowpath_common+0x4c/0x68) [<8002699c>] (warn_slowpath_common+0x4c/0x68) from [<80026a4c>] (warn_slowpath_fmt+0x30/0x40) [<80026a4c>] (warn_slowpath_fmt+0x30/0x40) from [<8028e2f8>] (check_for_stack+0xac/0xf8) [<8028e2f8>] (check_for_stack+0xac/0xf8) from [<8028e438>] (debug_dma_map_sg+0xf4/0x188) [<8028e438>] (debug_dma_map_sg+0xf4/0x188) from [<803968d0>] (prepare_data_dma+0xb8/0x1a8) [<803968d0>] (prepare_data_dma+0xb8/0x1a8) from [<80397b20>] (gpmi_send_data+0x84/0xfc) [<80397b20>] (gpmi_send_data+0x84/0xfc) from [<8038c2b4>] (nand_onfi_set_features+0x50/0x74) [<8038c2b4>] (nand_onfi_set_features+0x50/0x74) from [<80397198>] (gpmi_extra_init+0x90/0x170) [<80397198>] (gpmi_extra_init+0x90/0x170) from [<8039520c>] (gpmi_nand_probe+0x2f8/0xb3c) [<8039520c>] (gpmi_nand_probe+0x2f8/0xb3c) from [<8031b974>] (platform_drv_probe+0x18/0x1c) ---------------------------------------------------------- The patch uses the kzalloc to allocate the buffer, and free it when we do not use it anymore. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Brian Norris 提交于
The Armada BCH configuration in this driver uses one of the two following ECC schemes: 16-bit correction per 2048 bytes 16-bit correction per 1024 bytes These are sufficient for mapping to the 4-bit per 512-bytes and 8-bit per 512-bytes (respectively) minimum correctability requirements of many common NAND. The current code only checks for the required strength (4-bit or 8-bit) without checking the ECC step size that is associated with that strength (and simply assumes it is 512). While that is often a safe assumption to make, let's make it explicit, since we have that information. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Acked-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com>
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由 Ezequiel Garcia 提交于
This commit extends the ECC correctable error detection to include ECC BCH errors. The number of BCH correctable errors can be any up to 16, and the actual value is exposed in the NDSR register. Therefore, we change some symbol names to refer to correctable or uncorrectable (instead of single-bit or double-bit as it was in the Hamming case) and while at it, cleanup the detection code slightly. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
This commit adds write support for large pages (4 KiB, 8 KiB). Such support is implemented by issuing a multiple command sequence, transfering a set of 2 KiB chunks per transaction. The splitted command sequence requires to send the SEQIN command independently of the PAGEPROG command and therefore it's set as an execution command. Since PAGEPROG enables ECC, each 2 KiB chunk of data is written together with ECC code at a controller-fixed location within the flash page. Currently, only devices with a 4 KiB page size has been tested. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
As preparation work to fully support large pages, this commit adds the initial infrastructure to support splitted (aka chunked) I/O operation. This commit adds support for read, and follow-up patches will add write support. When a read (aka READ0) command is issued, the driver loops issuing the same command until all the requested data is transfered, changing the 'extended' command field as needed. For instance, if the driver is required to read a 4 KiB page, using a chunk size of 2 KiB, the transaction is splitted in: 1. Monolithic read, first 2 KiB page chunk is read 2. Last naked read, second and last 2KiB page chunk is read If ECC is enabled it is calculated on each chunk transfered and added at a controller-fixed location after the data chunk that must be spare area. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
In preparation to support multiple (aka chunked, aka splitted) page I/O, this commit adds 'data_buff_pos' and 'oob_buff_pos' fields to keep track of where the next read (or write) should be done. This will allow multiple calls to handle_data_pio() to continue the read (or write) operation. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
This commit adds support page programming with a non-zero "column" address setting. This is important to support OOB writing, through command sequences such as: cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, ofs); write_buf(mtd, oob_buf, 6); cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
To allow future support of multiple page reading/writing, move the data buffer clean out of prepare_set_command(). This is done to prevent the data buffer from being cleaned on every command preparation, when a multiple command sequence is implemented to read/write pages larger than the FIFO size (2 KiB). Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
This commit splits the prepare_command_pool() function into two stages: prepare_start_command() / prepare_set_command(). This is a preparation patch without any functionality changes, and is meant to allow support for multiple page reading/writing operations. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
READ0 and READOOB command preparation has a falltrough to SEQIN case, where the command address is specified. This is certainly confusing and makes the code less readable with no added value. Let's remove it. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
Let's simplify the code by first introducing a helper function to set the page address, as done by the READ0, READOOB and SEQIN commands. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
Command buffer #3 is not properly cleared and it keeps the last set value. Fix this by clearing when a command is setup. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
This commit adds the BCH ECC support available in NFCv2 controller. Depending on the detected required strength the respective ECC layout is selected. This commit adds an empty ECC layout, since support to access large pages is first required. Once that support is added, a proper ECC layout will be added as well. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
Add support for flash-based bad block table using Marvell's custom in-flash bad block table layout. The support is enabled a 'flash_bbt' platform data or device tree parameter. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
In pxa3xx_nand_sensing() instead of simply using info->is_ready after issuing a command, the correct way of checking is to wait for the device to be ready through the chip's waitfunc(). Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
The expected behavior of the waitfunc() NAND chip call is to wait for the device to be READY (this is a standard chip line). However, the current implementation does almost nothing, which opens the possibility of issuing a command to a non-ready device. Fix this by adding a new completion to wait for the ready event to arrive. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
Add a comment clarifying the use of pxa3xx_set_datasize() which is only applicable on data read/write commands (i.e. commands with a data cycle, such as READID, READ0, STATUS, etc.) Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
There's no need to privately store the device page size as it's available in mtd structure field mtd->writesize. Also, this removes the hardcoded page size value, leaving the auto-detected value only. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
Introduce a fifo_size field to represent the size of the controller's FIFO buffer, and use it to distinguish that size from the amount of data bytes to be read from the FIFO. This is important to support devices with pages larger than the controller's internal FIFO, that need to read the pages in FIFO-sized chunks. In particular, the current code is at least confusing, for it mixes all the different sizes involved: FIFO size, page size and data size. This commit starts the cleaning by removing the info->page_size field that is not currently used. The host->page_size field should also be removed and use always mtd->writesize instead. Follow up commits will clean this up. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
Whenever possible, it's always better to use the generic chip->cmdfunc instead of the internal pxa3xx_nand_cmdfunc(). In this particular case, this will allow to have multiple cmdfunc() implementations for different SoC variants. Reviewed-by: NHuang Shijie <shijie8@gmail.com> Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
In order to customize early settings depending on the detected SoC variant, move the detection to be before the nand_chip struct filling. In a follow-up patch, this change is needed to detect the variant *before* the call to alloc_nand_resource(), which allows to set a different cmdfunc() for each variant. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
As per the ecc.read_page() prototype, we must return the maximum number of bitflips that were corrected on any one region covering an ecc step. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
The current driver doesn't support sub-page writing, so report that to the NAND core. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
Since we have now support for the NFCv2 controller found on Armada 370/XP platforms. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
Given there's no public specification to this date, and in order to capture some important details and singularities about the controller let's document them once and for good. Cc: linux-doc@vger.kernel.org Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Geert Uytterhoeven 提交于
device_driver.name is "const char *" Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Acked-by: NOlof Johansson <olof@lixom.net> Cc: linux-mtd@lists.infradead.org Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Fabio Estevam 提交于
Fix the following checkpatch warnings: WARNING: line over 80 characters #268: FILE: mtd/nand/gpmi-nand/gpmi-lib.c:268: + * consecutive reboots. The latter case has not been seen on the MX23 yet, WARNING: space prohibited before semicolon #356: FILE: mtd/nand/gpmi-nand/gpmi-lib.c:356: + (target.tRHOH_in_ns >= 0) ; WARNING: space prohibited before semicolon #1006: FILE: mtd/nand/gpmi-nand/gpmi-lib.c:1006: + BF_GPMI_TIMING0_DATA_SETUP(hw.data_setup_in_cycles) ; Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Fabio Estevam 提交于
Using devm_clk_get() can make the code smaller and cleaner. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Huang Shijie 提交于
In default way, we use the ecc_strength/ecc_step size calculated by ourselves and use all the OOB area. This patch adds a new property : "fsl,use-minimum-ecc" If we enable it, we will firstly try to use the datasheet's minimum required ECC provided by the MTD layer (the ecc_strength_ds/ecc_step_ds fields in the nand_chip{}). So we may have free space in the OOB area by using the minimum ECC, and we may support JFFS2 with some SLC NANDs, such as Micron's SLC NAND. If we fail to use the minimum ECC, we will use the legacy method to calculate the ecc_strength and ecc_step size. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
This option does not need to depend in MTD_NAND, for it's enclosed under it. Also, it's wrong to make it depend in ARCH_OMAP3 only since the controller is used in a wider range of SoCs. Instead, just leave the dependency on the OMAP2 driver option. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: NPekon Gupta <pekon@ti.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 13 12月, 2013 2 次提交
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由 Ezequiel Garcia 提交于
In commit: commit 62e8b851 Author: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Date: Fri Oct 4 15:30:38 2013 -0300 mtd: nand: pxa3xx: Allocate data buffer on detected flash size the way the buffer is allocated was changed: the first READ_ID is issued with a small kmalloc'ed buffer. Only once the flash page size is detected the DMA buffers are allocated, and info->use_dma is set. Currently, if the device detection fails, the driver checks the 'use_dma' module parameter and tries to release unallocated DMA resources. Fix this by checking the proper indicator of the DMA allocation, which is 'info->use_dma'. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Ezequiel Garcia 提交于
This partially reverts c0f3b864. The "armada370-nand" compatible support is not complete, and it was mistake to add it. Revert it and postpone the support until the infrastructure is in place. Cc: <stable@vger.kernel.org> # 3.12 Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: NJason Cooper <jason@lakedaemon.net> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 15 11月, 2013 2 次提交
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由 Wolfram Sang 提交于
Use this new function to make code more comprehensible, since we are reinitialzing the completion, not initializing. [akpm@linux-foundation.org: linux-next resyncs] Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> (personally at LCE13) Cc: Ingo Molnar <mingo@kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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Remove no longer needed DMA unmap flags: - DMA_COMPL_SKIP_SRC_UNMAP - DMA_COMPL_SKIP_DEST_UNMAP - DMA_COMPL_SRC_UNMAP_SINGLE - DMA_COMPL_DEST_UNMAP_SINGLE Cc: Vinod Koul <vinod.koul@intel.com> Cc: Tomasz Figa <t.figa@samsung.com> Cc: Dave Jiang <dave.jiang@intel.com> Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NJon Mason <jon.mason@intel.com> Acked-by: NMark Brown <broonie@linaro.org> [djbw: clean up straggling skip unmap flags in ntb] Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 13 11月, 2013 1 次提交
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由 Huang Shijie 提交于
The imx23 board will check the fingerprint, so it will call the mx23_check_transcription_stamp. This function will use @chip->buffers->databuf as its buffer which is allocated in the nand_scan_tail(). Unfortunately, the mx23_check_transcription_stamp is called before the nand_scan_tail(). So we will meet a NULL pointer bug: -------------------------------------------------------------------- [ 1.150000] NAND device: Manufacturer ID: 0xec, Chip ID: 0xd7 (Samsung NAND 4GiB 3,3V 8-bit), 4096MiB, page size: 4096, OOB size: 8 [ 1.160000] Unable to handle kernel NULL pointer dereference at virtual address 000005d0 [ 1.170000] pgd = c0004000 [ 1.170000] [000005d0] *pgd=00000000 [ 1.180000] Internal error: Oops: 5 [#1] ARM [ 1.180000] Modules linked in: [ 1.180000] CPU: 0 PID: 1 Comm: swapper Not tainted 3.12.0 #89 [ 1.180000] task: c7440000 ti: c743a000 task.ti: c743a000 [ 1.180000] PC is at memcmp+0x10/0x54 [ 1.180000] LR is at gpmi_nand_probe+0x42c/0x894 [ 1.180000] pc : [<c025fcb0>] lr : [<c02f6a68>] psr: 20000053 [ 1.180000] sp : c743be2c ip : 600000d3 fp : ffffffff [ 1.180000] r10: 000005d0 r9 : c02f5f08 r8 : 00000000 [ 1.180000] r7 : c75858a8 r6 : c75858a8 r5 : c7585b18 r4 : c7585800 [ 1.180000] r3 : 000005d0 r2 : 00000004 r1 : c05c33e4 r0 : 000005d0 [ 1.180000] Flags: nzCv IRQs on FIQs off Mode SVC_32 ISA ARM Segment kernel [ 1.180000] Control: 0005317f Table: 40004000 DAC: 00000017 [ 1.180000] Process swapper (pid: 1, stack limit = 0xc743a1c0) -------------------------------------------------------------------- This patch rearrange the init procedure: Set the NAND_SKIP_BBTSCAN to skip the nand scan firstly, and after we set the proper settings, we will call the chip->scan_bbt() manually. Cc: stable@vger.kernel.org # 3.12 Signed-off-by: NHuang Shijie <b32955@freescale.com> Reported-by: NFabio Estevam <festevam@gmail.com> Tested-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 12 11月, 2013 2 次提交
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由 Huang Shijie 提交于
[1] The gpmi uses the nand_command_lp to issue the commands to NAND chips. The gpmi issues a DMA operation with gpmi_cmd_ctrl when it handles a NAND_CMD_NONE control command. So when we read a page(NAND_CMD_READ0) from the NAND, we may send two DMA operations back-to-back. If we do not serialize the two DMA operations, we will meet a bug when 1.1) we enable CONFIG_DMA_API_DEBUG, CONFIG_DMADEVICES_DEBUG, and CONFIG_DEBUG_SG. 1.2) Use the following commands in an UART console and a SSH console: cmd 1: while true;do dd if=/dev/mtd0 of=/dev/null;done cmd 1: while true;do dd if=/dev/mmcblk0 of=/dev/null;done The kernel log shows below: ----------------------------------------------------------------- kernel BUG at lib/scatterlist.c:28! Unable to handle kernel NULL pointer dereference at virtual address 00000000 ......................... [<80044a0c>] (__bug+0x18/0x24) from [<80249b74>] (sg_next+0x48/0x4c) [<80249b74>] (sg_next+0x48/0x4c) from [<80255398>] (debug_dma_unmap_sg+0x170/0x1a4) [<80255398>] (debug_dma_unmap_sg+0x170/0x1a4) from [<8004af58>] (dma_unmap_sg+0x14/0x6c) [<8004af58>] (dma_unmap_sg+0x14/0x6c) from [<8027e594>] (mxs_dma_tasklet+0x18/0x1c) [<8027e594>] (mxs_dma_tasklet+0x18/0x1c) from [<8007d444>] (tasklet_action+0x114/0x164) ----------------------------------------------------------------- 1.3) Assume the two DMA operations is X (first) and Y (second). The root cause of the bug: Assume process P issues DMA X, and sleep on the completion @this->dma_done. X's tasklet callback is dma_irq_callback. It firstly wake up the process sleeping on the completion @this->dma_done, and then trid to unmap the scatterlist S. The waked process P will issue Y in another ARM core. Y initializes S->sg_magic to zero with sg_init_one(), while dma_irq_callback is unmapping S at the same time. See the diagram: ARM core 0 | ARM core 1 ------------------------------------------------------------- (P issues DMA X, then sleep) --> | | (X's tasklet wakes P) --> | | | <-- (P begin to issue DMA Y) | (X's tasklet unmap the | scatterlist S with dma_unmap_sg) --> | <-- (Y calls sg_init_one() to init | scatterlist S) | [2] This patch serialize both the X and Y in the following way: Unmap the DMA scatterlist S firstly, and wake up the process at the end of the DMA callback, in such a way, Y will be executed after X. After this patch: ARM core 0 | ARM core 1 ------------------------------------------------------------- (P issues DMA X, then sleep) --> | | (X's tasklet unmap the | scatterlist S with dma_unmap_sg) --> | | (X's tasklet wakes P) --> | | | <-- (P begin to issue DMA Y) | | <-- (Y calls sg_init_one() to init | scatterlist S) | Cc: stable@vger.kernel.org # 3.2 Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Huang Shijie 提交于
We cannot scan two chips for imx23 and imx28: imx23: the Ready-Busy1 line is not connected for some board. imx28: we do not set the pinctrl for Ready-Busy1 So we only scan two chips for imx6. Signed-off-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 11 11月, 2013 1 次提交
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由 Rob Herring 提交于
Commit b5b4bb3f (of: only include prom.h on sparc) removed implicit includes of of_*.h headers by powerpc's prom.h. Some components were missed in initial clean-up patch, so add the necessary includes to fix powerpc builds. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Tejun Heo <tj@kernel.org> Cc: Matt Mackall <mpm@selenic.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: "David S. Miller" <davem@davemloft.net> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-ide@vger.kernel.org Cc: linux-crypto@vger.kernel.org
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- 08 11月, 2013 2 次提交
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由 Fabio Estevam 提交于
Using devm_kzalloc() can make the code simpler. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Josh Wu 提交于
In the atmel driver probe function, the code shows like following: atmel_nand_probe(...) { ... err_nand_ioremap: platform_driver_unregister(&atmel_nand_nfc_driver); return res; } If no nand flash detected, the driver probe function will goto err_nand_ioremap label. Then platform_driver_unregister() will be called. It will get the lock of atmel_nand device since it is parent of nfc_device. The problem is the lock is already hold by atmel_nand_probe itself. So system will be in a dead lock. This patch just simply removed to platform_driver_unregister() call. When atmel_nand driver is quit the platform_driver_unregister() will be called in atmel_nand_remove(). [Brian: the NAND platform probe really has no business registering/unregistering another driver; this fixes the deadlock, but we should follow up the likely racy behavior here with a better architecture] Signed-off-by: NJosh Wu <josh.wu@atmel.com> Cc: <stable@vger.kernel.org> # 3.12 Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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