Remove the string "(Device Tree)" after the machine name because all AT91
machines use the DT nowadays.
Also change some function names to unify following the convention:
- at91sam9xxx aren't named sam9, 9xxx but with the full name
- sama5 are the ones that don't have the at91 prefix anymore.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Move the ramc initialization to pm.c as it is the only user left.
This allows us to get rid of at91_dt_initialize() that was the only one called
by the init_early() function pointer of struct machine_desc.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
[nicolas.ferre@atmel.com: adapt patch to newer series]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

As board files are now DT only and can address all aspects of the SoC family,
we can rename them so that the mach-at91 directory looks cleaner.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

at91_boot_soc and at91_init_soc structures are not used by any SoC, remove
their use. Also remove all the now empty SoC files.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
[nicolas.ferre@atmel.com: different organization of the patches]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

For sama5d4, remove an indirection and the remaining need for at91_boot_soc
structure.
This will allow further cleanup.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Only use SOC_AT91SAM9 for all the at91sam9 SoCs. It removes all the empty
at91sam9xxx.c SoC files. It also removes the useless at91_init_soc affectation
procedure and its "init" function pointer.
Only the SoC detection and display are kept for the at91sam9:
at91_soc_is_enabled() and at91_boot_soc.map_io() function calls are also
removed.

It enables HAVE_AT91_SMD and HAVE_AT91_UTMI for all the sam9 SoCs but this only
represents 96 bytes of uncompressed kernel code.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
[nicolas.ferre@atmel.com: different organization of the patches]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Setup arm_pm_idle and arm_pm_restart function pointers from
rm9200_dt_device_init() function to simplify the at91rm9200 initialization
process.
This same move is already done for the sam9s.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
[nicolas.ferre@atmel.com: adapt patch to newer series]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

The digicolor interrupt controller driver now needs syscon.

Also, as per clocksource maintainer request, we now have a separate config
symbol, CONFIG_DIGICOLOR_TIMER, for the digicolor timer.
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Based on
"mfd: syscon: Decouple syscon interface from platform devices"
(sha1: bdb0066d)
SLCR driver can use syscon/regmap drivers directly.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Signed-off-by: NMoritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Use the USART peripheral as UART for low level debug. Only the UA0 port is
currently supported.
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Add initial support for the Conexant CX92755 SoC. The CX92755 is one of the
Digicolor series of SoCs, all sharing many of the same peripherals. The code
was tested on the CX92755 evaluation kit, AKA Equinox.
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Add minimal hwmod support that works at least on dm8168. This
is based on the code in the earlier TI CDP tree, and an earlier
patch by Aida Mynzhasova <aida.mynzhasova@skitlab.ru>.

I've set up things to work pretty much the same way as for
am33xx. We are basically using cm33xx.c with a different set
of clocks and clockdomains.

This code is based on the TI81XX-LINUX-PSP-04.04.00.02 patches
published at:

http://downloads.ti.com/dsps/dsps_public_sw/psp/LinuxPSP/TI81XX_04_04/04_04_00_02/index_FDS.html

Cc: Aida Mynzhasova <aida.mynzhasova@skitlab.ru>
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Acked-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch adds required definitions and structures for clockdomain
initialization, so omap3xxx_clockdomains_init() was substituted by
new ti81xx_clockdomains_init() while early initialization of
TI81XX platform.

Note that we now need to have 81xx in a separate CONFIG_SOC_TI81XX
block instead inside the ifdef block for omap3 to avoid make
randconfig build errors.

This code is based on the TI81XX-LINUX-PSP-04.04.00.02 patches
published at:

http://downloads.ti.com/dsps/dsps_public_sw/psp/LinuxPSP/TI81XX_04_04/04_04_00_02/index_FDS.html

Cc: Brian Hutchinson <b.hutchman@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: NAida Mynzhasova <aida.mynzhasova@skitlab.ru>
[tony@atomide.com: updated to apply, renamed to clockdomains81xx.c,
 fixed to use am33xx_clkdm_operations, various fixes suggested by
 Paul Walmsley]
Reviewed-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This allows booting ti81xx boards when a .dts file
is in place.

Cc: Brian Hutchinson <b.hutchman@gmail.com>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The SOC_AT91SAM9263 is being removed, stop using it.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

mach/system_rev.h is not used, remove it.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

In order to remove SOC_SAM9xxx options, stop using HAVE_AT91_DBGUx.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

The PM initialization needs internal SRAM for allocating a gen_pool and
use it to store its PM code. So we need to have of_platform_populate() before
this code.
Suggested-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

As all sam9 SoCs are setting arm_pm_idle to at91sam9_idle(), do it from
sam9_dt_device_init().
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Suggested-by: NArnd Bergmann <arnd@arndb.de>
[nicolas.ferre@atmel.com: adapt patch to newer series]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

sam9n12 and sam9x5 don't set arm_pm_idle because of an oversight, fix that.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Suggested-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

As long as there is no other non-const variable marked __initdata in the
same compilation unit it doesn't hurt. If there were one however
compilation would fail with

error: $variablename causes a section type conflict

because a section containing const variables is marked read only and so
cannot contain non-const variables.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
[nicolas.ferre@atmel.com: update the paths after having re-arranged the patches]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Newer SoCs: at91sam9x5, at91sam9n12, sama5d3 and sama5d4 embed a DDR controller
and have a different PMC status register layout than the at91sam9g45. Create
another at91_sam9x5_pm_init() function to match this compatibility.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

The DEBUG_AT91_UART Kconfig option was forgotten when moving the
AT91 debug-macro.S file. Add it and use it for the at91.S compilation.
Reported-by: NPaul Bolle <pebolle@tiscali.nl>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

We don't need to force gpiolib on everyone given that it isn't
required to actually boot the device and the multiplatform
Kconfig already selects ARCH_WANT_OPTIONAL_GPIOLIB. CLKSRC_OF is
already selected by CONFIG_ARCH_MULTIPLATFORM too, so we can drop
that here.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NKumar Gala <galak@codeaurora.org>

The secure environment only runs in little-endian mode, so any
buffers shared with the secure environment should have their
contents converted to little-endian. We also mark such elements
with __le32 to allow sparse to catch such problems.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NKumar Gala <galak@codeaurora.org>

The secure world only knows about 32-bit wide physical addresses
for the boot API. Clarify the kernel interface by explicitly
stating a u32 instead of phys_addr_t which could be 32 or 64 bits
depending on LPAE or not.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NKumar Gala <galak@codeaurora.org>

This adds the required information to reset the board during an overheating
situation to the Jetson TK1 device tree. The thermal reset is handled by the
PMC by sending an I2C message to the PMIC. The entries specify the I2C
message to be sent.
Signed-off-by: NMikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Quad core targets like APQ8074, APQ8064, APQ8084 need SCM support set up
warm boot addresses in the Secure Monitor. Extend the SCM flags to
support warmboot addresses for secondary cores.
Signed-off-by: NLina Iyer <lina.iyer@linaro.org>
Signed-off-by: NKumar Gala <galak@codeaurora.org>

Enable smp for HiP01 board.
Signed-off-by: NWang Long <long.wanglong@huawei.com>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
[olof: split off the dts change to a separate commit]
Signed-off-by: NOlof Johansson <olof@lixom.net>

As hix5hd2 and hip01 has the same secondary_startup
so rename hix5hd2_secondary_startup to
to hisi_secondary_startup.

the hip01 will use hisi_secondary_startup for the
secondary core boot.
Signed-off-by: NWang Long <long.wanglong@huawei.com>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

As hix5hd2 and hip01 has the same .smp_prepare_cpus
in struct smp_operations, so rename hix5hd2_smp_prepare_cpus
to hisi_common_smp_prepare_cpus.

the hip01 will use hisi_common_smp_prepare_cpus in its
struct smp_operations.
Signed-off-by: NWang Long <long.wanglong@huawei.com>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Enable Hisilicon HiP01 SoC. This HiP01 SoC series support both
one core or dual cores and quad cores. The core is Cortex A9.
Signed-off-by: NWang Long <long.wanglong@huawei.com>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Add the support of Hisilicon HiP01 debug uart.
The uart of hip01 is 8250 compatible.
Signed-off-by: NWang Long <long.wanglong@huawei.com>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

The Rockchip support is not limited to Cortex-A9 socs anymore and its
presence may confuse people reading /proc/cpuinfo. So remove the core
specific part.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Tested-by: NDoug Anderson <dianders@chromium.org>

This patch changes the description of the low-level-debug port. SoC mt8127 and
mt6592 have the same uart port and the same mapping. We just change the
description to add low-level-debug to mt6592.
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>

The upcoming MTK pinctrl driver have a big pin table for each SoC
and we don't want to bloat the kernel binary if we don't need it.
Add config options so we can build for one SoC only.
Signed-off-by: NYingjoe Chen <yingjoe.chen@mediatek.com>
Signed-off-by: NHongzhou Yang <hongzhou.yang@mediatek.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>

CSRatlas7 is next-gen auto SoC from CSR.
It could bring to customers most integrated SoC solution:
- World leading Bluetooth 4.0 and GNSS baseband
- Audio processing, analog CODEC and ADC by DSP
- Analog video input
- SDR accelerators
- CAN bus support by Cortex-M3
Signed-off-by: NZhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>

This patch moves to debug_ll_io_init(), then finally drops CSR map_io()
machine callbacks.
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>