1. 11 8月, 2011 1 次提交
  2. 13 7月, 2011 1 次提交
  3. 12 7月, 2011 1 次提交
  4. 10 6月, 2011 3 次提交
    • B
      e1000e: Clear host wakeup bit on 82577/8 without touching PHY page 800 · 3ebfc7c9
      Bruce Allan 提交于
      The Host Wakeup Active bit in the PHY Port General Configuration register
      (page 769 register 17) must be cleared after every PHY reset to prevent an
      unexpected wake signal from the PHY. Originally, this was accomplished by
      simply reading the PHY Wakeup Control register on page 800 which clears the
      Host Wakeup Active bit as a side-effect. Unfortunately, a hardware bug on
      the 82577 and 82578 PHY can cause unexpected behavior when registers on
      page 800 are accessed while in gigabit mode.
      
      This patch changes the remaining instances when the Host Wakeup Active bit
      needs to be cleared while possibly in gigabit mode by accessing the Port
      General Configuration register directly instead of accessing any register
      on page 800.
      Signed-off-by: NBruce Allan <bruce.w.allan@intel.com>
      Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      3ebfc7c9
    • B
      e1000e: access multiple PHY registers on same page at the same time · 2b6b168d
      Bruce Allan 提交于
      Doing a PHY page select can take a long time, relatively speaking. This
      can cause a significant delay when updating a number of PHY registers on
      the same page by unnecessarily setting the page for each PHY access. For
      example when going to Sx, all the PHY wakeup registers (WUC, RAR[], MTA[],
      SHRAR[], IP4AT[], IP6AT[], etc.) on 82577/8/9 need to be updated which
      takes a long time which can cause issues when suspending.
      
      This patch introduces new PHY ops function pointers to allow callers to
      set the page directly and do any number of PHY accesses on that page.
      This feature is currently only implemented for 82577, 82578 and 82579
      PHYs for both the normally addressed registers as well as the special-
      case addressing of the PHY wakeup registers on page 800. For the latter
      registers, the existing function for accessing the wakeup registers has
      been divided up into three- 1) enable access to the wakeup register page,
      2) perform the register access and 3) disable access to the wakeup register
      page. The two functions that enable/disable access to the wakeup register
      page are necessarily available to the caller so that the caller can restore
      the value of the Port Control (a.k.a. Wakeup Enable) register after the
      wakeup register accesses are done.
      
      All instances of writing to multiple PHY registers on the same page are
      updated to use this new method and to acquire any PHY locking mechanism
      before setting the page and performing the register accesses, and release
      the locking mechanism afterward.
      
      Some affiliated magic number cleanup is done as well.
      Signed-off-by: NBruce Allan <bruce.w.allan@intel.com>
      Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      2b6b168d
    • B
      e1000e: 82579 intermittently disabled during S0->Sx · 99730e4c
      Bruce Allan 提交于
      When repeatedly cycling Sx->S0 states with the network cable unplugged,
      the 82579 PHY may not initialize as expected and may require a full power
      cycle to recover functionality to the device.  Workaround this by testing
      access of the PHY registers after resuming; if that returns unexpected
      results toggle the LANPHYPC signal to power cycle the PHY.
      
      This is implemented in the new function e1000_resume_workarounds_pchlan()
      which calls another new function, e1000_toggle_lanphypc_value_ich8lan(),
      which has been created to reduce code duplication (same functionality
      required by a previous workaround).  Also, e1000e_disable_gig_wol_ich8lan
      is now e1000_suspend_workarounds_ich8lan to better reflect what it does.
      Signed-off-by: NBruce Allan <bruce.w.allan@intel.com>
      Tested-by: NAaron Brown <aaron.f.brown@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      99730e4c
  5. 27 4月, 2011 1 次提交
  6. 14 4月, 2011 2 次提交
  7. 24 1月, 2011 1 次提交
  8. 14 1月, 2011 1 次提交
  9. 10 1月, 2011 2 次提交
  10. 11 12月, 2010 2 次提交
  11. 29 10月, 2010 1 次提交
  12. 01 10月, 2010 2 次提交
  13. 03 8月, 2010 1 次提交
  14. 24 6月, 2010 1 次提交
  15. 19 6月, 2010 4 次提交
  16. 06 5月, 2010 1 次提交
  17. 28 4月, 2010 1 次提交
  18. 27 3月, 2010 2 次提交
  19. 17 3月, 2010 1 次提交
  20. 05 2月, 2010 1 次提交
  21. 21 1月, 2010 1 次提交
  22. 14 1月, 2010 4 次提交
  23. 03 12月, 2009 2 次提交
  24. 02 12月, 2009 2 次提交
  25. 22 11月, 2009 1 次提交
    • B
      e1000e: update Tx Unit hang detection message · 41cec6f1
      Bruce Allan 提交于
      The Tx unit hang detection code in e1000e detects other hangs caused by
      hardware components (e.g. Rx, DMA units), but it is not possible to detect
      exactly which component is hung so it has always assumed a Tx unit hang.
      When dumping a message to the system log because of a hang, this patch adds
      more data to help narrow the cause of the issue and makes the message
      non-Tx-specific.  Because this new code reads PHY registers which can
      sleep, move it off to a workqueue.  This and all previously existing work
      tasks in the driver are now cancelled when the driver is removed.
      Signed-off-by: NBruce Allan <bruce.w.allan@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      41cec6f1