These functions have been introduced by commit 10a8c383 (irq: introduce
entry and exit functions for chained handlers) in asm/mach/irq.h. This
patch moves them to linux/irqchip/chained_irq.h so that generic irqchip
drivers do not rely on architecture specific header files.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Tested-by: NMarc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>

CONFIG_HOTPLUG is going away as an option so __devinit is no longer
needed.
Signed-off-by: NBill Pemberton <wfp5p@virginia.edu>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Currently, unlike the non-DT probe where the gpio base is specified
with pdev->id, the DT probe uses the base dynamically allocated by
gpio core, which uses a completely different numbering scheme.  This
causes two issues to user space applications which access sysfs entry
/sys/class/gpio/gpioN.

* It breaks the compatibility with user space applications between
  non-DT and DT kernels.

* It's not intuitive and sometimes hard for users to map the Linux
  gpio number to the actual hardware pin.

Use alias to identify the gpio port/bank, and then the gpio base
can be specified with port id to solve above issues.  If alias is not
defined in device tree, the base number dynamically allocated by gpio
core will be used.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Tested-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

With commit 3e11f7b8 (gpio/generic: initialize basic_mmio_gpio shadow
variables properly) in place, the shadow variables initialization is
being done in generic driver bgpio_init call.

Remove the redundant shadow variables initialization from gpio-mxc
driver.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Tested-by: NDirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Some mxc processors have an edge_sel feature, which allows the IRQ to be
triggered by any edge.

This patch makes use of this feature if available, which skips mxc_flip_edge().

Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: NSascha Hauer <kernel@pengutronix.de>
Cc: <linux-arm-kernel@lists.infradead.org>
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The chained handler was set for the platform device with id == 0.
When the gpio devices are instantiated by a device tree, all have id ==
-1 and so the handler was unset resulting in unusable gpio irqs on
i.MX21 and i.MX27 (when using oftree).
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Move irq_domain_add_legacy call from imx*-dt.c into gpio driver and
have the gpio driver adopt irqdomain support for both DT and non-DT
boot.

With all imx platform code converted from static gpio irq number
computation to use run-time gpio_to_irq call, we can now use
irq_alloc_descs and irqdomain support to dynamically get irq_base
and have the mapping between gpio and irq number available without
using virtual_irq_start and MXC_GPIO_IRQ_START.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Acked-by: NDong Aisheng <dong.aisheng@linaro.org>

It fixes the issue in gpio-generic that commit fb149218 (gpio/mxc: add
missing initialization of basic_mmio_gpio shadow variables) manged to
fix in gpio-mxc driver, so that other platform specific drivers do not
suffer from the same problem over and over again.

Changes since v1:
* Turn the last parameter of bgpio_init() "bool big_endian" into
  "unsigned long flags" and give those really quirky hardwares a
  chance to tell that reg_set and reg_dir are unreadable.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
[grant.likely: Fix big-endian usage to explicitly set BBGPIOF_BIG_ENDIAN]
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

A pending cleanup will mean that module.h won't be implicitly
everywhere anymore.  Make sure the modular drivers in gpio
are actually calling out for <module.h> explicitly in advance.
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>

The mx3_gpio_irq_handler() is also called on imx6q which has GIC as
the primary interrupt controller.  As GIC implements the fasteoi flow
control, we need to add chained_irq_enter/exit() to
mx3_gpio_irq_handler() for signaling EOI, otherwise system will hang
whenever there is a gpio irq triggered.

v2: use chained_irq_{enter,exit}()
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

As irq_to_gpio() is only being used by gpio-mxc driver, it should be
moved from mach/gpio.h into gpio-mxc.c.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

It adds .to_irq support for gpio chip, so that __gpio_to_irq in
gpiolib becomes usable.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The following commit renames irq_gc_ack() to irq_gc_ack_set_bit(),
and makes gpio-mxc and gpio-mxs fail to build.

  659fb32d
  genirq: replace irq_gc_ack() with {set,clr}_bit variants (fwd)

The patch fixed a couple of typo of comma to semicolon.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

The patch adds device tree probe support for gpio-mxc driver.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

The patch removes all the uses of cpu_is_mx().  Instead, it utilizes
platform_device_id to distinguish the different gpio types, IMX1_GPIO
on i.mx1, IMX21_GPIO on i.mx21 and i.mx27, IMX31_GPIO on all other
i.mx SoCs.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

The bgpio_init() function does not initialise the shadow register for
the GPIO direction register. Thus, when configuring the first GPIO with
gpio_set_direction() all other GPIOs of the same bank will be
configured as inputs. Since the bgpio layer cannot know whether the
register is readable, the initialisation should be done by the caller
of bgpio_init().

Also, the 'data' shadow variable that is used inside basic_mmio_gpio
to cache the current value of the GPIO_DR register is initialised from
the GPIO_PSR register within bgpio_init(). Thus when setting the
output value of a certain GPIO, the other GPIO outputs of the same
bank will be set or cleared depending on the pin state of the GPIO
inputs during bgpio_init().
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

When calling gpio_get_value, the gpio number other than bit offset
should be passed as the argument.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

The patch converts gpio-mxc driver to use generic irq chip.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

The gpio-mxc controller complies with basic_mmio_gpio library.  The
patch convert the driver to use the library.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

The patch makes necessary changes on gpio-mxc as below to turn it
into an upstanding gpio driver.

 * Add a list to save all mx2 ports references, so that
   mx2_gpio_irq_handler can walk through all interrupt status
   registers

 * Use readl/writel to replace mach-specific accessors
   __raw_readl/__raw_writel

 * Change mxc_gpio_init into mxc_gpio_probe function

 * Move "struct mxc_gpio_port" into gpio-mxc.c, as it needs not to
   be public at all, and also make some other cleanup on
   plat-mxc/include/mach/gpio.h at the same time

And the patch then migrates mach-imx and mach-mx5 to the updated
driver by adding corresponding platform devices.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NOlof Johansson <olof@lixom.net>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

GPIO drivers are getting moved to drivers/gpio for cleanup and
consolidation.  This patch moves the plat-mxc driver.  Follow up
patches will clean it up and make it a fine upstanding gpio driver.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

The irq_set_wake() function of the gpio irq_chip calls
enable/disable_irq_wake() on the demultiplex interrupt. That leads to
a lockdep warning "INFO: possible recursive locking detected" because
irq_set_type() is called under irq_desc->lock and the *_irq_wake()
calls take irq_desc->lock of the demux interrupt.

Tell lockdep that the gpio irqs are in a different lock class.

Documentation/SubmitChecklist:
 15: All codepaths have been exercised with all lockdep features enabled.

That's a non-optional requirement, AFAICT.
Reported-and-tested-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
LAKML-Reference: alpine.LFD.2.00.1104041416290.19945@localhost6.localdomain6
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Use irq_set_chip_and_handler() instead. Converted with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Convert to the new function names. Automated with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

This saves us from soc level dispatching in generic files
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NAlexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>

Add core definitions and memory map, gpio, irq, iomux, uart device
support.
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Additionally convert some known to be good usages to the new
names.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Some usages of ARCH_MX25 are assuming that if it is
defined the other SoCs are undefined.  Use SOC_IMX25 for the save
places.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

To use common macros to define the gpio ports for imx{1,21,25,27} the
existing ones had to made more general and a few more base address defines
were necessary.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

This finally gets rid of mach-imx/devices.c.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Add function definition for irq_chip.set_wake to enable GPIO to
wake-up the system.

This patch has been tested on a MX51 Babbage system that had suspend
code implemented. The set_wake implementation is necessary for a
GPIO to wake up a system from suspend.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Documentation/gpio.txt specifies that the value argument to
gpio_set_value() should be handled as a boolean (E.G. != 0 is high),
so use the same logic as in _set_direction().
Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The GPIO registers need protection from concurrent access for operations that
are not atomic.

Cc: stable@kernel.org
Cc: Juergen Beisert <j.beisert@pengutronix.de>
Cc: Daniel Mack <daniel@caiaq.de>
Reported-by: rpkamiak@rockwellcollins.com
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The i.MX51 generates 2 IRQ for each GPIO bank : one for gpio 0 to 15
and one for gpio 16 to 31.
Actually only the lower IRQ is registered so register the second one.
Signed-off-by: NEric Bénard <eric@eukrea.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Register the gpio irqs on Freescale's MX51 Babbage HW.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NAmit Kucheria <amit.kucheria@canonical.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>