Eliminate need for linearization when reading from the hardware and
write to the transfer buffers directly.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Eliminate need for linearization when writing to the hardware and
read from the transfer buffers directly.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Determine need for byte swap only once and store it in new member
swab in struct fsl_espi.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

ESPI has a max and min supported SPI frequency, determined by the
clock divider range. Set master->min_speed_hz/max_speed_hz to inform
the SPI core about these limits.
Then the SPI core handles cases where a transfer requests a frequency
outside the supported range.

So far the driver simply set the lowest supported frequency if the
requested frequency was below the supported range. This is not
necessarily an appropriate action as the device might not support
frequencies greater than the requested one.
With this patch the SPI core will reject transfers requesting a
too low frequency.

The check in fsl_espi_setup can be removed because the SPI core sets
spi->max_speed_hz to master->max_speed_hz if it's not set already.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Simplify of_fsl_espi_suspend a little.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

After having removed all code dependencies we can make fsl-espi
completely independent of fsl-lib now.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Only few members of struct mpc8xxx_spi are relevant for fsl-espi.
Therefore replace it with a ESPI-specific struct fsl_espi.
Replace variable names mpc8xxx_spi and mspi with espi.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The register initialization is the same in fsl_espi_probe and in
of_fsl_espi_resume. Therefore factor it out into fsl_espi_init_regs.

It was actually a bug that CSMODE_BEF and CSMODE_AFT were not set
in of_fsl_espi_resume. Seems like nobody ever used values other
than zero for these parameters.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Very little from struct spi_mpc8xxx_cs is relevant for fsl-espi.
Therefore replace it with struct fsl_espi_cs.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Very little of the library functions mpc8xxx_spi_probe and
of_mpc8xxx_spi_probe is relevant for fsl-espi.

Therefore migrate the relevant parts to fsl-espi (considering
that get_brgfreq() always returns -1 on systems with ESPI)
and remove use of these functions.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

There's no need to access mpc8xxx_spi->irq, we can use function
parameter irq directly.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Change the check to access property "mode" directly.
This allows us to get rid of mpc8xxx_spi->flags in a subsequent
patch in this patch series as it's used nowhere else.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Use master->num_chipselect directly instead of pdata->max_chipselect.
In this context let of_fsl_espi_get_chipselects return max_chipselect.

This change allows us to get rid of struct fsl_spi_platform_data
completely in the fsl-espi driver.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Don't set pdata->cs_control as it's nowhere used in fsl-espi and fsl-lib.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Remove pdata->initial_spmode as it is nowhere set.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

This patch adds support for dual output read mode.

It was successfully tested on a P1014-based device with S25FL128S
SPINOR flash. With 50MHz SPI clock the read rate is 11MByte/s.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

This patch adds support for ESPI RXSKIP mode. This mode is optimized
for flash reads:
- sends a number of bytes and then reads a number of bytes
- shifts out zeros automatically when reading

Supporting RXSKIP mode is a prerequisite for supporting dual output
read mode.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

There's no need to bother the chip if the mode doesn't change.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Resetting the chip to a default transfer mode after each transfer
doesn't provide any benefit. Therefore remove this call.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

According to NXP ESPI datasheet, the SPI clock rate is:

    spi_clk = System_Clock / ( 2 * DIV16 * ( 1 + PM ) )

Where System_Clock is the platform clock divided by 2,
DIV16 may be 1 or 16, and PM is a 4 bits integer (0 to 15).

Isolating PM on the expression, we get:

    PM = (System_Clock / ( 2 * DIV16 * spi_clk ) ) - 1

Where System_Clock = mpc8xxx_spi->spibrg / 2, spi_clk = hz,
and DIV16 = 1 or DIV16 = 16. So,

    PM = (mpc8xxx_spi->spibrg / ( 4 * hz) ) - 1
or
    PM = (mpc8xxx_spi->spibrg / ( 16 * 4 * hz) ) - 1

Current spi-fsl-espi driver can't configure the HW for all
supported clock rates. It filters out clock rates for PM = 0
and PM = 1.

This patch allows all range of supported clock rates to be
configured on the ESPI controller.
Signed-off-by: NPaulo Zaneti <paulo.zaneti@datacom.ind.br>
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

spin_lock is used to obtain the spinlock, so spin_unlock
has to be used here.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Currently the driver polls in the ISR for enough bytes in the RX FIFO.
An ISR should never do this.
Change it to read as much as possible whenever the ISR is called.
This also allows to significantly simplify the code.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

So far an interrupt is triggered whenever there's at least one byte
in the RX FIFO. This results in a unnecessarily high number of
interrupts.
Change this to generate an interrupt if
- RX FIFO is half full (except if all bytes to read fit into the
  RX FIFO anyway)
- end of transfer has been reached

This way the number of interrupts can be significantly reduced.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Extend and improve transfer error handling
- in case of timeout report also number of remaining rx bytes
- in case of timeout return ETIMEDOUT instead of EMSGSIZE
- add sanity checks after all bytes have been sent / read:
 - check that HW has flag SPIE_DON set
 - check that RX / TX FIFO are empty
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The ESPI spec mentions no requirement to turn off the ESPI unit prior
to changing the mode. Most likely the ESPI unit is only turned off to
clear the FIFO's as before this patch series single bytes could
remain in the TX FIFO after transfer end.
Therefore remove disabling / re-enabling the ESPI unit.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Now that we introduced element tx_len in struct mpc8xxx_spi let's
rename element len to rx_len as it actually is the number of bytes to
receive. In addition make it unsigned.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

This change addresses two issues:
- If the TX FIFO is full the ISR polls until there's free space again.
  An ISR should never wait for something.
- Currently the number of bytes to transfer is rounded up to the next
  multiple of 4. For most transfers therefore few bytes remain in the
  TX FIFO after end of transfer.
  This would cause the next transfer to fail and as a workaround the
  ESPI block is disabled / re-enabled in fsl_espi_change_mode.
  This seems to clear the FIFO's (although it's not mentioned in the
  spec).

With this change the TX FIFO is filled as much as possible initially
and whenever the ISR is called. Also the exact number of bytes is
transferred.
The spinlock protects against a potential race if the first interrupt
occurs whilst the TX FIFO is still being initially filled.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

SPI_QE_CPU_MODE doesn't exist for ESPI and is set by of_mpc8xxx_spi_probe
based on DT property "mode". This property is not defined for ESPI,
see Documentation/devicetree/bindings/spi/fsl-spi.txt.
So print an error message and bail out if SPI_QE_CPU_MODE is set.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Commit 5c0ba577 ("spi: fsl-espi: avoid processing uninitalized
data on error") applied fine to stable but caused a merge conflict
on next. This patch fixes that.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

When we get a spurious interrupt in fsl_espi_irq, we end up
processing four uninitalized bytes of data, as shown in this
warning message:

   drivers/spi/spi-fsl-espi.c: In function 'fsl_espi_irq':
   drivers/spi/spi-fsl-espi.c:462:4: warning: 'rx_data' may be used uninitialized in this function [-Wmaybe-uninitialized]

This adds another check so we skip the data in this case.

Fixes: 6319a680 ("spi/fsl-espi: avoid infinite loops on fsl_espi_cpu_irq()")
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NMark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org

The code in fsl_espi_tx_buf_lsb and parts of fsl_espi_setup_transfer
look very weird and don't reflect the ESPI spec.
ESPI stores values with <= 8 bit word size right justified as 8 bit
value and values with > 8 bit word size right justified as 16 bit
value. Therefore no such shifting is needed.
Only case MSB-first with 8 bit word size is correctly handled,
and most likely nobody ever used this driver with a different config.

On ESPI only the case LSB-first with word size > 8 bit needs a
special handling. In this case a little endian 16 bit value has
to be written to the TX FIFO what requires a byte swap as the
host system is big endian.
The same applies to reading from the RX FIFO.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

According to the ESPI spec MSB-first transfers are supported for
word size 8 and 16 only.

Check for this and reject MSB-first transfers with other word sizes.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

of_property_read_u32 is better here than generic of_get_property:
- implicit endianness conversion if needed
- implicit checking of size of property
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The return value of fsl_espi_probe (currently struct spi_master *)
is just used for checking whether an error occurred.
Change the return value type to int and simplify the code.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Simplify of_fsl_espi_probe.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Remove an unused variable.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Add definition of further register bits for use in upcoming
driver extensions and improve current bit definitions:
- use BIT macro
- use bit names as in the chip spec
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Change register access to the method used in other drivers too.
- use register names as in the chip spec for constants
- avoid hard to read statements like
  __be32 __iomem *espi_mode = &reg_base->mode
- get rid of old powerpc-specific functions like in_8

In addition annotate reg_base in struct mpc8xxx_spi as __iomem.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Simplify the interrupt handler a little. In addition don't call
fsl_espi_cpu_irq() if no event bit is set.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

If t is not null then the SPI core takes care that bits_per_word and
speed_hz are populated. This allows to simplify fsl_espi_setup_transfer.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>