Instead of reading the silicon version from ROM, we should
read the SREV register from the IIM.

Freescale has dropped all support for MX51 REV1.0, only MX51
REV 2.0 and 3.0 are valid.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add iomux, clocks,  and memory map for Freescale's MX53 SoC.
Add cpu_is_mx53 function to common.h.
Add 3 more banks of gpio's to mxc_gpio_ports.
Add MX53 phys offset address.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Currently, only two operating points: 160Mhz and 800Mhz.
the operating points are tested on babbage 3.0
Signed-off-by: NYong Shen <yong.shen@linaro.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Prepare for i.MX5 SoC code by adding the relevant macros to common plat-mxc
code.
Signed-off-by: NAmit Kucheria <amit.kucheria@canonical.com>

This has the addional effect that the macros CSCR_U, CSCR_L and CSCR_A
are not used anymore in mach-pcm038.c and mach-qong.c.  These still use
the deprecated IO_ADDRESS macro and shouldn't be used in new code.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Holger Schurig <hs4233@mail.mn-solutions.de>
Cc: Dmitriy Taychenachev <dimichxp@gmail.com>

don't use

	IO_ADDRESS($base) + $offset

but

	IO_ADDRESS($base + $offset)
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Holger Schurig <hs4233@mail.mn-solutions.de>
Cc: Rabin Vincent <rabin@rab.in>
Cc: "Agustín Ferrín Pozuelo" <gatoguan-os@yahoo.com>
Cc: Javier Martin <javier.martin@vista-silicon.com>
Cc: Valentin Longchamp <valentin.longchamp@epfl.ch>
Cc: Daniel Mack <daniel@caiaq.de>
Cc: Dmitriy Taychenachev <dimichxp@gmail.com>

Signed-off-by: NDmitriy Taychenachev <dimichxp@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

We had hardcoded cpu_is_ macros for mxc architectures till now. As we
want to run the same kernel on i.MX31 and i.MX35 this patch adds cpu_is_
macros which expand to 0 or 1 if only one architecture is compiled in and
only check for the cpu type if more than one architecture is compiled
in.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

* define new CONFIG_ARCH_MX21 (this one is currently mutually exclusive to
  CONFIG_ARCH_MX27, but this might change)
* splits one header file. Memory definitions, interrupt sources,
  DMA channels are split into common part, i.MX27 specific and i.MX21
  specific.
* guard access to UART5/UART6, which don't exist on i.MX21
Signed-off-by: NHolger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

* adds Kconfig variables
* specifies different physical address for i.MX21 because of the
  different memory layouts
* disables support for UART5/UART6 in the i.MX serial driver
  (the i.MX21 doesn't have those modules)

Based on code from "Martin Fuzzey" <mfuzzey@gmail.com>
Signed-off-by: NHolger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This adds macros to get CSCR upper, lower and additional registers.
These registers are needed to configure a chip select line. The offset
layouts of these Registers are identical on mx27 and mx31, hence we can
use the macros in generic way
Signed-off-by: NLuotao Fu <l.fu@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add basic i.MX27 CPU support
Signed-off-by: NJuergen Beisert <j.beisert@pengutronix.de>

Simplify architecture's irq headers and sources, to share these files
between MXC3 and MXC2.
Signed-off-by: NJuergen Beisert <j.beisert@pengutronix.de>

This patch adds timer support for the i.MX machine family. This code can
be used on the following machs:

 - i.MX1 (tested)
 - i.MX2 (i.MX21 (to be tested), i.MX27 (tested))
 - i.MX3 (i.MX31 (tested))

TODO: It seems impossible to build a kernel for more than one CPU because the
timer do not follow the platform device rules. So it does only work if
timer 1 can be accessed on all CPUs at the same address.
Signed-off-by: NJuergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

From: Juergen Beisert <j.beisert@pengutronix.de>

This patch separates the current code into i.MX2 and i.MX3 and modifies
the Kconfig files to reflect this separation in the menus.

Things happend since last review:
 - make i.MX3 compile again
 - fix some structure names to be conform with all the shared/common
   sources from i.MX1/i.MX2

Previous changes:
 - stay conform to other Kconfig files (note from Russell King)
Signed-off-by: NJuergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

From: Juergen Beisert <j.beisert@pengutronix.de>

Clean up current header files from doxygen style comments. There are
probably more such comments left, but we start with these.

Things happend since last review:
 - needless blank lines removed (note by Russell King)
 - re-format comments (note by Ross Wille)
Signed-off-by: NJuergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: NRoss Wille <wille@freescale.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds the foundation pieces for
the Freescale MXC platforms, including
i.MX2 and i.MX3 based systems.

The bare-bones MX31 support in this patch
boots to the rootdev panic with 8250 serial
console configured "console=ttyS0,115200".
It assumes that Redboot is the boot loader.
Signed-off-by: NQuinn Jensen <quinn.jensen@freescale.com>
Acked-by: NLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>