- 30 1月, 2013 2 次提交
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由 Ulrich Hecht 提交于
sh73a0 deals fine with disabling any core, so we should permit it. Signed-off-by: NUlrich Hecht <ulrich.hecht@gmail.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Ulrich Hecht 提交于
Method to disable any core to be used on platforms where CPU0 does not need special treatment. Signed-off-by: NUlrich Hecht <ulrich.hecht@gmail.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 29 1月, 2013 2 次提交
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由 Simon Horman 提交于
Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Simon Horman 提交于
Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 25 1月, 2013 15 次提交
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由 Kuninori Morimoto 提交于
This patch tidyup scif .irqs settings by using SCIx_IRQ_MUXED() macro. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Simon Horman 提交于
This device also requires a voltage regulator which should be defined in a board-specific maner. An example dts snipped follows. / { fixedregulator1v8: fixedregulator@0 { compatible = "regulator-fixed"; regulator-name = "fixed-1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; }; &mmcif { vmmc-supply = <&fixedregulator1v8>; vqmmc-supply = <&fixedregulator1v8>; }; Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Simon Horman 提交于
Allow a minimal setup of the sh73a0 SoC using a flattened device tree. In particular, Configure the i2c controllers using a flattened device tree. SCI serial controller and CMT clock source, whose drivers do not yet support configuration using a flattened device tree, are still configured using C code in order to allow booting of a board with this SoC. *** Please note that the clock initialisation scheme used in this patch does not currently work with SMP as there is a yet to be resolved lock-up in workqueue initialisation. CONFIG_SMP must be disabled when using this code. *** Includes update from Thierry Reding to no longer use gic_handle_irq() Cc: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> fix
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由 Simon Horman 提交于
This allows the GIC interrupt controller of the sh73a0 SoC to be initialised using a flattened device tree blob. It does not allow the INTC interrupt controller which is also present on the sh73a0 SoC to be enabled via device tree. Nor does it handle sharing of interrupts between the GIC and INTC interrupt controllers. This limits the usefulness of this code to applications which only wish to access devices which use interrupts that can be handled by the GIC interrupt controller. Other applications should, for now, continue using non-device tree initialisation of the sh72a0 interrupt controllers. Includes update to use irqchip_init() by Thierry Reding Cc: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Bastian Hecht 提交于
Add the capability to add and remove CPUs on the fly. The Cortex-A9 offers the possibility to take single cores out of the MP Core. We add this capabilty taking care that caches are kept coherent. For verifying the shutdown we rely on the internal SH73A0 Power Status Register PSTR. Signed-off-by: NBastian Hecht <hechtb+renesas@gmail.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Bastian Hecht 提交于
When booting secondary CPUs we have used the main CPU to set up the Snoop Control Unit flags of these CPUs. It is a cleaner approach if every CPU takes care of its own flags. We avoid the need for locking and the program logic is more concise. With this patch the file headsmp-sh73a0.S is added that contains a startup vector for secondary CPUs that sets up its own SCU flags. Further in sh73a0_smp_prepare_cpus() we can rely on the generic ARM helper scu_power_mode(). This is possible as we don't cross borders anymore (every CPU handles its own flags) and need no locking. So we can throw out the needless function modify_scu_cpu_psr(). Signed-off-by: NBastian Hecht <hechtb+renesas@gmail.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Bastian Hecht 提交于
Add the lighest possible sleep mode on Cortex-A9 cores: CPU sleep. It is entered by a simple dsb and wfi instruction via cpu_do_idle(). As just clocks are stopped there is no need to save or restore any state of the system. Signed-off-by: NBastian Hecht <hechtb+renesas@gmail.com> Acked-by: NMagnus Damm <damm@opensource.se> [ horms@verge.net.au: Added missing includes ] Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Bastian Hecht 提交于
Add the lighest possible sleep mode on Cortex-A9 cores: CPU sleep. It is entered by a simple dsb and wfi instruction via cpu_do_idle(). As just clocks are stopped there is no need to save or restore any state of the system. Signed-off-by: NBastian Hecht <hechtb+renesas@gmail.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
sh7372_add_early_devices_dt() and sh7372_add_standard_devices_dt() are defined as global functions in arch/arm/mach-shmobile/setup-sh7372.c, but their declarations are missing. Add them to common.h, where similar functions for this and other SoC types are already declared. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Guennadi Liakhovetski 提交于
According to the Cortex A8 TRM the L2 cache should be first cleaned and then disabled. Fix the swapped order on sh7372. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
When booting with DT, devices are named differently. To get their clocks additional entries have to be added to the lookup table. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Magnus Damm 提交于
Use sh73a0_set_wake() for external IRQ signals on sh73a0. The sh73a0 IRQ hardware for external IRQ pins consists of the INTCA interrupt controller and the GIC together doing their best to limp along. These external IRQ pins are treated as a special case where interrupts need to be managed in both interrupt controllers in parallel. The ->irq_set_wake() callback for the external IRQ pins can be dealt with in the same way as INTCA-only without involving the GIC. So this patch updates the external IRQ pin code for sh73a0 to no longer involve the GIC. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
div4_clks's bitmap of sh73a0 was wrong. This patch is based on v2.0 datasheet. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
This patch enabled TMU0 timer on r8a7740. But TMU1 timer is not supported yet Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Sachin Kamat 提交于
linux/dma-mapping.h was included twice. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 24 1月, 2013 1 次提交
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由 Simon Horman 提交于
Conflicts: arch/arm/mach-bcm/board_bcm.c arch/arm/mach-cns3xxx/cns3420vb.c arch/arm/mach-ep93xx/adssphere.c arch/arm/mach-ep93xx/edb93xx.c arch/arm/mach-ep93xx/gesbc9312.c arch/arm/mach-ep93xx/micro9.c arch/arm/mach-ep93xx/simone.c arch/arm/mach-ep93xx/snappercl15.c arch/arm/mach-ep93xx/ts72xx.c arch/arm/mach-ep93xx/vision_ep9307.c arch/arm/mach-highbank/highbank.c arch/arm/mach-imx/mach-imx6q.c arch/arm/mach-msm/board-dt-8960.c arch/arm/mach-netx/nxdb500.c arch/arm/mach-netx/nxdkn.c arch/arm/mach-netx/nxeb500hmi.c arch/arm/mach-nomadik/board-nhk8815.c arch/arm/mach-picoxcell/common.c arch/arm/mach-realview/realview_eb.c arch/arm/mach-realview/realview_pb1176.c arch/arm/mach-realview/realview_pb11mp.c arch/arm/mach-realview/realview_pba8.c arch/arm/mach-realview/realview_pbx.c arch/arm/mach-socfpga/socfpga.c arch/arm/mach-spear13xx/spear1310.c arch/arm/mach-spear13xx/spear1340.c arch/arm/mach-spear13xx/spear13xx.c arch/arm/mach-spear3xx/spear300.c arch/arm/mach-spear3xx/spear310.c arch/arm/mach-spear3xx/spear320.c arch/arm/mach-spear3xx/spear3xx.c arch/arm/mach-spear6xx/spear6xx.c arch/arm/mach-tegra/board-dt-tegra20.c arch/arm/mach-tegra/board-dt-tegra30.c arch/arm/mach-u300/core.c arch/arm/mach-ux500/board-mop500.c arch/arm/mach-ux500/cpu-db8500.c arch/arm/mach-versatile/versatile_ab.c arch/arm/mach-versatile/versatile_dt.c arch/arm/mach-versatile/versatile_pb.c arch/arm/mach-vexpress/v2m.c include/asm-generic/vmlinux.lds.h
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- 15 1月, 2013 1 次提交
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由 Joachim Eastwood 提交于
After "ARM: delete struct sys_timer" board-rm9200-dt fails compilation with the following error: CC arch/arm/mach-at91/board-rm9200-dt.o arch/arm/mach-at91/board-rm9200-dt.c:50:2: error: unknown field 'timer' specified in initializer arch/arm/mach-at91/board-rm9200-dt.c:50:13: error: 'at91rm9200_timer' undeclared here (not in a function) make[1]: *** [arch/arm/mach-at91/board-rm9200-dt.o] Error 1 make: *** [arch/arm/mach-at91] Error 2 This is a fall out from the timer conversion. Fix it by converting board-rm9200-dt to use new timer init function as well. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 13 1月, 2013 13 次提交
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由 Rob Herring 提交于
Now that we have VIC moved to drivers/irqchip and all VIC DT init for platforms using irqchip_init, move gic.h and update the remaining includes. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Hartley Sweeten <hsweeten@visionengravers.com> Cc: Ryan Mallon <rmallon@gmail.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Cc: STEricsson <STEricsson_nomadik_linux@list.st.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: linux-samsung-soc@vger.kernel.org
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由 Rob Herring 提交于
Signed-off-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NJamie Iles <jamie@jamieiles.com>
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由 Rob Herring 提交于
Convert spear DT irq initialization over to use common irqchip_init function. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Rajeev Kumar <rajeev-dlh.kumar@st.com>
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由 Rob Herring 提交于
Now that we have drivers/irqchip, move VIC irqchip to drivers/irqchip. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de>
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由 Rob Herring 提交于
Remove tick.h on s5p64x0 and s5pv210 as they are unused. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: linux-samsung-soc@vger.kernel.org
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由 Rob Herring 提交于
Numerous includes of asm/hardware/vic.h aren't needed, so remove them. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Cc: Ryan Mallon <rmallon@gmail.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Hubert Feurstein <hubert.feurstein@contec.at> Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Cc: STEricsson <STEricsson_nomadik_linux@list.st.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Acked-By: NMaxime Ripard <maxime.ripard@free-electrons.com> Cc: linux-samsung-soc@vger.kernel.org Cc: patches@opensource.wolfsonmicro.com Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Rob Herring 提交于
Now that the VIC initialization sets up the handle_arch_irq pointer, we can remove it for all machines and make it static. Move vic_handle_irq to avoid a forward declaration. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Ryan Mallon <rmallon@gmail.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Hubert Feurstein <hubert.feurstein@contec.at> Cc: Alessandro Rubini <rubini@unipv.it> Cc: STEricsson <STEricsson_nomadik_linux@list.st.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Rajeev Kumar <rajeev-dlh.kumar@st.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NJamie Iles <jamie@jamieiles.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Acked-by: NOlof Johansson <olof@lixom.net> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Rob Herring 提交于
Set handle_arch_irq to vic_handle_irq. Only the first VIC initialized can setup the handler. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Rob Herring 提交于
Move all register defines except VIC_INT_ENABLE and VIC_INT_ENABLE_CLEAR which are used by Samsung. With multi irq handler, vic.h is not included in assembly any more, so we can remove the assembly ifdefs. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Rob Herring 提交于
Now that we have GIC moved to drivers/irqchip and all GIC DT init for platforms using irqchip_init, move gic.h and update the remaining includes. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Anton Vorontsov <avorontsov@mvista.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Samuel Ortiz <sameo@linux.intel.com>
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由 Rob Herring 提交于
Convert all GIC DT initialization over to use common irqchip_init function. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Acked-by: NShawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org>
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由 Rob Herring 提交于
Now that we have drivers/irqchip, move GIC irqchip to drivers/irqchip. This is necessary to share the GIC with arm and arm64. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de>
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由 Rob Herring 提交于
Now that the GIC initialization sets up the handle_arch_irq pointer, we can remove it for all machines and make it static. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Anton Vorontsov <avorontsov@mvista.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: NTony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: NStephen Warren <swarren@nvidia.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Acked-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NOlof Johansson <olof@lixom.net> Acked-by: NArnd Bergmann <arnd@arndb.de>
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- 11 1月, 2013 6 次提交
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由 Rob Herring 提交于
Set handle_arch_irq to gic_handle_irq. Only the first GIC initialized can setup the handler. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Rob Herring 提交于
In preparation of moving gic code to drivers/irqchip, remove the direct platform dependencies on gic_raise_softirq. Move the setup of smp_cross_call into the gic code and use arch_send_wakeup_ipi_mask function to trigger wake-up IPIs. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: NStephen Warren <swarren@nvidia.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Rob Herring 提交于
With multi irq handler and all GIC users converted to it, we don't need asm/hardware/gic.h to be included in assembly. Clean-up ifdefs and unnecessary includes. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Srinidhi Kasagar 提交于
The commit 7d28e3ea ("ARM: ux500: wake secondary cpu via resched") makes use of schedule IPI to wake up the secondary core which seems incorrect. Rather use SGI0. Signed-off-by: Nsrinidhi kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Thomas Petazzoni 提交于
In order to allow irqchip drivers to register their IRQ handling function as the parent IRQ controller handler function, we provide a convenience function. This will avoid poking directly into the global handle_arch_irq variable. Suggested by Arnd Bergmann. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> [Rob Herring: remove warning. 1st one to initialize wins.] Signed-off-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Thomas Petazzoni 提交于
With the recent creation of the drivers/irqchip/ directory, it is desirable to move irq controller drivers here. At the moment, the only driver here is irq-bcm2835, the driver for the irq controller found in the ARM BCM2835 SoC, present in Rasberry Pi systems. This irq controller driver was exporting its initialization function and its irq handling function through a header file in <linux/irqchip/bcm2835.h>. When proposing to also move another irq controller driver in drivers/irqchip, Rob Herring raised the very valid point that moving things to drivers/irqchip was good in order to remove more stuff from arch/arm, but if it means adding gazillions of headers files in include/linux/irqchip/, it would not be very nice. So, upon the suggestion of Rob Herring and Arnd Bergmann, this commit introduces a small infrastructure that defines a central irqchip_init() function in drivers/irqchip/irqchip.c, which is meant to be called as the ->init_irq() callback of ARM platforms. This function calls of_irq_init() with an array of match strings and init functions generated from a special linker section. Note that the irq controller driver initialization function is responsible for setting the global handle_arch_irq() variable, so that ARM platforms no longer have to define the ->handle_irq field in their DT_MACHINE structure. A global header, <linux/irqchip.h> is also added to expose the single irqchip_init() function to the reset of the kernel. A further commit moves the BCM2835 irq controller driver to this new small infrastructure, therefore removing the include/linux/irqchip/ directory. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: NStephen Warren <swarren@wwwdotorg.org> Reviewed-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NArnd Bergmann <arnd@arndb.de> [rob.herring: reword commit message to reflect use of linker sections.] Signed-off-by: NRob Herring <rob.herring@calxeda.com>
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