1. 14 6月, 2016 1 次提交
  2. 21 4月, 2016 1 次提交
  3. 14 4月, 2016 1 次提交
  4. 04 4月, 2016 4 次提交
  5. 18 3月, 2016 2 次提交
    • R
      ath10k: move mgmt descriptor limit handle under mgmt_tx · cac08552
      Rajkumar Manoharan 提交于
      Frames that are transmitted via MGMT_TX are using reserved descriptor
      slots in firmware. This limitation is for the htt_mgmt_tx path itself,
      not for mgmt frames per se. In 16 MBSSID scenario, these reserved slots
      will be easy exhausted due to frequent probe responses. So for 10.4
      based solutions, probe responses are limited by a threshold (24).
      
      management tx path is separate for all except tlv based solutions. Since
      tlv solutions (qca6174 & qca9377) do not support 16 AP interfaces, it is
      safe to move management descriptor limitation check under mgmt_tx
      function. Though CPU improvement is negligible, unlikely conditions or
      never hit conditions in hot path can be avoided on data transmission.
      Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      cac08552
    • R
      ath10k: handle channel change htt event · 2ce9b25c
      Rajkumar Manoharan 提交于
      Whenever firmware is configuring operating channel during scan or
      home channel, channel change event will be indicated to host. In some
      cases (device probe/ last vdev down), target will be configured to
      default channel whereas host is unaware of target's operating channel.
      This leads to packet drop due to unknown channel and kernel log will be
      filled up with "no channel configured; ignoring frame(s)!". Fix that
      by handling HTT_T2H_MSG_TYPE_CHAN_CHANGE event.
      Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      2ce9b25c
  6. 06 3月, 2016 4 次提交
    • M
      ath10k: implement push-pull tx · 426e10ea
      Michal Kazior 提交于
      The current/old tx path design was that host, at
      its own leisure, pushed tx frames to the device.
      For HTT there was ~1000-1400 msdu queue depth.
      
      After reaching that limit the driver would request
      mac80211 to stop queues. There was little control
      over what packets got in there as far as
      DA/RA was considered so it was rather easy to
      starve per-station traffic flows.
      
      With MU-MIMO this became a significant problem
      because the queue depth was insufficient to buffer
      frames from multiple clients (which could have
      different signal quality and capabilities) in an
      efficient fashion.
      
      Hence the new tx path in 10.4 was introduced: a
      pull-push mode.
      
      Firmware and host can share tx queue state via
      DMA. The state is logically a 2 dimensional array
      addressed via peer_id+tid pair. Each entry is a
      counter (either number of bytes or packets. Host
      keeps it updated and firmware uses it for
      scheduling Tx pull requests to host.
      
      This allows MU-MIMO to become a lot more effective
      with 10+ clients.
      Signed-off-by: NMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      426e10ea
    • M
      ath10k: implement updating shared htt txq state · c1a43d97
      Michal Kazior 提交于
      Firmware 10.4.3 onwards can support a pull-push Tx
      model where it shares a Tx queue state with the
      host.
      
      The host updates the DMA region it pointed to
      during HTT setup whenever number of software
      queued from (on host) changes. Based on this
      information firmware issues fetch requests to the
      host telling the host how many frames from a list
      of given stations/tids should be submitted to the
      firmware.
      
      The code won't be called because not all
      appropriate HTT events are processed yet.
      Signed-off-by: NMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      c1a43d97
    • M
      ath10k: add new htt message generation/parsing logic · 839ae637
      Michal Kazior 提交于
      This merely adds some parsing, generation and
      sanity checks with placeholders for real
      code/functionality to be added later.
      Signed-off-by: NMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      839ae637
    • M
      ath10k: refactor tx pending management · 6421969f
      Michal Kazior 提交于
      Tx pending counter logic assumed that the sk_buff
      is already known and hence was performed in HTT
      functions themselves.
      
      However, for the sake of future wake_tx_queue()
      usage the driver must be able to tell whether it
      can submit more frames to firmware before it
      dequeues frame from ieee80211_txq (and thus long
      before HTT Tx functions are called) because once a
      frame is dequeued it cannot be requeud back to
      mac80211.
      
      This prepares the driver for future changes.
      Signed-off-by: NMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      6421969f
  7. 28 1月, 2016 3 次提交
  8. 23 11月, 2015 1 次提交
  9. 13 11月, 2015 1 次提交
    • V
      ath10k: fix peerid configuration in htt tx desc for htt version < 3.4 · d39de991
      Vasanthakumar Thiagarajan 提交于
      Of a word in struct htt_data_tx_desc htt version >= 3.4 firmware uses
      LSB 16-bit for frequency configuration which is used for offchannel tx
      and MSB 16-bit is for peerid. But other firmwares using version 2.X
      (10.1, 10.2.2, 10.2.4 and 10.4) are using 32-bit for peerid in htt tx
      desc. So far no issue is found with the existing code setting peerid and
      freq for HTT version 2.X, this could be mainly because of 0 as frequecy
      (home channel) is being always passed with those firmwares. There may be
      issues when non-zero freq is passed with firmware using < 3.4 htt version.
      To be safe use target_version_major and target_version_minor along with
      htt-op-version before configuring peer id and freq in htt tx desc. This
      patch extends ath10k_mac_tx_frm_has_freq() to check for htt_op_version_tlv
      and uses the helper while setting peerid in htt_tx_desc.
      
      Fixes: 8d6d3624 ("ath10k: fix offchan reliability")
      Signed-off-by: NVasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      d39de991
  10. 05 11月, 2015 1 次提交
  11. 16 10月, 2015 1 次提交
  12. 06 10月, 2015 1 次提交
  13. 09 9月, 2015 1 次提交
  14. 29 7月, 2015 1 次提交
    • D
      ath10k: enable raw encap mode and software crypto engine · ccec9038
      David Liu 提交于
      This patch enables raw Rx/Tx encap mode to support software based
      crypto engine. This patch introduces a new module param 'cryptmode'.
      
       cryptmode:
      
         0: Use hardware crypto engine globally with native Wi-Fi mode TX/RX
            encapsulation to the firmware. This is the default mode.
         1: Use sofware crypto engine globally with raw mode TX/RX
            encapsulation to the firmware.
      
      Known limitation:
         A-MSDU must be disabled for RAW Tx encap mode to perform well when
         heavy traffic is applied.
      
      Testing: (by Michal Kazior <michal.kazior@tieto.com>)
      
           a) Performance Testing
      
            cryptmode=1
             ap=qca988x sta=killer1525
              killer1525  ->  qca988x     194.496 mbps [tcp1 ip4]
              killer1525  ->  qca988x     238.309 mbps [tcp5 ip4]
              killer1525  ->  qca988x     266.958 mbps [udp1 ip4]
              killer1525  ->  qca988x     477.468 mbps [udp5 ip4]
              qca988x     ->  killer1525  301.378 mbps [tcp1 ip4]
              qca988x     ->  killer1525  297.949 mbps [tcp5 ip4]
              qca988x     ->  killer1525  331.351 mbps [udp1 ip4]
              qca988x     ->  killer1525  371.528 mbps [udp5 ip4]
             ap=killer1525 sta=qca988x
              qca988x     ->  killer1525  331.447 mbps [tcp1 ip4]
              qca988x     ->  killer1525  328.783 mbps [tcp5 ip4]
              qca988x     ->  killer1525  375.309 mbps [udp1 ip4]
              qca988x     ->  killer1525  403.379 mbps [udp5 ip4]
              killer1525  ->  qca988x     203.689 mbps [tcp1 ip4]
              killer1525  ->  qca988x     222.339 mbps [tcp5 ip4]
              killer1525  ->  qca988x     264.199 mbps [udp1 ip4]
              killer1525  ->  qca988x     479.371 mbps [udp5 ip4]
      
            Note:
             - only open network tested for RAW vs nwifi performance comparison
             - killer1525 (qca6174 hw2.2) is 2x2 device (hence max 866mbps)
             - used iperf
             - OTA, devices a few cm apart from each other, no shielding
             - tcpX/udpX, X - means number of threads used
      
            Overview:
             - relative Tx performance drop is seen but is within reasonable and
               expected threshold (A-MSDU must be disabled with RAW Tx)
      
           b) Connectivity Testing
      
            cryptmode=1
             ap=iwl6205 sta1=qca988x crypto=open     topology-1ap1sta          OK
             ap=iwl6205 sta1=qca988x crypto=wep1     topology-1ap1sta          OK
             ap=iwl6205 sta1=qca988x crypto=wpa      topology-1ap1sta          OK
             ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta          OK
             ap=qca988x sta1=iwl6205 crypto=open     topology-1ap1sta          OK
             ap=qca988x sta1=iwl6205 crypto=wep1     topology-1ap1sta          OK
             ap=qca988x sta1=iwl6205 crypto=wpa      topology-1ap1sta          OK
             ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta          OK
             ap=iwl6205 sta1=qca988x crypto=open     topology-1ap1sta2br       OK
             ap=iwl6205 sta1=qca988x crypto=wep1     topology-1ap1sta2br       OK
             ap=iwl6205 sta1=qca988x crypto=wpa      topology-1ap1sta2br       OK
             ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br       OK
             ap=qca988x sta1=iwl6205 crypto=open     topology-1ap1sta2br       OK
             ap=qca988x sta1=iwl6205 crypto=wep1     topology-1ap1sta2br       OK
             ap=qca988x sta1=iwl6205 crypto=wpa      topology-1ap1sta2br       OK
             ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br       OK
             ap=iwl6205 sta1=qca988x crypto=open     topology-1ap1sta2br1vlan  OK
             ap=iwl6205 sta1=qca988x crypto=wep1     topology-1ap1sta2br1vlan  OK
             ap=iwl6205 sta1=qca988x crypto=wpa      topology-1ap1sta2br1vlan  OK
             ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br1vlan  OK
             ap=qca988x sta1=iwl6205 crypto=open     topology-1ap1sta2br1vlan  OK
             ap=qca988x sta1=iwl6205 crypto=wep1     topology-1ap1sta2br1vlan  OK
             ap=qca988x sta1=iwl6205 crypto=wpa      topology-1ap1sta2br1vlan  OK
             ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br1vlan  OK
      
            Note:
             - each test takes all possible endpoint pairs and pings
             - each pair-ping flushes arp table
             - ip6 is used
      
           c) Testbed Topology:
      
            1ap1sta:
              [ap] ---- [sta]
      
              endpoints: ap, sta
      
            1ap1sta2br:
              [veth0] [ap] ---- [sta] [veth2]
                 |     |          |     |
              [veth1]  |          \   [veth3]
                  \   /            \  /
                  [br0]            [br1]
      
              endpoints: veth0, veth2, br0, br1
              note: STA works in 4addr mode, AP has wds_sta=1
      
            1ap1sta2br1vlan:
              [veth0] [ap] ---- [sta] [veth2]
                 |     |          |     |
              [veth1]  |          \   [veth3]
                  \   /            \  /
                [br0]              [br1]
                  |                  |
                [vlan0_id2]        [vlan1_id2]
      
              endpoints: vlan0_id2, vlan1_id2
              note: STA works in 4addr mode, AP has wds_sta=1
      
      Credits:
      
          Thanks to Michal Kazior <michal.kazior@tieto.com> who helped find the
          amsdu issue, contributed a workaround (already squashed into this
          patch), and contributed the throughput and connectivity tests results.
      Signed-off-by: NDavid Liu <cfliu.tw@gmail.com>
      Signed-off-by: NMichal Kazior <michal.kazior@tieto.com>
      Tested-by: NMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      ccec9038
  15. 24 7月, 2015 3 次提交
  16. 02 7月, 2015 2 次提交
    • R
      ath10k: configure frag desc memory to target for qca99X0 · d9156b5f
      Raja Mani 提交于
      Pre qca99X0 chipsets follows the model where dynamically allocate
      memory for frag desc on getting new skb for TX. But, this is not
      going to be the case in qca99X0. It expects frag desc memory to be
      allocated at boot time and let the driver to reuse allocated memory
      after every TX completion. So there won't be any dynamic frag memory
      memory allocation in qca99X0 during data transmission.
      
      qca99X0 hardware doesn't need fragment desc address to be programmed
      in msdu descriptor for every data transaction. It needs to know only
      starting address of fragment descriptor at the time of the boot.
      During data transmission, qca99X0 hardware can retrieve corresponding
      frag addr by adding programmed frag desc base addr + msdu id.
      
      Allocate continuous fragment descriptor memory (same size as number of
      descriptor) at the time of target initialization and configure allocated
      dma address to the target via HTT_H2T_MSG_TYPE_FRAG_DESC_BANK_CFG.
      
      How this is allocated continuous memory is going to be used is not
      covered in this patch. It just allocates memory and hand over to firmware.
      If we don't do it at init time, qca99X0 will stall when firmware tries
      to do TX.
      Signed-off-by: NRaja Mani <rmani@qti.qualcomm.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      d9156b5f
    • R
      ath10k: add 10.4 fw specific htt msg definitions · 721ad3ca
      Raja Mani 提交于
      New htt event table is added for 10.4 firmware. Following new htt
      events are available only 10.4. adding this to generic htt event
      table,
      	HTT_T2H_MSG_TYPE_EN_STATS,
      	HTT_T2H_MSG_TYPE_TX_FETCH_IND,
      	HTT_T2H_MSG_TYPE_TX_FETCH_CONF,
      	HTT_T2H_MSG_TYPE_TX_LOW_LATENCY_IND
      Signed-off-by: NRaja Mani <rmani@qti.qualcomm.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      721ad3ca
  17. 09 4月, 2015 1 次提交
  18. 30 3月, 2015 2 次提交
    • M
      ath10k: add hw rate definitions · 6aa4cf1c
      Michal Kazior 提交于
      Prepare defines for future use.
      Signed-off-by: NMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      6aa4cf1c
    • R
      ath10k: add ATH10K_FW_IE_HTT_OP_VERSION · 8348db29
      Rajkumar Manoharan 提交于
      Target to host HTT messages are conflicting between 10.x and other
      firmware revisions. By maintaining separate HTT T2H tables for each
      firmware revisions (main, 10x and tlv) similar to WMI abstraction,
      solves the conflicts. Add ATH10K_FW_IE_HTT_OP_VERSION so that the firmware can
      advertise the HTT interface to ath10k.
      
      This fix is needed to get management frames over HTT (ie.
      ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX disabled) working with 10.2.4.48-2 firmware.
      Otherwise there will be unknown htt events and nothing works:
      
      [30087.438343] ath10k_pci 0000:02:00.0: htt event (19) not handled
      [30087.448691] ath10k_pci 0000:02:00.0: htt event (19) not handled
      [30149.032974] ath10k_pci 0000:02:00.0: htt event (19) not handled
      
      If the firmware does not have ATH10K_FW_IE_HTT_OP_VERSION use the main HTT
      interface. That way old firmware images will still work.
      
      Cc: Michal Kazior <michal.kazior@tieto.com>
      Signed-off-by: NRajkumar Manoharan <rmanohar@qti.qualcomm.com>
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      8348db29
  19. 27 1月, 2015 2 次提交
  20. 13 1月, 2015 1 次提交
  21. 01 12月, 2014 1 次提交
  22. 26 11月, 2014 1 次提交
  23. 07 10月, 2014 1 次提交
  24. 18 9月, 2014 2 次提交
    • K
      ath10k: miscellaneous checkpatch fixes · 8cc7f26c
      Kalle Valo 提交于
      Fixes checkpatch warnings:
      
      ath10k/htc.c:49: WARNING: Possible unnecessary 'out of memory' message
      ath10k/htc.c:810: WARNING: Possible unnecessary 'out of memory' message
      ath10k/htt.h:1034: CHECK: Please use a blank line after function/struct/union/enum declarations
      ath10k/htt_rx.c:135: CHECK: Unnecessary parentheses around htt->rx_ring.alloc_idx.vaddr
      ath10k/htt_rx.c:173: CHECK: Unnecessary parentheses around htt->rx_ring.alloc_idx.vaddr
      ath10k/pci.c:633: WARNING: macros should not use a trailing semicolon
      ath10k/wmi.c:3594: WARNING: quoted string split across lines
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      8cc7f26c
    • K
      ath10k: fix use of multiple blank lines · c6e2e60e
      Kalle Valo 提交于
      Fixes checkpatch warnings:
      
      CHECK: Please don't use multiple blank lines
      Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
      c6e2e60e
  25. 14 7月, 2014 1 次提交