1. 01 5月, 2014 6 次提交
  2. 25 2月, 2014 1 次提交
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      clk: bcm281xx: add initial clock framework support · 1f27f152
      Alex Elder 提交于
      Add code for device tree support of clocks in the BCM281xx family of
      SoCs.  Machines in this family use peripheral clocks implemented by
      "Kona" clock control units (CCUs).  (Other Broadcom SoC families use
      Kona style CCUs as well, but support for them is not yet upstream.)
      
      A BCM281xx SoC has multiple CCUs, each of which manages a set of
      clocks on the SoC.  A Kona peripheral clock is composite clock that
      may include a gate, a parent clock multiplexor, and zero, one
      or two dividers.  There is a variety of gate types, and many gates
      implement hardware-managed gating (often called "auto-gating").
      Most dividers divide their input clock signal by an integer value
      (one or more).  There are also "fractional" dividers which allow
      division by non-integer values.  To accomodate such dividers,
      clock rates and dividers are generally maintained by the code in
      "scaled" form, which allows integer and fractional dividers to
      be handled in a uniform way.
      
      If present, the gate for a Kona peripheral clock must be enabled
      when a change is made to its multiplexor or one of its dividers.
      Additionally, dividers and multiplexors have trigger registers which
      must be used whenever the divider value or selected parent clock is
      changed.  The same trigger is often used for a divider and
      multiplexor, and a BCM281xx peripheral clock occasionally has two
      triggers.
      
      The gate, dividers, and parent clock selector are treated in this
      code as "components" of a peripheral clock.  Their functionality is
      implemented directly--e.g. the common clock framework gate
      implementation is not used for a Kona peripheral clock gate.  (This
      has being considered though, and the intention is to evolve this
      code to leverage common code as much as possible.)
      
      The source code is divided into three general portions:
      
          drivers/clk/bcm/clk-kona.h
          drivers/clk/bcm/clk-kona.c
              These implement the basic Kona clock functionality,
              including the clk_ops methods and various routines to
              manipulate registers and interpret their values.  This
              includes some functions used to set clocks to a desired
              initial state (though this feature is only partially
              implemented here).
      
          drivers/clk/bcm/clk-kona-setup.c
              This contains generic run-time initialization code for
              data structures representing Kona CCUs and clocks.  This
              encapsulates the clock structure initialization that can't
              be done statically.  Note that there is a great deal of
              validity-checking code here, making explicit certain
              assumptions in the code.   This is mostly useful for adding
              new clock definitions and could possibly be disabled for
              production use.
      
          drivers/clk/bcm/clk-bcm281xx.c
              This file defines the specific CCUs used by BCM281XX family
              SoCs, as well as the specific clocks implemented by each.
              It declares a device tree clock match entry for each CCU
              defined.
      
          include/dt-bindings/clock/bcm281xx.h
              This file defines the selector (index) values used to
              identify a particular clock provided by a CCU.  It consists
              entirely of C preprocessor constants, to be used by both the
              C source and device tree source files.
      Signed-off-by: NAlex Elder <elder@linaro.org>
      Reviewed-by: NTim Kryger <tim.kryger@linaro.org>
      Reviewed-by: NMatt Porter <mporter@linaro.org>
      Acked-by: NMike Turquette <mturquette@linaro.org>
      Signed-off-by: NMatt Porter <mporter@linaro.org>
      1f27f152